BSC052N03SG

BSC052N03S G OptiMOS™2 Power-Transistor Features • Fast switching MOSFET for SMPS • Optimized technology for notebook DC/DC converters • Qualified according to JEDEC1 for target applications • Logic level / N-channel • Excellent gate charge x R DS(on) product (FOM) • Very low on-resistance R DS(on) • Superior thermal resistance • Avalanche rated; dv/dt rated • Pb-free lead plating; RoHS compliant • Halogen-free according to IEC61249-2-21 Type BSC052N03S G Package PG-TDSON-8 Marking 52N03S Product Summary V DS R DS(on),max ID 30 5.2 80 PG-TDSON-8 V mΩ A Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Continuous drain current Symbol Conditions ID T C=25 °C T C=100 °C T A=25 °C, R thJA=45 K/W 2) Pulsed drain current Avalanche energy, single pulse Reverse diode d v /dt Gate source voltage Power dissipation I D,pulse E AS dv /dt V GS P tot T C=25 °C T A=25 °C, R thJA=45 K/W 2) Operating and storage temperature IEC climatic category; DIN IEC 68-1 Rev. 1.91 page 1 T j, T stg T C=25 °C3) I D=50 A, R GS=25 Ω I D= A, V DS=24 V, di /dt =200 A/µs, T j,max=150 °C Value 80 50 18 200 168 ####### ±20 54 2.8 -55 ... 150 55/150/56 2009-10-22 °C mJ kV/µs V W Unit A BSC052N03S G Parameter Symbol Conditions min. Thermal characteristics Thermal resistance, junction - case R thJC bottom top Thermal resistance, junction - ambient R thJA minimal footprint 6 cm2 cooling area2) 2.3 20 62 45 K/W Values typ. max. Unit Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D=1 mA V GS(th) I DSS V DS=V GS, I D=40 µA V DS=30 V, V GS=0 V, T j=25 °C V DS=30 V, V GS=0 V, T j=125 °C Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=4.5 V, I D=50 A V GS=10 V, I D=50 A Gate resistance Transconductance RG g fs |V DS|>2|I D|R DS(on)max, I D=50 A 30 1.2 1.6 0.1 2 1 µA V 0.4 43 10 10 6.6 4.3 0.9 86 100 100 8.2 5.2 1.8 Ω S nA mΩ 1) 2) J-STD20 and JESD22 2 Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 3) See figure 3 Rev. 1.91 page 2 2009-10-22 BSC052N03S G Parameter Symbol Conditions min. Dynamic characteristics Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics 4) Gate to source charge Gate charge at threshold Gate to drain charge Switching charge Gate charge total Gate plateau voltage Gate charge total, sync. FET Output charge Reverse Diode Diode continous forward current Diode pulse current Diode forward voltage IS I S,pulse V SD T C=25 °C V GS=0 V, I F=50 A, T j=25 °C V R=15 V, I F=I S, di F/dt =400 A/µs 0.86 50 200 1.1 V A Q gs Q g(th) Q gd Q sw Qg V plateau Q g(sync) Q oss V DS=0.1 V, V GS=0 to 5 V V DD=15 V, V GS=0 V V DD=15 V, I D=25 A, V GS=0 to 5 V 6.6 3.4 4.2 7.4 16 3.1 14 18 8.8 4.5 6.3 11 22 19 24 V nC nC C iss C oss Crss t d(on) tr t d(off) tf V DD=15 V, V GS=10 V, I D=25 A, R G=2.7 Ω V GS=0 V, V DS=15 V, f =1 MHz 2120 760 98 5.9 5.0 23 4.0 2820 1010 147 8.9 7.5 34 6.0 ns pF Values typ. max. Unit Reverse recovery charge Q rr - - 10 nC 4) See figure 16 for gate charge parameter definition Rev. 1.91 page 3 2009-10-22 BSC052N03S G 1 Power dissipation P tot=f(T C) 2 Drain current I D=f(T C); V GS≥10 V 60 100 50 80 40 60 P tot [W] 30 I D [A] 40 20 0 0 40 80 120 160 0 40 80 120 160 20 10 0 T C [°C] T C [°C] 3 Safe operating area I D=f(V DS); T C=25 °C; D =0 parameter: t p 103 1000 4 Max. transient thermal impedance Z thJC=f(t p) parameter: D =t p/T 101 10 limited by on-state resistance 1 µs 10 µs 100 102 100 µs DC 100 0.5 1 Z thJC [K/W] 0.2 I D [A] 10 1 10 1 ms 0.1 0.05 10 ms 10 -1 0.1 0.02 10 0 1 0.01 single pulse 10-1 0.1 0.1 1 10 100 10-2 2 0.01 0 0 0 0 0 0 10 -1 10 0 V DS [V] 10 1 10 t p [s] Rev. 1.91 page 4 2009-10-22 BSC052N03S G 5 Typ. output characteristics I D=f(V DS); T j=25 °C parameter: V GS 120 10 V 4.5 V 3.7 V 4V 3.4 V 3.2 V 6 Typ. drain-source on resistance R DS(on)=f(I D); T j=25 °C parameter: V GS 25 100 4V 20 3V 80 3.7 V 60 R DS(on) [mΩ ] 15 I D [A] 10 4.5 V 40 3.4 V 3.2 V 20 5 3V 2.8 V 10 V 0 0 1 2 3 0 0 20 40 60 80 100 V DS [V] I D [A] 7 Typ. transfer characteristics I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j 160 8 Typ. forward transconductance g fs=f(I D); T j=25 °C 140 140 120 120 100 100 80 g fs [S] 150 °C 25 °C I D [A] 80 60 60 40 40 20 20 0 0 1 2 3 4 5 0 0 20 40 60 80 V GS [V] I D [A] Rev. 1.91 page 5 2009-10-22 BSC052N03S G 9 Drain-source on-state resistance R DS(on)=f(T j); I D=50 A; V GS=10 V 10 Typ. gate threshold voltage V GS(th)=f(T j); V GS=V DS parameter: I D 9 8 7 6 2 400 µA 98 % 2.5 R DS(on) [mΩ ] 5 typ V GS(th) [V] 1.5 40 µA 4 3 2 1 0 -60 -20 20 60 100 140 180 1 0.5 0 -60 -20 20 60 100 140 180 T j [°C] T j [°C] 11 Typ. capacitances C =f(V DS); V GS=0 V; f =1 MHz 12 Forward characteristics of reverse diode I F=f(V SD) parameter: T j 104 10000 103 150 °C 25 °C 150°C, 98% 102 Ciss 25°C, 98% 3 10 1000 Coss 101 C [pF] I F [A] 102 Crss 100 100 10-1 101 10 10-2 5 10 15 20 25 30 0 0.5 1 1.5 2 0 V DS [V] V SD [V] Rev. 1.91 page 6 2009-10-22 BSC052N03S G 13 Avalanche characteristics I AS=f(t AV); R GS=25 Ω parameter: T j(start) 100 14 Typ. gate charge V GS=f(Q gate); I D=25 A pulsed parameter: V DD 12 15 V 100 °C 125 °C 25 °C 10 6V 24 V 8 10 V GS [V] 1 10 100 1000 I AV [A] 6 4 2 1 0 0 10 20 30 40 t AV [µs] Q gate [nC] 15 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=1 mA 16 Gate charge waveforms 36 V GS 34 Qg 32 30 V BR(DSS) [V] 28 26 V g s(th) 24 22 Q g(th) Q gs -60 -20 20 60 100 140 180 Q sw Q gd Q g ate 20 T j [°C] Rev. 1.91 page 7 2009-10-22 BSC052N03S G Package Outline PG-TDSON-8: Outline PG-TDSON-8 Rev. 1.91 page 8 2009-10-22 BSC052N03S G Package Outline PG-TDSON-8: Tape Dimensions in mm Rev. 1.91 page 9 2009-10-22 BSC052N03S G Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. 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Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.91 page 10 2009-10-22