BSC059N03S

BSC059N03S OptiMOS®2 Power-Transistor Features • Fast switching MOSFET for SMPS • Optimized technology for notebook DC/DC converters • Qualified according to JEDEC for target applications • N-channel • Logic level • Excellent gate charge x R DS(on) product (FOM) • Very low on-resistance R DS(on) • Superior thermal resistance • Avalanche rated • dv /dt rated Type BSC059N03S Package P-TDSON-8 Ordering Code Q67042-S4222 1 Product Summary V DS R DS(on),max ID 30 5.5 50 V mΩ A P-TDSON-8 Marking 59N03S Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Continuous drain current Symbol Conditions ID T C=25 °C T C=100 °C T A=25 °C, R thJA=45 K/W 2) Pulsed drain current Avalanche energy, single pulse Reverse diode dv /dt Gate source voltage Power dissipation I D,pulse E AS dv /dt V GS P tot T C=25 °C T A=25 °C, R thJA=45 K/W 2) Operating and storage temperature IEC climatic category; DIN IEC 68-1 Rev. 1.2 page 1 T j, T stg T C=25 °C3) I D=50 A, R GS=25 Ω I D=50 A, V DS=24 V, di /dt =200 A/µs, T j,max=150 °C Value 50 46 17.5 200 150 6 ±20 48 2.8 -55 ... 150 55/150/56 2004-04-13 °C mJ kV/µs V W Unit A BSC059N03S Parameter Symbol Conditions min. Thermal characteristics Thermal resistance, junction - case Thermal resistance, junction - ambient R thJC R thJA minimal footprint 6 cm2 cooling area2) 2.6 62 45 K/W Values typ. max. Unit Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D=1 mA V GS(th) I DSS V DS=V GS, I D=35 µA V DS=30 V, V GS=0 V, T j=25 °C V DS=30 V, V GS=0 V, T j=125 °C Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=4.5 V, I D=50 A V GS=10 V, I D=50 A Gate resistance Transconductance RG g fs |V DS|>2|I D|R DS(on)max, I D=50 A 30 1.2 1.6 0.1 2 1 µA V 42 10 10 6.9 4.6 0.9 84 100 100 8.6 5.5 Ω S nA mΩ 1) 2) J-STD20 and JESD22 Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 3) See figure 3 Rev. 1.2 page 2 2004-04-13 BSC059N03S Parameter Symbol Conditions min. Dynamic characteristics Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics4) Gate to source charge Gate charge at threshold Gate to drain charge Switching charge Gate charge total Gate plateau voltage Gate charge total, sync. FET Output charge Reverse Diode Diode continous forward current Diode pulse current Diode forward voltage IS I S,pulse V SD T C=25 °C V GS=0 V, I F=48 A, T j=25 °C V R=15 V, I F=I S, di F/dt =400 A/µs 0.87 48 200 1.1 V A Q gs Q g(th) Q gd Q sw Qg V plateau Q g(sync) Q oss V DS=0.1 V, V GS=0 to 5 V V DD=15 V, V GS=0 V V DD=15 V, I D=25 A, V GS=0 to 5 V 6.3 3.2 4.0 7.1 15 3.1 14 17 8.4 4.3 6.0 10 21 18 23 V nC nC C iss C oss Crss t d(on) tr t d(off) tf V DD=15 V, V GS=10 V, I D=25 A, R G=2.7 Ω V GS=0 V, V DS=15 V, f =1 MHz 2010 720 93 5.7 4.8 22 3.8 2670 950 140 8.5 7.2 33 5.7 ns pF Values typ. max. Unit Reverse recovery charge Q rr - - 10 nC 4) See figure 16 for gate charge parameter definition Rev. 1.2 page 3 2004-04-13 BSC059N03S 1 Power dissipation P tot=f(T C) 2 Drain current I D=f(T C); V GS≥10 V 60 60 50 40 40 P tot [W] 30 20 I D [A] 20 0 0 40 80 120 160 0 40 80 120 160 10 0 T C [°C] T C [°C] 3 Safe operation area I D=f(V DS); T C=25 °C; D =0 parameter: t p 103 1000 4 Max. transient thermal impedance Z thJC=f(t p) parameter: D =t p/T 101 10 limited by on-state resistance 1 µs 102 10 µs 100 0.5 100 µs DC 100 1 101 10 Z thJC [K/W] 0.2 I D [A] 1 ms 0.1 0.05 10 ms 10-1 0.1 0.02 100 1 0.01 single pulse 10-1 0.1 0.1 1 10 100 10-2 2 0.01 0 0 0 0 0 0 10 -1 10 0 V DS [V] 10 1 10 10 -6 10 -5 10 -4 t p [s] 10 -3 10 -2 10-1 Rev. 1.2 page 4 2004-04-13 BSC059N03S 5 Typ. output characteristics I D=f(V DS); T j=25 °C parameter: V GS 120 10 V 4.5 V 6 Typ. drain-source on resistance R DS(on)=f(I D); T j=25 °C parameter: V GS 25 2.8 V 3.7 V 4V 100 3.2 V 4V 3.4 V 20 3V 80 3.7 V 60 R DS(on) [mΩ ] 15 I D [A] 10 4.5 V 40 3.4 V 3.2 V 20 5 10 V 3V 2.8 V 0 0 1 2 3 0 0 20 40 60 80 100 V DS [V] I D [A] 7 Typ. transfer characteristics I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j 160 140 120 8 Typ. forward transconductance g fs=f(I D); T j=25 °C 100 90 80 70 100 80 60 40 150 °C 25 °C 60 g fs [S] 0 1 2 3 4 5 I D [A] 50 40 30 20 10 0 0 10 20 30 40 50 60 20 0 V GS [V] I D [A] Rev. 1.2 page 5 2004-04-13 BSC059N03S 9 Drain-source on-state resistance R DS(on)=f(T j); I D=50 A; V GS=10 V 10 Typ. gate threshold voltage V GS(th)=f(T j); V GS=V DS parameter: I D 10 2.5 8 2 350 µA R DS(on) [mΩ ] 6 98 % V GS(th) [V] 1.5 35 µA typ 4 1 2 0.5 0 -60 -20 20 60 100 140 180 0 -60 -20 20 60 100 140 180 T j [°C] T j [°C] 11 Typ. capacitances C =f(V DS); V GS=0 V; f =1 MHz 12 Forward characteristics of reverse diode I F=f(V SD) parameter: T j 104 10000 103 150 °C Ciss 25 °C 150°C, 98% 102 25°C, 98% 103 1000 Coss 101 C [pF] I F [A] 100 102 Crss 100 10-1 101 10 10-2 10 20 30 0 0.4 0.8 V SD [V] 1.2 1.6 0 V DS [V] Rev. 1.2 page 6 2004-04-13 BSC059N03S 13 Avalanche characteristics I AS=f(t AV); R GS=25 Ω parameter: T j(start) 100 14 Typ. gate charge V GS=f(Q gate); I D=25 A pulsed parameter: V DD 12 125 °C 100 °C 10 25 °C 6V 15 V 24 V 8 10 V GS [V] 1 10 100 1000 I AV [A] 6 4 2 1 0 0 10 20 30 t AV [µs] Q gate [nC] 15 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=1 mA 16 Gate charge waveforms 36 V GS 34 32 30 Qg V BR(DSS) [V] 28 26 24 22 20 -60 -20 20 60 100 140 180 V g s(th) Q g (th) Q gs Q sw Q gd Q gate T j [°C] Rev. 1.2 page 7 2004-04-13 BSC059N03S Package Outline P-TDSON-8: Outline Footprint Dimensions in mm Rev. 1.2 page 8 2004-04-13 BSC059N03S Package Outline P-TDSON-8: Tape Dimensions in mm Rev. 1.2 page 9 2004-04-13 BSC059N03S Published by Infineon Technologies AG Bereich Kommunikation St.-Martin-Straße 53 D-81541 München © Infineon Technologies AG 1999 All Rights Reserved. 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Infineon Technologies' components may only be used in life-support devices or systems with the expressed written approval of Infineon Technologies if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.2 page 10 2004-04-13