BSF050N03LQ3 G
OptiMOSTM3 Power-MOSFET
Features • Optimized for high switching frequency DC/DC converter • Very low on-resistance R DS(on) • Excellent gate charge x R DS(on) product (FOM) • Low parasitic inductance • Low profile (2|I D|R DS(on)max, I D=30 A
37
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air.
Rev. 2.0
page 2
2009-05-11
BSF050N03LQ3 G
Parameter Symbol Conditions min. Dynamic characteristics Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics 6) Gate to source charge Gate charge at threshold Gate to drain charge Switching charge Gate charge total Gate plateau voltage Gate charge total Q gs Q g(th) Q gd Q sw Qg V plateau Qg V DD=15 V, I D=20 A, V GS=0 to 10 V V DS=0.1 V, V GS=0 to 4.5 V V DD=15 V, V GS=0 V V DD=15 V, I D=20 A, V GS=0 to 4.5 V 5.7 3.5 2.7 5.4 11.9 3.0 25 21 42 V nC C iss C oss Crss t d(on) tr t d(off) tf V DD=15 V, V GS=10 V, I D=30 A, R G=1.6 Ω V GS=0 V, V DS=15 V, f =1 MHz 2250 1130 39 3.4 3.4 18 3.2 3000 1500 ns pF Values typ. max. Unit
Gate charge total, sync. FET Output charge Reverse Diode Diode continuous forward current Diode pulse current Diode forward voltage
Q g(sync) Q oss
-
10.3 18
-
nC
IS I S,pulse V SD
T C=25 °C V GS=0 V, I F=20 A, T j=25 °C V R=15 V, I F=I S, di F/dt =400 A/µs
-
0.82
25 240
A
V
Reverse recovery charge
6)
Q rr
-
-
16
nC
See figure 16 for gate charge parameter definition
Rev. 2.0
page 3
2009-05-11
BSF050N03LQ3 G
1 Power dissipation P tot=f(T C) 2 Drain current I D=f(T C); V GS≥10 V
30
70
25
60
50 20
P tot [W]
40 15
I D [A]
30 20 10 0 0 40 80 120 160 0 40 80 120 160
10
5
0
T C [°C]
T C [°C]
3 Safe operating area I D=f(V DS); T C=25 °C; D =0 parameter: t p
103
limited by on-state resistance 1 µs
4 Max. transient thermal impedance Z thJC=f(t p) parameter: D =t p/T
101
0.5 10 µs
102
100 µs
100
0.2 0.1
Z thJC [K/W]
0.05
I D [A]
101
DC 1 ms
10-1
0.02 0.01 single pulse
100
10 ms
10-2
10-1 10
-1
10-3 10
0
10
1
10
2
10-6
10-5
10-4
10-3
10-2
10-1
100
V DS [V]
t p [s]
Rev. 2.0
page 4
2009-05-11
BSF050N03LQ3 G
5 Typ. output characteristics I D=f(V DS); T j=25 °C parameter: V GS
200
5V
6 Typ. drain-source on resistance R DS(on)=f(I D); T j=25 °C parameter: V GS
16
10 V
4.5 V
160
4V
R DS(on) [mΩ ]
120
3.3 V
3.5 V
I D [A]
8
4V 4.5 V 5V
80
3.5 V
10 V
7V
40
3.2 V 3V 2.8 V
0 0 1 2 3
0 0 10 20 30 40 50
V DS [V]
I D [A]
7 Typ. transfer characteristics I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j
100
8 Typ. forward transconductance g fs=f(I D); T j=25 °C
200
80 150
60
g fs [S]
40 20
150 °C 25 °C
I D [A]
100
50
0 0 1 2 3 4 5
0 0 40 80 120 160
V GS [V]
I D [A]
Rev. 2.0
page 5
2009-05-11
BSF050N03LQ3 G
9 Drain-source on-state resistance R DS(on)=f(T j); I D=20 A; V GS=10 V 10 Typ. gate threshold voltage V GS(th)=f(T j); V GS=V DS; I D=250 µA
12
2.5
2
8
R DS(on) [mΩ ]
98 %
V GS(th) [V]
typ
1.5
1
4
0.5
0 -60 -20 20 60 100 140 180
0 -60 -20 20 60 100 140 180
T j [°C]
T j [°C]
11 Typ. capacitances C =f(V DS); V GS=0 V; f =1 MHz
12 Forward characteristics of reverse diode I F=f(V SD) parameter: T j
104
1000
25 °C Ciss Coss
150 °C, 98%
103
100
C [pF]
I F [A]
150 °C 25 °C, 98%
10
2
10
Crss
101 0 10 20 30
1 0.0 0.5 1.0 1.5 2.0
V DS [V]
V SD [V]
Rev. 2.0
page 6
2009-05-11
BSF050N03LQ3 G
13 Avalanche characteristics I AS=f(t AV); R GS=25 Ω parameter: T j(start)
100
14 Typ. gate charge V GS=f(Q gate); I D=20 A pulsed parameter: V DD
12
10
15 V 6V 24 V
8
10
100 °C 125 °C
V GS [V]
1000
I AV [A]
25 °C
6
4
2
1 1 10 100
0 0 8 16 24 32
t AV [µs]
Q gate [nC]
15 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=1 mA
16 Gate charge waveforms
34
V GS
32
Qg
30
V BR(DSS) [V]
28
26
V g s(th)
24
22
Q g(th) Q gs
-60 -20 20 60 100 140 180
Q sw Q gd
Q g ate
20
T j [°C]
Rev. 2.0
page 7
2009-05-11
BSF050N03LQ3 G
Package Outline
Rev. 2.0
page 8
2009-05-11
BSF050N03LQ3 G
Package Outline PG-TDSON-8: Tape MG-WDSON-2
Dimensions in mm Rev. 2.0 page 9 2009-05-11
BSF050N03LQ3 G
MG-WDSON-2
Dimensions in mm Recommended stencil thikness 150 µm
Rev. 2.0
page 10
2009-05-11
BSF050N03LQ3 G
Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 2.0
page 11
2009-05-11
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