BTM7750GP

Data Sheet, Rev. 1.0, July 2008 BTM7750GP TrilithIC Automotive Power BTM7750GP Table of Contents Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1 2 2.1 2.2 3 4 4.1 4.2 4.3 4.4 4.5 4.6 5 5.1 5.2 5.3 5.4 6 7 8 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Overtemperature Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Undervoltage Lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Status Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 8 8 8 8 8 8 10 10 11 11 12 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Data Sheet 2 Rev. 1.0, 2008-07-07 TrilithIC BTM7750GP 1 Features • • • • Overview Quad D-MOS switch driver Free configurable as bridge or quad-switch Optimized for DC motor management applications Low RDS ON High side: 70 mΩ typ. @ 25°C,165 mΩ max. @ 110°C Low side: 45 mΩ typ. @ 25°C, 100 mΩ max. @ 110°C Maximum peak current: typ. 12 A @ 25 °C Very low quiescent current: typ. 5 μA @ 25 °C Small outline, enhanced power PG-DSO-package Operates up to 40 V Status flag diagnosis Short-circuit-protection Overtemperature shut down with hysteresis Internal clamp diodes Under-voltage detection with hysteresis Green Product (RoHS compliant) AEC Qualified • • • • • • • • • • • P-TO263-15-1 Description The BTM7750GP is part of the TrilithIC family containing three dies in one package: One double high-side switch and two low-side switches. The drains of these three vertical DMOS chips are mounted on separated lead frames. The sources are connected to individual pins, so the BTM7750GP can be used in H-bridge- as well as in any other configuration. The double high-side switch is manufactured in SMART SIPMOS® technology which combines low RDS ON vertical DMOS power stages with CMOS circuitry for control, protection and diagnosis. To achieve low RDS ON and fast switching performance, the low-side switches are manufactured in S-FET logic level technology. Type BTM7750GP Data Sheet Package P-TO263-15-1 3 Marking BTM7750GP Rev. 1.0, 2008-07-07 BTM7750GP 2 2.1 Pin Configuration Pin Assignment Molding Compound IL1 NC SL1 NC SH1 GND IH1 DHVS ST IH2 SH2 NC IL2 NC SL2 1 Heat-Slug 1 2 18 3 4 5 Heat-Slug 2 6 7 8 9 10 11 12 Heat-Slug 3 13 16 14 15 DL2 17 DHVS DL1 Figure 1 Pin Assignment BTM7750GP (Top View) Data Sheet 4 Rev. 1.0, 2008-07-07 BTM7750GP Table 1 Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Pin Definitions and Functions Symbol Function IL1 NC SL1 NC SH1 GND IH1 DHVS ST IH2 SH2 NC IL2 NC SL2 DL2 DHVS DL1 Analog input of low-side switch 1 Not connected Source of low-side switch 1 Not connected Source of high-side switch 1 Ground of high-side switches Digital input of high-side switch 1 Drain of high-side switches and power supply voltage Status; open Drain output Digital input of high-side switch 2 Source of high-side switch 2 Not connected Analog input of low-side switch 2 Not connected Source of low-side switch 2 Drain of low-side switch 2 Heat-Slug 3 or Heat-Dissipator Drain of high-side switches and power supply voltage Heat-Slug 2 or Heat-Dissipator Drain of low-side switch 1 Heat-Slug 1 or Heat-Dissipator Pins written in bold type need power wiring. Data Sheet 5 Rev. 1.0, 2008-07-07 BTM7750GP 2.2 Terms IS VS=12V CS 470nF CL 100µF IFH1,2 DHVS IST LK IST ST 9 8, 17 VDSH2 -VFH2 Diagnosis Biasing and Protection VDSH1 -VFH1 VST VSTL VSTZ IIH1 IH1 7 Gate Driver RO1 RO2 16 11 IIH1 VIH1 VIH2 SH2 DL2 ISH2 IDL2 IDL LK 2 VUVON VUVOFF IH2 GND IGND ILKCL 10 Gate Driver 6 5 SH1 DL1 ISH1 IDL1 IDL LK 1 Protection IIL1 IL1 18 1 Gate Driver Protection VIL1 VIL th 1 VIL2 VIL th 2 3 IIL2 IL2 13 Gate Driver 15 VDSL1 -VFL1 VDSL2 -VFL2 SL1 ISCP L 1 ISL1 SL2 ISCP L 2 ISL2 Figure 2 Table 2 Terms BTM7750GP HS-Source-Current Named during Short Circuit Named during Leakage-Cond. ISH1,2 ISCP H IDL LK Data Sheet 6 Rev. 1.0, 2008-07-07 BTM7750GP 3 Block Diagram DHVS 8, 17 9 ST Diagnosis Biasing and Protection IH1 7 IH2 GND 10 Driver IN OUT 00LL 01LH 10HL 11HH RO1 RO2 16 11 SH2 DL2 6 5 SH1 DL1 Protection 18 1 IL1 Gate Driver Protection 13 IL2 Gate Driver 3 15 SL1 SL2 Figure 3 Block Diagram BTM7750GP Data Sheet 7 Rev. 1.0, 2008-07-07 BTM7750GP 4 4.1 Circuit Description Input Circuit The control inputs IH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into the necessary form for driving the power output stages. The inputs are protected by ESD clamp-diodes. The inputs IL1 and IL2 are connected to the internal gate-driving units of the N-channel vertical power-MOS-FETs. 4.2 Output Stages The output stages consist of an low RDSON Power-MOS H-bridge. In H-bridge configuration, the D-MOS body diodes can be used for freewheeling when communicating inductive loads. If the high-side switches are used as single switches, positive and negative voltage spikes which occur when driving inductive loads are limited by integrated power clamp diodes. 4.3 Short Circuit Protection The outputs are protected against – output short circuit to ground – output short circuit to the supply voltage, and – overload (load short circuit). An internal OP-Amp controls the Drain-Source-Voltage by comparing the DS-Voltage-Drop with an internal reference voltage. Above this trip point the OP-Amp reduces the output current depending on the junction temperature and the drop voltage. 4.4 Overtemperature Protection The high-side and the low-side switches also incorporate an over temperature protection circuit with hysteresis which switches off the output transistors. In the case of the high-side switches, the status output is set to low. 4.5 Undervoltage Lockout When VS reaches the switch-on voltage VUVON the IC becomes active with a hysteresis. The High-Side output transistors are switched off if the supply voltage VS drops below the switch off value VUVOFF. 4.6 Status Flag The status flag output is an open drain output with zener-diode which requires a pull-up resistor, as shown in the application circuit in Figure 4 “Application Example BTM7750GP” on Page 15. Various errors as listed in the table “Diagnosis” are reported by switching the open drain output ST to low. Data Sheet 8 Rev. 1.0, 2008-07-07 BTM7750GP Table 3 Flag Truth table and Diagnosis (valid only for the High-Side-Switches) IH1 0 0 1 1 0 1 X X 0 X 1 X IH2 0 1 0 1 X X 0 1 0 1 X X SH1 SH2 ST Remarks Outputs L L H H L L X X L L L L L H L H X X L L L L L L 1 1 1 1 1 0 1 0 1 0 0 1 stand-by mode switch2 active switch1 active both switches active detected detected detected detected not detected Inputs Normal operation; identical with functional truth table Overtemperature high-side switch1 Overtemperature high-side switch2 Overtemperature both high-side switches Under voltage Inputs: 0 = Logic LOW 1 = Logic HIGH X = don’t care Outputs: Z = Output in tristate condition L = Output in sink condition H = Output in source condition X = Voltage level undefined Status: 1 = No error 0 = Error Data Sheet 9 Rev. 1.0, 2008-07-07 BTM7750GP 5 5.1 Electrical Characteristics Absolute Maximum Ratings Absolute Maximum Ratings1) – 40 °C < Tj < 110 °C Pos. Parameter Symbol Limit Values min. High-Side-Switches (Pins DHVS, IH1,2 and SH1,2) 5.1.1 5.1.2 5.1.3 5.1.4 5.1.5 5.1.6 5.1.7 5.1.8 5.1.9 5.1.10 5.1.11 5.1.12 5.1.13 5.1.14 5.1.15 5.1.16 5.1.17 5.1.18 1) 2) 3) 4) Unit Remarks max. 42 28 3) Supply voltage Supply voltage for full short circuit protection HS-drain current2) HS-input current HS-input voltage Status pull up voltage Status Output current Drain-Source-Clamp voltage VS VS(SCP) IS IIH VIH VST IST VDSL – 0.3 – – 10 –5 – 10 – 0.3 –5 42 V V A mA V V mA V V V A V °C °C kV kV kV kV – TA = 25°C; tP < 100 msj Pin IH1 and IH2 Pin IH1 and IH2 5 16 5.4 5 – 36 20 3) Status Output ST Pin ST Low-Side-Switches (Pins DL1,2, IL1,2 and SL1,2) VIL = 0 V; ID ≤ 1 mA; Tj = 25°C Supply voltage for short circuit protection VDSL(SCP) – – LS-drain current2) LS-input voltage Junction temperature Storage temperature 4) IDL VIL Tj Tstg VESD VESD VESD VESD – 12 – 0.3 – 40 – 55 – – – – VIL = 5 V VIL = 10 V TA = 25°C; tP < 100 ms – – – 10 110 150 2 1 2 8 Temperatures ESD Protection Input LS-Switch Input HS-Switch Status HS-Switch Output LS and HS-Switch all other pins connected to Ground Not subject to production test; specified by design Single pulse Internally limited ESD susceptibility HBM according to EIA/JESD22-A114-B (1.5kΩ, 100pF) Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Data Sheet 10 Rev. 1.0, 2008-07-07 BTM7750GP 5.2 Pos. 5.2.19 5.2.20 5.2.21 5.2.22 5.2.23 Functional Range Parameter Supply voltage Input voltage HS Input voltage LS Status output current Junction temperature Symbol Limit Values min. max. 42 15 10 2 110 V V V mA °C After VS rising above VUVON – – – – Unit Remarks VS VIH VIL IST Tj VUVOFF – 0.3 – 0.3 0 – 40 Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table 5.3 Pos. 5.3.24 5.3.25 5.3.26 Thermal Resistance Parameter LS-junction to soldering point1) HS-junction to soldering point Junction to Ambient RthJA = Tj(HS) / (P(HS)+ P(LS)) 1) 1) Symbol Min. Limit Values Typ. – – 16 Max. 1.7 1.7 – – – – Unit K/W K/W K/W Conditions RthJSP RthJSP RthJA 2) 1) Not subject to production test, specified by design. 2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. Data Sheet 11 Rev. 1.0, 2008-07-07 BTM7750GP 5.4 Electrical Characteristics ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 110 °C; 8 V < VS < 18 V unless otherwise specified Pos. Parameter Symbol Limit Values min. typ. 5 – 1.65 3.3 – – max. 9 12 3.3 6.6 6 10 Unit Test Condition Current Consumption HS-switch 5.4.27 Quiescent current IS – – μA μA mA mA μA mA IH1 = IH2 = 0 V Tj = 25 °C IH1 = IH2 = 0 V1) IH1 or IH2 = 5 V V S = 12 V IH1 and IH2 = 5 V V S = 12 V 5.4.28 5.4.29 5.4.30 5.4.31 Supply current; one HS-switch active Supply current; both HS-switches active Leakage current of high-side switch Leakage current through logic GND in free wheeling condition Input current IS IS ISH LK – – – ILKCL = IFH + – ISH IIL – – VIH = VSH = 0 V V S = 12 V IFH = 3 A V S = 12 V VIL = 5 V; normal operation VIL = 5 V; failure mode Current Consumption LS-switch 5.4.32 8 160 2 30 300 10 μA μA μA 5.4.33 Leakage current of low-side switch IDL LK – VIL = 0 V VDSL = 18 V VS increasing VS decreasing VUVON – VUVOFF IFH = 3 A IFL = 3 A ISH = 1 A; VS = 12 V Tj = 25 °C ISH = 1 A; VS = 12 V Tj = 110 °C1) ISL = 1 A; VIL = 5 V Tj = 25 °C ISL = 1 A; VIL = 5 V Tj = 110 °C1) Under Voltage Lockout HS-switch 5.4.34 5.4.35 5.4.36 5.4.37 5.4.38 5.4.39 Switch-ON voltage Switch-OFF voltage Switch ON/OFF hysteresis Inverse diode of high-side switch; Forward-voltage Inverse diode of low-side switch; Forward-voltage Static drain-source on-resistance of high-side switch VUVON VUVOFF VUVHY VFH VFL RDS ON H – 1.8 – – – – – – – 1 0.8 0.8 70 110 45 65 4.8 3.5 – 1.2 1.2 – 165 – 100 V V V V V mΩ mΩ mΩ mΩ Output stages 5.4.40 Static drain-source on-resistance of low-side switch RDS ON L – – Data Sheet 12 Rev. 1.0, 2008-07-07 BTM7750GP ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 110 °C; 8 V < VS < 18 V unless otherwise specified Pos. Parameter Symbol Limit Values min. typ. 15 12 10 15 28 22 17 180 170 10 0.2 – – max. 18 – 12 35 34 – 21 190 180 – 0.6 10 – Unit Test Condition Short Circuit of high-side switch to GND 5.4.41 Initial peak SC current tdel = 100 µs; VS = 12 V; VDSH = 12V ISCP H 13 – 8 A A A kΩ A A A °C °C °C V μA V Tj = – 40 °C Tj = + 25 °C Tj = + 110 °C1) VDSL = 3 V Tj = – 40 °C Tj = 25 °C Tj = 110 °C1) Short Circuit of high-side switch to VS 5.4.42 5.4.43 Output pull-down-resistor Initial peak SC current VDSL = 12V; VIL = 5V; tdel = 250 µs Thermal shutdown junction temperature Thermal switch-on junction temperature Temperature hysteresis Low output voltage Leakage current Zener-limit-voltage RO ISCP L 8 21 – 13 Short Circuit of low-side switch to VS Thermal Shutdown1) 5.4.44 5.4.45 5.4.46 5.4.47 5.4.48 5.4.49 Tj SD Tj SO ΔΤ 155 150 – – – 5.4 – – ΔΤ = TjSD – TjSO IST = 1.6 mA VST = 5 V IST = 1.6 mA Status Flag Output ST of high-side switch VST L IST LK VST Z Data Sheet 13 Rev. 1.0, 2008-07-07 BTM7750GP ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 110 °C; 8 V < VS < 18 V unless otherwise specified Pos. Parameter 1) Symbol Limit Values min. typ. 85 80 – – 60 60 1 1 max. 180 180 1.2 1.6 150 150 1.5 1.5 Unit Test Condition Switching times of high-side switch 5.4.50 5.4.51 5.4.52 5.4.53 5.4.54 5.4.55 5.4.56 5.4.57 Turn-ON-time to 90% VSH Turn-OFF-time to 10% VSH Slew rate on 10 to 30% VSH Slew rate off 70 to 40% VSH 1) tON tOFF dV/dtON -dV/dtOFF tON tOFF -dV/dtON – – – – – – – – μs μs V/μs V/μs μs μs RLoad = 12 Ω V S = 12 V Switching times of low-side switch Turn-ON-time to 10% VDL Turn-OFF-time to 90% VDL Slew rate on 70 to 50% VDL Slew rate off 50 to 70% VDL RLoad = 10 Ω V S = 12 V VIL = 0 to 5 V dV/dtOFF V/μs RLoad = 4.7 Ω V/μs VS = 12 V VIL = 0 to 5 V V V V μA μA kΩ V V – – – Control Inputs of high-side switches IH 1, 2 5.4.58 5.4.59 5.4.60 5.4.61 5.4.62 5.4.63 5.4.64 5.4.65 H-input voltage L-input voltage Input voltage hysteresis H-input current L-input current Input series resistance Zener limit voltage Gate-threshold-voltage VIH High VIH Low VIH HY IIH High IIH Low RI VIH Z VIL th – 1 – 15 5 2.7 5.4 0.9 – – 0.3 30 – 4 – 1.7 2.5 – – 60 20 5.5 – 2.2 VIH = 5 V VIH = 0.4 V – IIH = 1.6 mA IDL = 2 mA Control Inputs IL1, 2 1) Not subject to production test; specified by design Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specified mean values expected over the production spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and the given supply voltage. Data Sheet 14 Rev. 1.0, 2008-07-07 BTM7750GP 6 Application Information Note: The following simplified application examples are given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. The function of the described circuits must be verified in the real application Watchdog Reset Q TLE 4278G D CD 47nF I VS=12V RQ 100 kΩ CQ 22µF D01 Z39 CS 10µF WD R VCC DHVS 8, 17 RS 10 kΩ ST 9 Diagnosis Biasing and Protection IH1 7 Gate Driver RO1 RO2 16 11 SH2 DL2 IH2 10 Gate Driver XC866 µP GND 6 5 SH1 DL1 M Protection IL1 18 1 Gate Driver Protection IL2 13 Gate Driver 3 15 GND SL1 SL2 In case of VDSL