BTS5210G

BTS 5210G Smart High-Side Power Switch Two Channels: 2 x 140mΩ Status Feedback Product Summary Operating Voltage Vbb Active channels On-state Resistance RON Nominal load current IL(NOM) Current limitation IL(SCr) 5.5...40V two parallel 70mΩ 3.9A 6.5A Package P-DSO-14 one 140mΩ 2.4A 6.5A General Description • • N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and  diagnostic feedback, monolithically integrated in Smart SIPMOS technology. Providing embedded protective functions Applications • • • • µC compatible high-side power switch with diagnostic feedback for 12V and 24V grounded loads All types of resistive, inductive and capacitve loads Most suitable for loads with high inrush currents, so as lamps Replaces electromechanical relays, fuses and discrete circuits Basic Functions • • • • • • • Very low standby current CMOS compatible input Improved electromagnetic compatibility (EMC) Fast demagnetization of inductive loads Stable behaviour at undervoltage W ide operating voltage range Logic ground independent from load ground Protection Functions • • • • • • • • Short circuit protection Overload protection Current limitation Thermal shutdown Overvoltage protection (including load dump) with external resistor Reverse battery protection with external resistor Loss of ground and loss of Vbb protection Electrostatic discharge protection (ESD) Block Diagram Vbb IN1 ST1 IN2 ST2 Logic Channel 1 Channel 2 Load 1 Load 2 Diagnostic Function • • • Diagnostic feedback with open drain output Open load detection in OFF-state Feedback of thermal shutdown in ON-state GND Infineon Technologies AG 1 2003-Oct-01 BTS 5210G Functional diagram GND internal voltage supply IN1 ST1 logic gate control + charge pump current limit VBB clamp for inductive load OUT1 ESD temperature sensor Open load detection channel 1 reverse battery protection IN2 ST2 control and protection circuit equivalent to channel 1 OUT2 Infineon Technologies AG 2 2003-Oct-01 BTS 5210G Pin Definitions and Functions Pin 1,7, 8,14 2 3 5 4 6 12,13 Symbol Vbb GND IN1 IN2 ST1 ST2 OUT1 Function Positive power supply voltage. Design the wiring for the simultaneous max. short circuit currents from channel 1 to 2 and also for low thermal resistance Logic Ground Input 1,2 activates channel 1,2 in case of logic high signal Diagnostic feedback 1,2 of channel 1,2 open drain Output 1,2 protected high-side power output of channel 1,2. Design the wiring for the max. short circuit current; both output pins have to be connected in parallel for operation according this spec. Pin configuration (top view) Vbb GND IN1 ST1 IN2 ST2 Vbb 1 2 3 4 5 6 7 • 14 13 12 11 10 9 8 Vbb OUT1 OUT1 NC OUT2 OUT2 Vbb 9,10 11 OUT2 NC Not Connected Infineon Technologies AG 3 2003-Oct-01 BTS 5210G Maximum Ratings at Tj = 25°C unless otherwise specified Parameter Supply voltage (overvoltage protection see page 6) Supply voltage for full short circuit protection Tj,start = -40 ...+150°C Load current (Short-circuit current, see page 6) Load dump protection1) VLoadDump = VA + Vs, VA = 13.5 V RI2) = 2 Ω, td = 400 ms; IN = low or high, each channel loaded with RL = 13.5 Ω, Operating temperature range Storage temperature range Power dissipation (DC)4) Ta = 25°C: Ta = 85°C: (all channels active) Maximal switchable inductance, single pulse Vbb = 12V, Tj,start = 150°C4), see diagrams on page 10 IL = 2.9 A, EAS = 65 mJ, 0 Ω one channel: IL = 5.7 A, EAS = 125 mJ, 0 Ω two parallel channels: Electrostatic discharge capability (ESD) IN: (Human Body Model) ST: out to all other pins shorted: acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993 R=1.5kΩ; C=100pF Symbol Vbb Vbb IL VLoad dump3) Tj Tstg Ptot Values 43 36 self-limited 60 -40 ...+150 -55 ...+150 3,05 1,59 Unit V V A V °C W ZL VESD 11,2 5,6 1.0 4.0 8.0 -10 ... +16 ±0.3 ±5.0 ±5.0 mH kV Input voltage (DC) see internal circuit diagram page 9 Current through input pin (DC) Pulsed current through input pin5) Current through status pin (DC) VIN IIN IINp IST V mA 1) 2) 3) 4) 5) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150Ω resistor for the GND connection is recommended. RI = internal resistance of the load dump test pulse generator VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839 Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb connection. PCB is vertical without blown air. See page 14 only for testing Infineon Technologies AG 4 2003-Oct-01 BTS 5210G Thermal Characteristics Parameter and Conditions Thermal resistance junction - soldering point6)7) junction – ambient6) @ 6 cm2 cooling area Symbol min each channel: Rthjs Rthja one channel active: all channels active: ----Values typ max --45 40 15 ---Unit K/W Electrical Characteristics Parameter and Conditions, each of the four channels at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified Symbol Values min typ max Unit Load Switching Capabilities and Characteristics On-state resistance (Vbb to OUT); IL = 2 A each channel, Tj = 25°C: RON Tj = 150°C: two parallel channels, Tj = 25°C: see diagram, page 11 ---1.8 3.4 -- 110 210 55 2.4 3.9 -- 140 280 70 -- mΩ Nominal load current one channel active: IL(NOM) two parallel channels active: A Device on PCB6), Ta = 85°C, Tj ≤ 150°C Output current while GND disconnected or pulled up8); IL(GNDhigh) Vbb = 32 V, VIN = 0, see diagram page 9 Turn-on time9) 2 mA µs Turn-off time RL = 12 Ω Slew rate on 9) Slew rate off 9) IN IN to 90% VOUT: ton to 10% VOUT: toff --0.2 0.2 100 100 --- 250 270 1.0 1.1 10 to 30% VOUT, RL = 12 Ω: dV/dton 70 to 40% VOUT, RL = 12 Ω: -dV/dtoff V/µs V/µs 6) 7) 8) 9) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb connection. PCB is vertical without blown air. See page 14 Soldering point: upper side of solder edge of device pin 15. See page 14 not subject to production test, specified by design See timing diagram on page 12. Infineon Technologies AG 5 2003-Oct-01 BTS 5210G Parameter and Conditions, each of the four channels at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified Symbol Values min typ max 5.5 --41 -------47 5 --1 40 4.5 4.511) 52 8 12 811) 5 Unit Operating Parameters Operating voltage Undervoltage switch off10) Overvoltage protection12) I bb = 40 mA Standby current13) VIN = 0; see diagram page 11 Vbb(on) Tj =-40°C...25°C: Vbb(u so) Tj =125°C: Vbb(AZ) V V V µA µA Tj =-40°C...25°C: Ibb(off) Tj =150°C: Tj =125°C: Off-State output current (included in Ibb(off)) IL(off) VIN = 0; each channel Operating current 14), VIN = 5V, one channel on: IGND all channels on: Protection Functions15) Current limit, Vout = 0V, (see timing diagrams, page 12) Tj =-40°C: IL(lim) Tj =25°C: Tj =+150°C: Repetitive short circuit current limit, Tj = Tjt each channel IL(SCr) two channels (see timing diagrams, page 12) --- 0.5 1.0 0.9 1.7 mA --5 ---41 150 -- -9 -6.5 6.5 2 47 -10 14 -----52 --- A A ms V °C K Initial short circuit shutdown time Vout = 0V Tj,start =25°C: toff(SC) VON(CL) Tjt ∆Tjt (see timing diagrams on page 12) Output clamp (inductive load switch off)16) at VON(CL) = Vbb - VOUT, IL= 40 mA Thermal overload trip temperature Thermal hysteresis 10) 11) 12) 13) 14) 15) 16) is the voltage, where the device doesn´t change it´s switching condition for 15ms after the supply voltage falling below the lower limit of Vbb(on) not subject to production test, specified by design Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150Ω resistor for the GND connection is recommended). See also VON(CL) in table of protection functions and circuit diagram on page 9. Measured with load; for the whole device; all channels off Add IST, if IST > 0 Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation. If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest VON(CL) Infineon Technologies AG 6 2003-Oct-01 BTS 5210G Parameter and Conditions, each of the four channels at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified Symbol Values min typ max Unit Reverse Battery Reverse battery voltage 17) Drain-source diode voltage (Vout > Vbb) IL = - 2.0 A, Tj = +150°C Diagnostic Characteristics Open load detection voltage -Vbb -VON --- -600 32 -- V mV V OUT(OL) 1 1.7 2.8 4.0 V Input and Status Feedback18) Input resistance (see circuit page 9) RI VIN(T+) VIN(T-) ∆ VIN(T) td(STon) td(STon) td(SToff) td(SToff) IIN(off) IIN(on) VST(high) VST(low) 2.5 -1.0 --30 --5 10 5.4 -- 4.0 --0.2 10 ----35 --- 6.0 2.5 --20 -500 20 20 60 -0.6 kΩ V V V µs µs µs µs µA µA V Input turn-on threshold voltage Input turn-off threshold voltage Input threshold hysteresis Status change after positive input slope19) with open load Status change after positive input slope19) with overload Status change after negative input slope with open load Status change after negative input slope19) with overtemperature Off state input current VIN = 0.4 V: On state input current VIN = 5 V: Status output (open drain) Zener limit voltage IST = +1.6 mA: ST low voltage IST = +1.6 mA: 17) Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Power dissipation is higher compared to normal operating conditions due to the voltage drop across the drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 4 and circuit page 9). 18) If ground resistors R GND are used, add the voltage drop across these resistors. 19) not subject to production test, specified by design Infineon Technologies AG 7 2003-Oct-01 BTS 5210G Truth Table ( each channel ) IN Normal operation Open load Overtemperature L H L H L H OUT L H Z H L L ST H H L20) H H L L = "Low" Level H = "High" Level X = don't care Z = high impedance, potential depends on external circuit Status signal valid after the time delay shown in the timing diagrams Parallel switching of channel 1 and 2 is easily possible by connecting the inputs and outputs in parallel (see truth table). If switching channel 1 to 2 in parallel, the status outputs ST1 and ST2 have to be configured as a 'Wired OR' function with a single pull-up resistor. Terms Ibb V bb I IN1 I IN2 I ST1 VIN1 V IN2 V I ST2 ST1 V ST2 3 5 4 6 1,7,8,14 Leadframe IN1 IN2 ST1 ST2 GND 2 I R GND GND V OUT2 Vbb OUT1 PROFET OUT2 9,10 V ON1 V ON2 12,13 I L1 I L2 V OUT1 Leadframe (Vbb) is connected to pin 1,7,8,14 External RGND optional; single resistor RGND = 150 Ω for reverse battery protection up to the max. operating voltage. 20) L, if potential at the Output exceeds the OpenLoad detection voltage Infineon Technologies AG 8 2003-Oct-01 BTS 5210G Input circuit (ESD protection), IN1 or IN2 R IN I Overvolt. and reverse batt. protection + 5V + Vbb V IN R ST RI Logic R ST ST V Z1 Z2 ESD-ZD I GND I I OUT The use of ESD zener diodes as voltage clamp at DC conditions is not recommended. GND R GND Signal GND R Load Load GND Status output, ST1 or ST2 +5V R ST(ON) ST VZ1 = 6.1 V typ., VZ2 = 47 V typ., RGND = 150 Ω, RST= 15 kΩ, RI= 3.5 kΩ typ. In case of reverse battery the load current has to be limited by the load. Temperature protection is not active GND ESDZD Open-load detection, OUT1 or OUT2 OFF-state diagnostic condition: Open Load, if VOUT > 3 V typ.; IN low V ESD-Zener diode: 6.1 V typ., max 0.3 mA; RST(ON) < 375 Ω at 1.6 mA. The use of ESD zener diodes as voltage clamp at DC conditions is not recommended. bb Inductive and overvoltage output clamp, OUT1 or OUT2 +Vbb VZ V R EXT OFF V OUT Logic unit ON Open load detection OUT Signal GND GND disconnect Power GND VON clamped to VON(CL) = 47 V typ. IN Vbb PROFET OUT ST GND V bb V IN V ST V GND Any kind of load. In case of IN = high is VOUT ≈ VIN - VIN(T+). Due to VGND > 0, no VST = low signal available. Infineon Technologies AG 9 2003-Oct-01 BTS 5210G GND disconnect with GND pull up Inductive load switch-off energy dissipation E bb IN Vbb PROFET ST GND OUT E AS Vbb PROFET OUT ELoad IN = V V bb IN ST V V GND ST GND ZL { R L L EL ER Any kind of load. If VGND > VIN - VIN(T+) device stays off Due to VGND > 0, no VST = low signal available. Energy stored in load inductance: EL = 1/2·L·I L While demagnetizing load inductance, the energy dissipated in PROFET is EAS= Ebb + EL - ER= VON(CL)·iL(t) dt, with an approximate solution for RL > 0 Ω: 2 Vbb disconnect with energized inductive load high IN Vbb PROFET OUT ST GND EAS= IL· L (V + |VOUT(CL)|) 2·RL bb ln (1+ |V IL·RL OUT(CL)| ) V Maximum allowable load inductance for a single switch off (one channel)4) bb L = f (IL ); Tj,start = 150°C, Vbb = 12 V, RL = 0 Ω ZL [mH] 1000 For inductive load currents up to the limits defined by ZL (max. ratings and diagram on page 10) each switch is protected against loss of Vbb. Consider at your PCB layout that in the case of Vbb disconnection with energized inductive load all the load current flows through the GND connection. 100 10 1 1 2 3 4 5 6 IL [A] Infineon Technologies AG 10 2003-Oct-01 BTS 5210G Typ. on-state resistance RON = f (Vbb,Tj ); IL = 2 A, IN = high RON [mOhm] 240 Tj = 150°C 180 120 25°C -40°C 60 0 5 7 9 11 30 40 Vbb [V] Typ. standby current Ibb(off) = f (Tj ); Vbb = 9...34 V, IN1,2 = low Ibb(off) [µA] 45 40 35 30 25 20 15 10 5 0 -50 0 50 100 150 200 Tj [°C] Infineon Technologies AG 11 2003-Oct-01 BTS 5210G Timing diagrams All channels are symmetric and consequently the diagrams are valid for channel 1 to channel 4 Figure 1a: Vbb turn on: IN1 Figure 2b: Switching a lamp: IN IN2 V bb V ST OUT1 V OUT V OUT2 ST1 open drain I L ST2 open drain t t Figure 2a: Switching a resistive load, turn-on/off time and slew rate definition: Figure 3a: Turn on into short circuit: shut down by overtemperature, restart by cooling IN1 o ther channel: norm al operation IN VOUT I 90% t on dV/dton 10% t dV/dtoff L1 I L(lim) I L(SCr) off t off(SC) IL ST t t Heating up of the chip may require several milliseconds, depending on external conditions Infineon Technologies AG 12 2003-Oct-01 BTS 5210G Figure 3b: Turn on into short circuit: shut down by overtemperature, restart by cooling (two parallel switched channels 1 and 2) IN1/2 Figure 5a: Open load: detection in OFF-state, turn on/off to open load Open load of channel 1; other channels normal operation IN1 I L1 +I L2 VOUT1 2xIL(lim) I L1 I L(SCr) t ST1/2 ST off(SC) 10µs 500µs t ST1 and ST2 have to be configured as a 'Wired OR' function ST1/2 with a single pull-up resistor. Figure 4a: Overtemperature: Reset if Tj