IPU05N03LA

IPD05N03LA IPS05N03LA IPF05N03LA IPU05N03LA OptiMOS®2 Power-Transistor Features • Ideal for high-frequency dc/dc converters • Qualified according to JEDEC1) for target application • N-channel, logic level • Excellent gate charge x R DS(on) product (FOM) • Superior thermal resistance • 175 °C operating temperature Product Summary V DS R DS(on),max (SMD version) ID 25 5.1 50 V mΩ A Type IPD05N03LA IPF05N03LA IPS05N03LA IPU05N03LA Type IPD05N03LA IPF05N03LA Package IPS05N03LA Ordering Code IPU05N03LA Marking Package P-TO252-3-11 P-TO252-3-11 P-TO252-3-23 Q67042-S4144 P-TO251-3-11 05N03LA P-TO251-3-21 Ordering Code Q67042-S4144 P-TO252-3-23 Q67042-S Q67042-S4194 Q67042-S 05N03LA Q67042-S4230 Marking 05N03LA 05N03LA P-TO251-3-11 05N03LA Q67042-S4244 05N03LA 05N03LA P-TO251-3-21 Q67042-S4230 05N03LA Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Continuous drain current Symbol Conditions ID T C=25 °C2) T C=100 °C Pulsed drain current Avalanche energy, single pulse Reverse diode d v /dt Gate source voltage4) Power dissipation Operating and storage temperature IEC climatic category; DIN IEC 68-1 I D,pulse E AS dv /dt V GS P tot T j, T stg T C=25 °C T C=25 °C3) I D=45 A, R GS=25 Ω I D=50 A, V DS=20 V, di /dt =200 A/µs, T j,max=175 °C Value 50 50 350 300 6 ±20 94 -55 ... 175 55/175/56 mJ kV/µs V W °C Unit A Rev. 1.7 page 1 2004-05-19 IPD05N03LA IPS05N03LA Parameter Symbol Conditions min. Thermal characteristics Thermal resistance, junction - case SMD version, device on PCB R thJC R thJA minimal footprint 6 cm2 cooling area5) Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D=1 mA V GS(th) I DSS V DS=V GS, I D=50 µA V DS=25 V, V GS=0 V, T j=25 °C V DS=25 V, V GS=0 V, T j=125 °C Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=4.5 V, I D=30 A V GS=4.5 V, I D=30 A, SMD version V GS=10 V, I D=30 A V GS=10 V, I D=30 A, SMD version Gate resistance Transconductance RG g fs |V DS|>2|I D|R DS(on)max, I D=30 A 25 1.2 1.6 0.1 Values typ. IPF05N03LA IPU05N03LA Unit max. 1.6 75 50 K/W 2 1 V µA 31 10 10 6.9 6.7 4.4 4.2 1 62 100 100 8.6 8.4 5.3 5.1 Ω S nA mΩ 1) J-STD20 and JESD22 Current is limited by bondwire; with an R thJC=1.6 K/W the chip is able to carry 106 A. See figure 3 T j,max=150 °C and duty cycle D