IPU06N03LA

IPD06N03LA IPU06N03LA OptiMOS®2 Power-Transistor Features • Ideal for high-frequency dc/dc converters • Qualified according to JEDEC for target application • N-channel • Logic level • Excellent gate charge x R DS(on) product (FOM) • Very low on-resistance R DS(on) • Superior thermal resistance • 175 °C operating temperature • dv /dt rated 1) Product Summary V DS R DS(on),max (SMD version) ID 25 5.7 50 V mΩ A P-TO252-3-11 P-TO251-3-21 Type IPD06N03LA IPU06N03LA Package P-TO252-3-11 P-TO251-3-21 Ordering Code Q67042-S4149 Q67042-S4145 Marking 06N03LA 06N03LA Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Continuous drain current Symbol Conditions ID T C=25 °C2) T C=100 °C Pulsed drain current Avalanche energy, single pulse Reverse diode dv /dt Gate source voltage4) Power dissipation Operating and storage temperature IEC climatic category; DIN IEC 68-1 1) Value 50 50 350 225 6 ±20 Unit A I D,pulse E AS dv /dt V GS P tot T j, T stg T C=25 °C3) I D=45 A, R GS=25 Ω I D=50 A, V DS=20 V, di /dt =200 A/µs, T j,max=175 °C mJ kV/µs V W °C T C=25 °C 83 -55 ... 175 55/175/56 J-STD20 and JESD22 Rev. 1.4 page 1 2004-02-04 IPD06N03LA IPU06N03LA Parameter Symbol Conditions min. Thermal characteristics Thermal resistance, junction - case SMD version, device on PCB R thJC R thJA minimal footprint 6 cm2 cooling area5) Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D=1 mA V GS(th) I DSS V DS=V GS, I D=40 µA V DS=25 V, V GS=0 V, T j=25 °C V DS=25 V, V GS=0 V, T j=125 °C Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=4.5 V, I D=30 A V GS=4.5 V, I D=30 A, SMD version V GS=10 V, I D=30 A V GS=10 V, I D=30 A, SMD version Gate resistance Transconductance RG g fs |V DS|>2|I D|R DS(on)max, I D=30 A 25 1.2 1.6 0.1 2 1 µA V 1.8 75 50 K/W Values typ. max. Unit 29 10 10 7.7 7.5 5.0 4.8 1 59 100 100 9.6 9.4 5.9 5.7 Ω S nA mΩ 2) Current is limited by bondwire; with an R thJC=1.8 K/W the chip is able to carry 94 A. See figure 3 T j,max=150 °C and duty cycle D