IPU09N03LA

IPD09N03LA IPS09N03LA IPF09N03LA IPU09N03LA OptiMOS®2 Power-Transistor Features • Ideal for high-frequency dc/dc converters • Qualified according to JEDEC1) for target application • N-channel, logic level • Excellent gate charge x R DS(on) product (FOM) • Superior thermal resistance • 175 °C operating temperature Product Summary V DS R DS(on),max (SMD version) ID 25 8.6 50 V mΩ A Type IPD09N03LA IPF09N03LA IPS09N03LA IPU09N03LA Package Ordering Code Marking P-TO252-3-11 Q67042-S4154 09N03LA P-TO252-3-23 Q67042-S4199 09N03LA P-TO251-3-11 Q67042-S4246 09N03LA P-TO251-3-21 Q67042-S4155 09N03LA Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Continuous drain current Symbol Conditions ID T C=25 °C2) T C=100 °C Pulsed drain current Avalanche energy, single pulse Reverse diode d v /dt Gate source voltage4) Power dissipation Operating and storage temperature IEC climatic category; DIN IEC 68-1 I D,pulse E AS dv /dt V GS P tot T j, T stg T C=25 °C T C=25 °C3) I D=45 A, R GS=25 Ω I D=50 A, V DS=20 V, di /dt =200 A/µs, T j,max=175 °C Value 50 45 350 75 6 ±20 63 -55 ... 175 55/175/56 mJ kV/µs V W °C Unit A Rev. 1.7 page 1 2004-05-19 IPD09N03LA IPS09N03LA Parameter Symbol Conditions min. Thermal characteristics Thermal resistance, junction - case SMD version, device on PCB R thJC R thJA minimal footprint 6 cm2 cooling area5) Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D=1 mA V GS(th) I DSS V DS=V GS, I D=20 µA V DS=25 V, V GS=0 V, T j=25 °C V DS=25 V, V GS=0 V, T j=125 °C Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=4.5 V, I D=30 A V GS=4.5 V, I D=30 A, SMD version V GS=10 V, I D=30 A V GS=10 V, I D=30 A, SMD version Gate resistance Transconductance RG g fs |V DS|>2|I D|R DS(on)max, I D=30 A 25 1.2 1.6 0.1 Values typ. IPF09N03LA IPU09N03LA Unit max. 2.4 75 50 K/W 2 1 V µA 23 10 10 12 11.8 7.4 7.2 1 46 100 100 15 14.8 8.8 8.6 Ω S nA mΩ 1) J-STD20 and JESD22 Current is limited by bondwire; with an R thJC=2.4 K/W the chip is able to carry 67 A. See figure 3 T j,max=150 °C and duty cycle D