IPU135N08N3G

IPU135N08N3 G OptiMOS(TM)3 Power-Transistor Features • Ideal for high frequency switching and sync. rec. • Optimized technology for DC/DC converters • Excellent gate charge x R DS(on) product (FOM) • N-channel, normal level • 100% avalanche tested • Pb-free plating; RoHS compliant • Qualified according to JEDEC1) for target applications Product Summary V DS R DS(on),max ID 80 13.5 50 V mΩ A Type IPU135N08N3 G 1 23 Package Marking PG-TO251-3 135N08N Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Continuous drain current Symbol Conditions ID T C=25 °C2) T C=100 °C Pulsed drain current2) Avalanche energy, single pulse3) Gate source voltage Power dissipation Operating and storage temperature IEC climatic category; DIN IEC 68-1 1) 2) Value 50 39 200 40 ±20 Unit A I D,pulse E AS V GS P tot T j, T stg T C=25 °C I D=50 A, R GS=25 Ω mJ V W °C T C=25 °C 79 -55 ... 175 55/175/56 J-STD20 and JESD22 See figure 3 for more detailed information 3) See figure 13 for more detailed information Rev. 2.1 page 1 2008-11-04 IPU135N08N3 G Parameter Symbol Conditions min. Values typ. max. Unit Thermal characteristics Thermal resistance, junction - case Thermal resistance, junction - ambient R thJC R thJA minimal footprint 6 cm2 cooling area4) 1.9 75 50 K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D=1 mA V GS(th) I DSS V DS=V GS, I D=33 µA V DS=80 V, V GS=0 V, T j=25 °C V DS=80 V, V GS=0 V, T j=125 °C Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=10 V, I D=50 A V GS=6 V, I D=25 A Gate resistance Transconductance RG g fs |V DS|>2|I D|R DS(on)max, I D=50 A 80 2 2.8 0.1 3.5 1 µA V 26 10 1 11.3 15.5 2 51 100 100 13.5 26 Ω S nA mΩ 4) 2 Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Rev. 2.1 page 2 2008-11-04 IPU135N08N3 G Parameter Symbol Conditions min. Values typ. max. Unit Dynamic characteristics Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics 5) Gate to source charge Gate to drain charge Switching charge Gate charge total Gate plateau voltage Output charge Reverse Diode Diode continous forward current Diode pulse current Diode forward voltage Reverse recovery time Reverse recovery charge 5) C iss C oss C rss t d(on) tr t d(off) tf V DD=40 V, V GS=10 V, I D=45 A, R G=1.6 Ω V GS=0 V, V DS=40 V, f =1 MHz - 1300 353 15 12 35 18 5 1730 469 - pF ns Q gs Q gd Q sw Qg V plateau Q oss V DD=40 V, V GS=0 V V DD=40 V, I D=50 A, V GS=0 to 10 V - 7 4 8 19 5.6 25 25 34 nC V nC IS I S,pulse V SD t rr Q rr T C=25 °C V GS=0 V, I F=50 A, T j=25 °C V R=40 V, I F=45A, di F/dt =100 A/µs - 1.0 50 74 50 200 1.2 - A V ns nC See figure 16 for gate charge parameter definition Rev. 2.1 page 3 2008-11-04 IPU135N08N3 G 1 Power dissipation P tot=f(T C) 2 Drain current I D=f(T C); V GS≥10 V 80 60 50 60 40 P tot [W] 40 I D [A] 0 50 100 150 200 30 20 20 10 0 0 0 50 100 150 200 T C [°C] T C [°C] 3 Safe operating area I D=f(V DS); T C=25 °C; D =0 parameter: t p 103 limited by on-state resistance 1 µs 4 Max. transient thermal impedance Z thJC=f(t p) parameter: D =t p/T 101 102 10 µs 100 0.5 Z thJC [K/W] I D [A] 0.2 0.1 0.05 0.02 -1 100 µs 1 ms 10 1 10 ms DC 10 0.01 single pulse 100 10 -1 10-2 10 0 10 1 10 2 10-5 10-4 10-3 10-2 10-1 100 V DS [V] t p [s] Rev. 2.1 page 4 2008-11-04 IPU135N08N3 G 5 Typ. output characteristics I D=f(V DS); T j=25 °C parameter: V GS 200 10 V 8V 6 Typ. drain-source on resistance R DS(on)=f(I D); T j=25 °C parameter: V GS 32 5V 5.5 V 6V 6.5 V 7V 28 160 24 7V R DS(on) [mΩ ] 120 20 I D [A] 6.5 V 16 8V 80 6V 12 10 V 8 40 5.5 V 5V 4.5 V 4 0 0 1 2 3 4 5 0 0 40 80 120 160 200 V DS [V] I D [A] 7 Typ. transfer characteristics I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j 180 8 Typ. forward transconductance g fs=f(I D); T j=25 °C 100 150 80 120 60 90 g fs [S] 40 20 175 °C 25 °C I D [A] 60 30 0 0 2 4 6 8 0 0 20 40 60 80 100 120 140 V GS [V] I D [A] Rev. 2.1 page 5 2008-11-04 IPU135N08N3 G 9 Drain-source on-state resistance R DS(on)=f(T j); I D=50 A; V GS=10 V 10 Typ. gate threshold voltage V GS(th)=f(T j); V GS=V DS parameter: I D 30 4 25 3 20 330 µA R DS(on) [mΩ ] 33 µA max 15 typ V GS(th) [V] 100 140 180 2 10 1 5 0 -60 -20 20 60 0 -60 -20 20 60 100 140 180 T j [°C] T j [°C] 11 Typ. capacitances C =f(V DS); V GS=0 V; f =1 MHz 12 Forward characteristics of reverse diode I F=f(V SD) parameter: T j 104 103 Ciss 103 Coss 102 175 °C 25 °C C [pF] 10 2 I F [A] 175 °C, max Crss 25 °C, max 10 101 1 100 0 20 40 60 80 100 0 0.5 1 1.5 2 V DS [V] V SD [V] Rev. 2.1 page 6 2008-11-04 IPU135N08N3 G 13 Avalanche characteristics I AS=f(t AV); R GS=25 Ω parameter: T j(start) 100 14 Typ. gate charge V GS=f(Q gate); I D=50 A pulsed parameter: V DD 12 40 V 10 16 V 150 °C 100 °C 25 °C 64 V 8 10 V GS [V] 0.1 1 10 100 1000 I AV [A] 6 4 2 1 0 0 5 10 15 20 t AV [µs] Q gate [nC] 15 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=1 mA 16 Gate charge waveforms 90 V GS 85 Qg 80 V BR(DSS) [V] 75 V g s(th) 70 65 Q g(th) Q gs -60 -20 20 60 100 140 180 Q sw Q gd Q g ate 60 T j [°C] Rev. 2.1 page 7 2008-11-04 IPU135N08N3 G PG-TO251-3: Outline Rev. 2.1 page 8 2008-11-04 IPU135N08N3 G Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.1 page 9 2008-11-04