IPU13N03LA

IPD13N03LA G IPS13N03LA G IPF13N03LA G IPU13N03LA G OptiMOS®2 Power-Transistor Features • Ideal for high-frequency dc/dc converters • Qualified according to JEDEC1) for target applications • N-channel, logic level • Excellent gate charge x R DS(on) product (FOM) • Superior thermal resistance • 175 °C operating temperature • Pb-free lead plating; RoHS compliant Product Summary V DS R DS(on),max ID 25 12.8 30 V mΩ A Type IPD13N03LA IPF13N03LA IPS13N03LA IPU13N03LA Package Marking P-TO252-3-11 13N03LA P-TO252-3-23 13N03LA P-TO251-3-11 13N03LA P-TO251-3-1 13N03LA Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Continuous drain current Symbol Conditions ID T C=25 °C2) T C=100 °C Pulsed drain current Avalanche energy, single pulse Reverse diode d v /dt Gate source voltage4) Power dissipation Operating and storage temperature IEC climatic category; DIN IEC 68-1 I D,pulse E AS dv /dt V GS P tot T j, T stg T C=25 °C T C=25 °C3) I D=24 A, R GS=25 Ω I D=30 A, V DS=20 V, di /dt =200 A/µs, T j,max=175 °C Value 30 30 210 60 6 ±20 46 -55 ... 175 55/175/56 mJ kV/µs V W °C Unit A Rev. 2.0 page 1 2006-05-11 IPD13N03LA G IPS13N03LA G Parameter Symbol Conditions min. Thermal characteristics Thermal resistance, junction - case SMD version, device on PCB R thJC R thJA Values typ. IPF13N03LA G IPU13N03LA G Unit max. minimal footprint 6 cm2 cooling area5) 3.2 75 50 K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D=1 mA V GS(th) I DSS V DS=V GS, I D=20 µA V DS=25 V, V GS=0 V, T j=25 °C V DS=25 V, V GS=0 V, T j=125 °C Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=4.5 V, I D=20 A V GS=10 V, I D=30 A Gate resistance Transconductance RG g fs |V DS|>2|I D|R DS(on)max, I D=30 A 25 1.2 1.6 0.1 2 1 µA V 18 10 10 17.5 10.7 0.9 36 100 100 21.9 12.8 Ω S nA mΩ 1) J-STD20 and JESD22 Current is limited by bondwire; with an R thJC=3.2 K/W the chip is able to carry 47 A. See figure 3 T j,max=150 °C and duty cycle D