SP0002-19062

IPB100N04S2L-03 IPP100N04S2L-03 OptiMOS® Power-Transistor Features • N-channel Logic Level - Enhancement mode • Automotive AEC Q101 qualified • MSL1 up to 260°C peak reflow • 175°C operating temperature • Green package (lead free) • Ultra low Rds(on) • 100% Avalanche tested Product Summary V DS R DS(on),max (SMD version) ID 40 3.0 100 V mΩ A PG-TO263-3-2 PG-TO220-3-1 Type IPB100N04S2L-03 IPP100N04S2L-03 Package PG-TO263-3-2 PG-TO220-3-1 Ordering Code SP0002-19065 SP0002-19062 Marking PN04L03 PN04L03 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Continuous drain current1) Symbol ID Conditions T C=25 °C, V GS=10 V T C=100 °C, V GS=10 V2) Pulsed drain current2) Avalanche energy, single pulse2) Gate source voltage4) Power dissipation Operating and storage temperature I D,pulse E AS V GS P tot T j, T stg T C=25 °C T C=25 °C I D=80A Value 100 100 400 810 ±20 300 -55 ... +175 mJ V W °C Unit A Rev. 1.0 page 1 2006-03-02 IPB100N04S2L-03 IPP100N04S2L-03 Parameter Symbol Conditions min. Thermal characteristics2) Thermal resistance, junction - case Thermal resistance, junction ambient, leaded SMD version, device on PCB R thJC R thJA R thJA minimal footprint 6 cm2 cooling area5) Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage V (BR)DSS V GS=0 V, I D= 1 mA V GS(th) V DS=V GS, I D=250 µA V DS=40 V, V GS=0 V, T j=25 °C V DS=40 V, V GS=0 V, T j=125 °C2) Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=4.5 V, I D=80 A, SMD version V GS=4.5 V, I D=80 A, SMD version Drain-source on-state resistance RDS(on) V GS=10 V, I D=80 A, V GS=10 V, I D=80 A, SMD version 40 1.2 1.6 2.0 V 0.5 62 62 40 K/W Values typ. max. Unit Zero gate voltage drain current I DSS - 0.01 1 µA - 1 1 3.2 100 100 4.4 nA mΩ - 2.9 2.4 2.1 4.1 3.3 3 mΩ Rev. 1.0 page 2 2006-03-02 IPB100N04S2L-03 IPP100N04S2L-03 Parameter Symbol Conditions min. Dynamic characteristics2) Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics2) Gate to source charge Gate to drain charge Gate charge total Gate plateau voltage Reverse Diode Diode continous forward current2) Diode pulse current2) Diode forward voltage IS I S,pulse V SD T C=25 °C V GS=0 V, I F=80 A, T j=25 °C V R=20 V, I F=I S, di F/dt =100 A/µs V R=20 V, I F=I S, di F/dt =100 A/µs 0.9 100 400 1.3 V A Q gs Q gd Qg V plateau V DD=32 V, I D=100 A, V GS=0 to 10 V 19 56 163 3.3 25 85 230 V nC C iss C oss Crss t d(on) tr t d(off) tf V DD=20 V, V GS=10 V, I D=80 A, R G=1.1 Ω V GS=0 V, V DS=25 V, f =1 MHz 6000 2200 700 19 51 77 27 ns pF Values typ. max. Unit Reverse recovery time2) t rr - 80 100 ns Reverse recovery charge2) 1) Q rr - 150 190 nC Current is limited by bondwire; with an R thJC = 0.5K/W the chip is able to carry 220A at 25°C. For detailed information see Application Note ANPS071E at www.infineon.com/optimos 2) 3) Defined by design. Not subject to production test. See diagram 13 Qualified at -20V and +20V. 4) 5) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Rev. 1.0 page 3 2006-03-02 IPB100N04S2L-03 IPP100N04S2L-03 1 Power dissipation P tot = f(T C); V GS ≥ 4 V 2 Drain current I D = f(T C); V GS ≥ 10 V 350 120 300 100 250 80 P tot [W] 200 I D [A] 150 40 100 50 0 0 50 100 150 200 60 20 0 0 50 100 T C [°C] 150 200 T C [°C] 3 Safe operating area I D = f(V DS); T C = 25 °C; D = 0 parameter: t p 1000 4 Max. transient thermal impedance Z thJC = f(t p) parameter: D =t p/T 100 1 µs 0.5 10 µs 100 µs 100 1 ms 10-1 Z thJC [K/W] 0.1 I D [A] 0.05 10 10-2 0.01 1 0.1 1 10 100 10-3 10-7 single pulse 10-6 10-5 10-4 10-3 10-2 10-1 100 V DS [V] t p [s] Rev. 1.0 page 4 2006-03-02 IPB100N04S2L-03 IPP100N04S2L-03 5 Typ. output characteristics I D = f(V DS); T j = 25 °C parameter: V GS 300 6 Typ. drain-source on-state resistance R DS(on) = (I D); T j = 25 °C parameter: V GS 20 3V 18 250 4V 16 200 14 3.5 V 150 3.5 V R DS(on) [mΩ] 12 10 8 6 4 2 4V 4.5 V 10 V I D [A] 100 50 3V 0 0 2 4 2.5 V 0 6 8 10 0 20 40 60 80 100 120 V DS [V] I D [A] 7 Typ. transfer characteristics I D = f(V GS); V DS = 6V parameter: T j 200 180 160 140 8 Typ. Forward transconductance g fs = f(I D); T j = 25°C parameter: g fs 300 250 200 120 100 80 60 40 175 °C g fs [S] 25 °C -55 °C I D [A] 150 100 50 20 0 1 2 0 3 4 0 50 100 150 200 V GS [V] I D [A] Rev. 1.0 page 5 2006-03-02 IPB100N04S2L-03 IPP100N04S2L-03 9 Typ. Drain-source on-state resistance R DS(ON) = f(T j) parameter: I D = 80 A; VGS = 10 V 5 10 Typ. gate threshold voltage V GS(th) = f(T j); V GS = V DS parameter: I D 2.5 2 4 1250µA R DS(on) [mΩ] V GS(th) [V] 1.5 250µA 3 1 2 0.5 1 -60 -20 20 60 100 140 180 0 -60 -20 20 60 100 140 180 T j [°C] T j [°C] 11 Typ. capacitances C = f(V DS); V GS = 0 V; f = 1 MHz 12 Typical forward diode characteristicis IF = f(VSD) parameter: T j 104 Ciss 103 Coss 102 C [pF] 103 Crss I F [A] 101 175 °C 25 °C 102 0 5 10 15 20 25 30 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 V DS [V] V SD [V] Rev. 1.0 page 6 2006-03-02 IPB100N04S2L-03 IPP100N04S2L-03 13 Typical avalanche energy E AS = f(T j) parameter: I D=80A 900 800 10 700 600 8 12 32V 14 Typ. gate charge V GS = f(Q gate); I D = 80 A pulsed 8V E AS [mJ] V GS [V] 500 400 300 200 6 4 2 100 0 25 75 125 175 0 0 40 80 120 160 T j [°C] Q gate [nC] 15 Typ. drain-source breakdown voltage V BR(DSS) = f(T j); I D = 1 mA 16 Gate charge waveforms 48 V GS 46 Qg 44 V BR(DSS) [V] 42 40 38 Q gs Q gd Q gate 36 -60 -20 20 60 100 140 180 T j [°C] Rev. 1.0 page 7 2006-03-02 IPB100N04S2L-03 IPP100N04S2L-03 Published by Infineon Technologies AG St.-Martin-Straße 53 D-81541 München © Infineon Technologies AG 2004 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices, please contact your nearest Infineon Technologies Office (www.infineon.com) Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact your nearest Infineon Technologies Office. effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.0 page 8 2006-03-02