SPB17N80C3_07

SPB17N80C3 CoolMOS® Power Transistor Features • new revolutionary high voltage technology • Extreme dv/dt rated • High peak current capability • Qualified according to JEDEC1) for target applications • Pb-free lead plating; RoHS compliant • Ultra low gate charge • Ultra low effective capacitances Product Summary V DS R DS(on)max @ Tj = 25°C Q g,typ 800 0.29 91 V Ω nC PG-TO263 CoolMOS C3 designed for: • Industrial application with high DC bulk voltage • Switching Application (Active Clamp Forward Topology) Type SPB17N80C3 Package PG-TO263 Marking 17N80C3 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Continuous drain current Symbol Conditions ID T C=25 °C T C=100 °C Pulsed drain current2) Avalanche energy, single pulse Avalanche energy, repetitive t AR2),3) Avalanche current, repetitive t AR2),3) MOSFET dv /dt ruggedness Gate source voltage I D,pulse E AS E AR I AR dv /dt V GS V DS=0…640 V static AC (f >1 Hz) Power dissipation Operating and storage temperature P tot T j, T stg T C=25 °C T C=25 °C I D=3.4 A, V DD=50 V I D=17 A, V DD=50 V Value 17 11 51 670 0.5 17 50 ±20 ±30 227 -55 ... 150 W °C A V/ns V mJ Unit A Rev. 2.3 page 1 2007-11-28 SPB17N80C3 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Continuous diode forward current Diode pulse current 2) Parameter Symbol Conditions IS I S,pulse T C=25 °C Value 17 51 Values min. Thermal characteristics Thermal resistance, junction - case R thJC R thJA Thermal resistance, junction ambient SMD version, device on PCB, minimal footprint SMD version, device on PCB, 6 cm2 cooling area4) T sold 1.6 mm (0.063 in.) from case for 10 s 0.55 62 K/W typ. max. Unit Unit A Symbol Conditions - 35 - Soldering temperature, reflow soldering, MSL1 - - 260 °C Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage Avalanche breakdown voltage Gate threshold voltage V (BR)DSS V GS=0 V, I D=250 µA V (BR)DS V GS(th) V GS=0 V, I D=17 A V DS=V GS, I D=1.0 mA V DS=800 V, V GS=0 V, T j=25 °C V DS=800 V, V GS=0 V, T j=150 °C Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=10 V, I D=11 A, T j=25 °C V GS=10 V, I D=11 A, T j=150 °C Gate resistance Rev. 2.3 RG f =1 MHz, open drain page 2 800 2.1 870 3 3.9 V Zero gate voltage drain current I DSS - - 25 µA - 150 0.25 100 0.29 nA Ω - 0.67 0.85 Ω 2007-11-28 SPB17N80C3 Parameter Symbol Conditions min. Dynamic characteristics Input capacitance Output capacitance Effective output capacitance, energy related5) Effective output capacitance, time related6) Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics Gate to source charge Gate to drain charge Gate charge total Gate plateau voltage Reverse Diode Diode forward voltage Reverse recovery time Reverse recovery charge Peak reverse recovery current 1) 2) Values typ. max. Unit C iss C oss C o(er) V GS=0 V, V DS=100 V, f =1 MHz - 2300 100 72 - pF V GS=0 V, V DS=0 V to 480 V C o(tr) t d(on) tr t d(off) tf V DD=400 V, V GS=0/10 V, I D=17 A, R G=4.7 Ω, Tj = 125°C 210 45 18 85 15 ns Q gs Q gd Qg V plateau V DD=640 V, I D=17 A, V GS=0 to 10 V - 12 48 91 5.5 177 - nC V V SD t rr Q rr I rrm V GS=0 V, I F=IS, T j=25 °C - 1 550 15 51 1.2 - V ns µC A V R=400 V, I F=I S, di F/dt =100 A/µs - J-STD20 and JESD22 Pulse width t p limited by T j,max Repetitive avalanche causes additional power losses that can be calculated as P AV=E AR*f. 3) 4) Device on 40mm*40mm*1.5 epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for drain connection. PCB is vertical without blown air C o(er) is a fixed capacitance that gives the same stored energy as C oss while V DS is rising from 0 to 80% V DSS. C o(tr) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. 5) 6) Rev. 2.3 page 3 2007-11-28 SPB17N80C3 1 Power dissipation P tot=f(T C) 2 Safe operating area I D=f(V DS); T C=25 °C; D =0 parameter: t p 240 102 limited by on-state resistance 200 10 µs 1 µs 160 101 100 µs 1 ms P tot [W] 120 I D [A] DC 10 ms 80 100 40 0 0 25 50 75 100 125 150 10-1 1 10 100 1000 T C [°C] V DS [V] 3 Max. transient thermal impedance ZthJC=f(tP) parameter: D=t p/T 100 4 Typ. output characteristics I D=f(V DS); T j=25 °C parameter: V GS 60 20 V 50 10 V 0.5 40 Z thJC [K/W] 0.2 10-1 0.1 0.05 0.02 I D [A] 30 6.5 V 20 6V 0.01 single pulse 5.5 V 10 5V 10-2 10-5 10-4 10-3 10-2 10-1 0 0 5 10 15 20 25 t p [s] V DS [V] Rev. 2.3 page 4 2007-11-28 SPB17N80C3 5 Typ. output characteristics I D=f(V DS); T j=150 °C parameter: V GS 35 20 V 6 Typ. drain-source on-state resistance R DS(on)=f(I D); T j=150 °C parameter: V GS 1.4 30 10 V 1.3 25 6V 1.2 20 R DS(on) [Ω ] 1.1 I D [A] 5.5 V 15 5V 1 10 4.5 V 0.9 4V 4.5 V 5V 6V 10 V 20 V 6.5 V 5 0.8 0 0 5 10 15 20 25 0.7 0 5 10 15 20 V DS [V] I D [A] 7 Drain-source on-state resistance R DS(on)=f(T j); I D=11 A; V GS=10 V 8 Typ. transfer characteristics I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j 0.8 60 50 0.6 40 25 °C R DS(on) [Ω ] 0.4 98 % I D [A] 30 150 °C typ 20 0.2 10 0 -60 -20 20 60 100 140 180 0 0 2 4 6 8 10 T j [°C] V GS [V] Rev. 2.3 page 5 2007-11-28 SPB17N80C3 9 Typ. gate charge V GS=f(Q gate); I D=17 A pulsed parameter: V DD 10 10 Forward characteristics of reverse diode I F=f(V SD) parameter: T j 102 150°C (98%) 8 160 V 640 V 25 °C 101 150 °C 25°C (98°C) 6 V GS [V] 4 100 2 I F [A] 0 0 20 40 60 80 100 10-1 0 0.5 1 1.5 2 Q gate [nC] V SD [V] 11 Avalanche energy E AS=f(T j); I D=3.4 A; V DD=50 V 12 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=0.25 mA 700 960 600 920 500 880 E AS [mJ] 400 V BR(DSS) [V] 25 50 75 100 125 150 840 300 800 200 760 100 720 0 680 -60 -20 20 60 100 140 180 T j [°C] T j [°C] Rev. 2.3 page 6 2007-11-28 SPB17N80C3 13 Typ. capacitances C =f(V DS); V GS=0 V; f =1 MHz 14 Typ. Coss stored energy E oss= f(V DS) 104 Ciss 18 16 14 12 103 E oss [µJ] C [pF] 102 Coss 10 8 6 101 Crss 4 2 100 0 100 200 300 400 500 0 0 100 200 300 400 500 600 700 800 V DS [V] V DS [V] Rev. 2.3 page 7 2007-11-28 SPB17N80C3 Definition of diode switching characteristics Rev. 2.3 page 8 2007-11-28 SPB17N80C3 PG-TO263: Outline Rev. 2.3 page 9 2007-11-28 Published by Infineon Technologies AG 81726 Munich, Germany © 2007 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typica values stated herein and/or any information regarding the application of the device Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the use or other persons may be endangered. Rev. 2.3 page 10 2007-11-28