SPD04P10PLG

SPD04P10PL G SIPMOS® Power-Transistor Features • P-Channel • Enhancement mode • Logic level • Avalanche rated • Pb-free lead plating; RoHS compliant Product Summary V DS R DS(on),max ID -100 850 -4.2 V mΩ A PG-TO-252-3 Type SPD04P10PL G Package PG-TO252-3 Marking 04P10PL Lead free Yes Packing Non dry Tape and reel information 1000 pcs / reel Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Value steady state Continuous drain current ID T C=25 °C T C=100 °C Pulsed drain current Avalanche energy, single pulse Gate source voltage Power dissipation Operating and storage temperature ESD class Soldering temperature IEC climatic category; DIN IEC 68-1 I D,pulse E AS V GS P tot T j, T stg JESD22-A114-HBM T C=25 °C T C=25 °C I D=-4.2 A, R GS=25 Ω -4.2 3.0 -16.8 57 ±20 38 -55 ... 175 1A (250 V to 500 V) 260 °C 55/175/56 mJ V W °C A Unit Rev 1.5 page 1 2009-02-16 SPD04P10PL G Parameter Symbol Conditions min. Thermal characteristics Thermal resistance, junction - soldering point Thermal resistance, junction - ambient R thJC minimal footprint, steady state 6 cm2 cooling area1), steady state Values typ. max. Unit - - 3.9 K/W R thJA - - 75 - - 50 Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics V (BR)DSS V GS=0 V, I D=-250 mA Drain-source breakdown voltage -100 - - V Gate threshold voltage V GS(th) V DS=V GS, I D=-380 µA V DS=-100 V, V GS=0 V, T j=25 °C V DS=-100 V, V GS=0 V, T j=150 °C -1 -1.5 -2 Zero gate voltage drain current I DSS - -0.1 -1 µA - -10 -10 787 -100 -100 1050 nA mΩ Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=-20 V, V DS=0 V V GS=-4.5 V, I D=2.75 A V GS=-10 V, I D=-3.0 A |V DS|>2|I D|R DS(on)max, I D=-3.0 A - 550 850 Transconductance g fs 1.5 3.0 - S 1) 2 Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Rev 1.5 page 2 2009-02-16 SPD04P10PL G Parameter Symbol Conditions min. Dynamic characteristics Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics 2) Gate to source charge Gate to drain charge Gate charge total Gate plateau voltage Reverse Diode Diode continuous forward current Diode pulse current Diode forward voltage Reverse recovery time Reverse recovery charge IS I S,pulse V SD t rr Q rr V R=50 V, I F=|I S|, di F/dt =100 A/µs T C=25 °C V GS=0 V, I F=-4.2 A, T j=25 °C 0.94 68 178 -4.2 16.8 1.2 85 223 V ns nC A Q gs Q gd Qg V plateau V DD=-80 V, I D=-4.2 A, V GS=0 to -10 V 1.1 4.6 12 4.1 1.5 6.9 16 V nC C iss C oss C rss t d(on) tr t d(off) tf V DD=-50 V, V GS=10 V, I D=-4.2 A, R G=6 Ω V GS=0 V, V DS=-25 V, f =1 MHz 280 70 34 4.6 5.7 18 5.0 372 94 51 6.9 8.6 27 7.5 ns pF Values typ. max. Unit 2) See figure 16 for gate charge parameter definition Rev 1.5 page 3 2009-02-16 SPD04P10PL G 1 Power dissipation P tot=f(T C) 2 Drain current I D=f(T C); |V GS|≥10 V 40 4.5 4 3.5 3 35 30 25 P tot [W] 20 -I D [A] 2.5 2 1.5 1 0.5 0 15 10 5 0 0 40 80 120 160 0 40 80 120 160 T C [°C] T C [°C] 3 Safe operating area I D=f(V DS); T C=25 °C; D =0 parameter: t p 102 4 Max. transient thermal impedance Z thJC=f(t p) parameter: D =t p/T 101 1 µs 10 µs 0.5 101 -I D [A] 100 µs Z thJS [K/W] 100 0.2 1 ms 100 limited by on-state resistance 0.1 10 ms DC 0.05 0.02 0.01 single pulse 10 -1 10 100 101 102 103 -1 10-5 10-4 10-3 10-2 10-1 100 -V DS [V] t p [s] Rev 1.5 page 4 2009-02-16 SPD04P10PL G 5 Typ. output characteristics I D=f(V DS); T j=25 °C parameter: V GS 8 -10 V -5 V -4.5 V 6 Typ. drain-source on resistance R DS(on)=f(I D); T j=25 °C parameter: V GS 1600 7 1400 -2.8 V 6 1200 -3 V -3.2 V -3.5 V -4 V -4.5 V R DS(on) [mΩ ] 5 -I D [A] -4 V 1000 4 800 -5 V 3 -3.5 V 2 -3.2 V -3 V 600 -10 V 1 -2.8 V 400 0 0 2 4 6 8 10 200 0 2 4 6 8 -V DS [V] -I D [A] 7 Typ. transfer characteristics I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j 8 8 Typ. forward transconductance g fs=f(I D); T j=25 °C 5 7 4 6 25 °C 5 3 -I D [A] 4 125 °C g fs [S] 2 1 0 0 2 4 6 8 0 2 4 6 8 3 2 1 0 -V GS [V] -I D [A] Rev 1.5 page 5 2009-02-16 SPD04P10PL G 9 Drain-source on-state resistance R DS(on)=f(T j); I D=-3 A; V GS=-10 V 10 Typ. gate threshold voltage V GS(th)=f(T j); V GS=V DS; I D=-380 µA 2500 3 2000 max. 2 R DS(on) [mΩ ] 98 % -V GS(th) [V] 1500 typ. 1000 1 min. 500 typ. 0 -60 -20 20 60 100 140 180 0 -60 -20 20 60 100 140 180 T j [°C] T j [°C] 11 Typ. capacitances C =f(V DS); V GS=0 V; f =1 MHz 12 Forward characteristics of reverse diode I F=f(V SD) parameter: T j 103 102 Ciss 101 25 °C, typ 175 °C, 98% 175 °C, typ C [pF] 102 I F [A] Coss 100 Crss 10-1 25 °C, 98% 101 0 5 10 15 20 25 10-2 0 0.5 1 1.5 -V DS [V] -V SD [V] Rev 1.5 page 6 2009-02-16 SPD04P10PL G 13 Avalanche characteristics I AS=f(t AV); R GS=25 Ω parameter: T j(start) 10 14 Typ. gate charge V GS=f(Q gate); I D=-4.2 A pulsed parameter: V DD 10 9 8 20 V 50 V 80 V 7 125 °C 100 °C 25 °C 6 -I AV [A] 1 - VGS [V] 1 10 100 1000 5 4 3 2 1 0.1 0 0 5 10 15 t AV [µs] - Qgate [nC] 15 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=-250 µA 16 Gate charge waveforms 130 V GS 120 Qg 110 -V BR(DSS) [V] 100 V g s(th) 90 80 Q g(th) Q sw Q g ate 70 -60 -20 20 60 100 140 180 Q gs Q gd T j [°C] Rev 1.5 page 7 2009-02-16 SPD04P10PL G Package Outline: PG-TO-252-3 • Logic level Rev 1.5 page 8 2009-02-16 SPD04P10PL G Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev 1.5 page 9 2009-02-16