SPI16N50C3

SPP16N50C3 SPI16N50C3, SPA16N50C3 Cool MOS™ Power Transistor Feature • New revolutionary high voltage technology • Ultra low gate charge • Periodic avalanche rated • Extreme dv/dt rated • Ultra low effective capacitances • Improved transconductance P-TO220-3-31 1 2 3 VDS @ Tjmax RDS(on) ID PG-TO220FP PG-TO262 560 0.28 16 PG-TO220 2 V Ω A 1 23 P-TO220-3-1 • PG-TO-220-3-31;-3-111: Fully isolated package (2500 VAC; 1 minute) Type SPP16N50C3 Package PG-TO220 Ordering Code Q67040-S4583 Marking 16N50C3 16N50C3 16N50C3 SPI16N50C3 PG-TO262 PG-TO220FP Q67040-S4582 SP000216351 SPA16N50C3 Maximum Ratings Parameter Symbol Value Unit SPA SPP_I Continuous drain current TC = 25 °C TC = 100 °C ID A 16 10 ID puls 161) 101) Pulsed drain current, tp limited by Tjmax Avalanche energy, single pulse ID=8, VDD=50V 48 48 A EAS 460 460 mJ Avalanche energy, repetitive tAR limited by Tjmax2) ID=16A, VDD=50V EAR IAR 0.64 16 0.64 16 A Avalanche current, repetitive tAR limited by Tjmax Gate source voltage VGS ±20 ±30 ±20 ±30 V Gate source voltage AC (f >1Hz) Power dissipation, TC = 25°C VGS Ptot 160 34 W Operating and storage temperature Reverse diode dv/dt 6) Tj , Tstg dv/dt -55...+150 15 °C V/ns Rev. 3.0 Page 1 2007-08-30 SPP16N50C3 SPI16N50C3, SPA16N50C3 Maximum Ratings Parameter Symbol Value Unit Drain Source voltage slope V DS = 400 V, ID = 16 A, Tj = 125 °C dv/dt 50 V/ns Thermal Characteristics Parameter Thermal resistance, junction - case Thermal resistance, junction - case, FullPAK Thermal resistance, junction - ambient, leaded Thermal resistance, junction - ambient, FullPAK Soldering temperature, wavesoldering 1.6 mm (0.063 in.) from case for 10s 3) Electrical Characteristics, at T j=25°C unless otherwise specified Parameter Symbol Conditions min. Drain-source breakdown voltage V(BR)DSS VGS=0V, ID=0.25mA Drain-Source avalanche breakdown voltage Gate threshold voltage Zero gate voltage drain current VGS(th) I DSS ID=675µA, VGS=VDS VDS=500V, VGS=0V, Tj=25°C Tj=150°C Symbol min. RthJC RthJC_FP RthJA RthJA FP Tsold - Values typ. max. 0.78 3.7 62 80 260 Unit K/W °C Values typ. 600 3 0.1 0.25 0.68 1.5 max. 3.9 500 2.1 - Unit V V(BR)DS VGS=0V, ID=16A µA 1 100 100 0.28 nA Ω Gate-source leakage current I GSS VGS=20V, VDS=0V VGS=10V, ID=10A Tj=25°C Tj=150°C Drain-source on-state resistance RDS(on) Gate input resistance RG f=1MHz, open drain Rev. 3.0 Page 2 2007-08-30 SPP16N50C3 SPI16N50C3, SPA16N50C3 Electrical Characteristics, at Tj = 25 °C, unless otherwise specified Parameter Characteristics Transconductance Input capacitance Output capacitance Reverse transfer capacitance Symbol Conditions min. Values typ. 14 1600 800 30 64 124 10 8 50 8 max. - Unit g fs Ciss Coss Crss V DS≥2*I D*RDS(on)max, ID=10A V GS=0V, V DS=25V, f=1MHz - S pF Effective output capacitance,4) Co(er) energy related Effective output capacitance,5) Co(tr) time related Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics Gate to source charge Gate to drain charge Gate charge total Gate plateau voltage Qgs Qgd Qg V GS=0V, V DS=0V to 400V td(on) tr td(off) tf V DD=380V, V GS=0/10V, ID=16A, RG =4.3Ω - ns VDD=380V, ID=16A - 7 36 66 5 - nC VDD=380V, ID=16A, VGS=0 to 10V V(plateau) VDD=380V, ID=16A V 1Limited only by maximum temperature 2Repetitve avalanche causes additional power losses that can be calculated as PAV=EAR*f. 3Soldering temperature for TO-263: 220°C, reflow 4C o(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% V DSS. 5C o(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 6I