SPP08N50C3_09

SPP08N50C3, SPI08N50C3 SPA08N50C3 Cool MOS™ Power Transistor Feature • New revolutionary high voltage technology • Ultra low gate charge • Periodic avalanche rated • Extreme dv/dt rated • Ultra low effective capacitances • Improved transconductance P-TO220-3-31 1 2 3 VDS @ Tjmax RDS(on) ID PG-TO220FP PG-TO262 560 0.6 7.6 V Ω A PG-TO220 • PG-TO-220-3-31;-3-111: Fully isolated package (2500 VAC; 1 minute) Type SPP08N50C3 SPI08N50C3 SPA08N50C3 Package PG-TO220 PG-TO262 PG-TO220FP Ordering Code Q67040-S4567 Q67040-S4568 SP000216306 Marking 08N50C3 08N50C3 08N50C3 Maximum Ratings Parameter Symbol ID Value SPP_I SPA Unit Continuous drain current TC = 25 °C TC = 100 °C A 7.6 4.6 7.61) 4.61) 22.8 230 0.5 7.6 ±20 ±30 Pulsed drain current, tp limited by Tjmax Avalanche energy, single pulse ID=5.5A, VDD=50V ID puls EAS EAR IAR VGS VGS Ptot 22.8 230 0.5 7.6 ±20 ±30 A mJ Avalanche energy, repetitive tAR limited by Tjmax2) ID=7.6A, VDD=50V Avalanche current, repetitive tAR limited by Tjmax Gate source voltage A V W Gate source voltage AC (f >1Hz) Power dissipation, TC = 25°C 83 32 Operating and storage temperature Reverse diode dv/dt 6) Rev. 2.91 Page 1 T j , Tstg dv/dt -55...+150 15 °C V/ns 2009-11-27 SPP08N50C3, SPI08N50C3 SPA08N50C3 Maximum Ratings Parameter Symbol Value Unit Drain Source voltage slope VDS = 400 V, ID = 7.6 A, Tj = 125 °C dv/dt 50 V/ns Thermal Characteristics Parameter Thermal resistance, junction - case Thermal resistance, junction - case, FullPAK Thermal resistance, junction - ambient, leaded Thermal resistance, junction - ambient, FullPAK Soldering temperature, wavesoldering 1.6 mm (0.063 in.) from case for 10s 3) Electrical Characteristics, at Tj=25°C unless otherwise specified Parameter Symbol Conditions min. Drain-source breakdown voltage V(BR)DSS VGS=0V, ID=0.25mA Drain-Source avalanche breakdown voltage Gate threshold voltage Zero gate voltage drain current VGS(th) IDSS ID=350µA, VGS =VDS V DS=500V, V GS=0V, Tj=25°C Tj=150°C Symbol min. RthJC RthJC_FP RthJA RthJA FP Tsold - Values typ. - Unit max. 1.5 3.9 62 80 260 °C K/W Values typ. 600 3 0.5 0.5 1.5 1.2 max. 3.9 500 2.1 - Unit V V(BR)DS VGS=0V, ID=7.6A µA 1 100 100 0.6 nA Ω Gate-source leakage current IGSS V GS=20V, V DS=0V V GS=10V, I D=4.6A Tj=25°C Tj=150°C Drain-source on-state resistance RDS(on) Gate input resistance RG f=1MHz, open drain Rev. 2.91 Page 2 2009-11-27 SPP08N50C3, SPI08N50C3 SPA08N50C3 Electrical Characteristics Parameter Transconductance Input capacitance Output capacitance Reverse transfer capacitance Symbol gfs Ciss Coss Crss Conditions min. VDS≥2*ID*R DS(on)max, ID=4.6A VGS=0V, VDS=25V, f=1MHz Values typ. 6 750 350 12 56 30 6 5 60 7 max. - Unit S pF Effective output capacitance,4) Co(er) energy related Effective output capacitance,5) Co(tr) time related Turn-on delay time Rise time Turn-off delay time Fall time VGS=0V, VDS=400 td(on) tr td(off) tf VDD=380V, VGS=0/10V, ID=7.6A, RG =12Ω - ns Gate Charge Characteristics Gate to source charge Qgs Gate to drain charge Gate charge total Gate plateau voltage Qgd Qg V DD=400V, ID=7.6A - 3 17 32 5 - nC V DD=400V, ID=7.6A, V GS=0 to 10V V(plateau) VDD=400V, ID=7.6A V 1Limited only by maximum temperature 2Repetitve avalanche causes additional power losses that can be calculated as P =E *f. AR AV 3Soldering temperature for TO-263: 220°C, reflow 4C 5C o(er) o(tr) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 6I