TCA965B

Window Discriminator TCA 965 B Preliminary Features q Bipolar IC q q q Two window settings – direct setting of lower and upper edge voltage (window edges) – indirect setting by window center voltage and half window width Adjustable hysteresis Digital outputs with open collectors for currents up to 50 mA Adjustable reference voltage VStab P-DIP-14-1 Type s TCA 965 B s Not for new design Ordering Code Q67000-A8338 Package P-DIP-14-1 The window discriminator compares an input voltage to a defined voltage window. The digital outputs show whether the input voltage is below, within or above this window. The TCA 965 B window discriminator is especially suitable as a tracking or compensating controller with a dead band in control engineering and for the selection of DC voltages within a certain tolerance of the required setpoint value in measurement engineering. When it is used as a Schmitt trigger, switching frequencies up to a typical value of 50 kHz are possible. Semiconductor Group 1 1998-02-10 TCA 965 B Functional Description Amplifier Amp 3 increases the voltage of the reference source R to VStab = 2 x VREF. The amplification factor can be altered by external wiring. With direct setting of the window, the input voltage appears on amplifier Amp 1 (V8), the upper edge voltage on comparator K2 (V6) and the lower edge voltage on comparator K1 (V7). With indirect setting of the window, the input voltage appears on inputs V6 and V7, while the center voltage is connected to amplifier A1 (V8). The voltage applied to the input (V9) of amplifier Amp 2 is subtracted symmetrically from the output voltage of amplifier Amp 1 and added. The comparators switch with hysteresis. The logic gates have open-collector outputs. If the inhibit input A or B is connected to ground, output A or B will always be high. + VS 11 1 VREF 5 20 k Ω 20 k Ω R Amp 3 10 V7 7 _ + + _ K1 Amp 1 V8 8 1 V=1 12 Amp 2 _ V9 V6 9 6 V=1 + _ K2 Outputs A, B, C, D are open-collector Block Diagram Semiconductor Group 2 1998-02-10 + _ VStab 1 2 A 4 _ 7.9 V mV/K 2 – – 10 mV/V µA mV mV mV V µA kHz kHz – – – – 1 2 – – IQH Output saturation voltage VQL Hysteresis of window edges Inhibit threshold Inhibit current Switching frequency 100 200 500 800 18 1 – – – 22 35 1.8 IQ = 10 mA 1 IQ = 50 mA VU – VL V4, 12 I4, 12 fdir find – 100 – 20 50 – – Semiconductor Group 5 1998-02-10 TCA 965 B VS Ι S11 11 Ι Ι6 6 2 3 RL RL RL RL Ι QH2 Ι QH3 Ι QH13 Ι QH14 Ι Ι7 13 7 TCA 965B 14 10 Ι Ι8 8 5 = V6 = V7 = V8 9 Ι Ι9 1 4 12 V5 V10 VQL14 VQL13 VQL3 VQL2 IES00086 = V4 = V12 Test Circuit 1 Direct Setting of Window Semiconductor Group 6 1998-02-10 TCA 965 B VS Ι S11 11 6 2 3 7 RL RL RL RL Ι QH2 Ι QH3 Ι QH13 Ι QH14 13 TCA 965B 8 14 10 9 5 = V6/7 = V8 = V9 1 4 12 V5 V10 VQL14 VQL13 VQL3 VQL2 IES00087 = V4 = V12 Test Circuit 2 Indirect Setting of Window by Center Voltage and Half Window Width Semiconductor Group 7 1998-02-10 TCA 965 B Inhibit Inputs 4,12 VS V4,12 100 Ω 1 kΩ GND >7V open > 1.8 V Outputs A, B V4,12 High Not permitted Normal function Low Inputs 6, 7, 8 Input 9 V6,7,8 1 kΩ V9 Outputs VREF , VStab Outputs 2, 3, 13, 14 VStab R VREF Q IES00088 Schematic Circuit Diagrams Semiconductor Group 8 1998-02-10 TCA 965 B VS C1 R1 10 11 R4 6V 6 2 A R2 3 D TCA 965 B R5 C2 R6 VΙ C3 R3 V9 9 1 4 12 8V 8 14 B 7V 7 13 C R7 IES00294 To increase the switching frequency, pin 9 may be grounded via R 7 ( V9 approx. 30...40 mV). Application Circuit 1 Direct Setting of Lower and Upper Edge Voltages V6 – V9 = Upper edge voltage V7 + V9 = Lower edge voltage V8 = Input voltage Semiconductor Group 9 1998-02-10 TCA 965 B V10 A VL VU V7 t IES00296 Definition of the Offset Voltage VIO VL + VU V 10 = --------------------- – V 7 2 Semiconductor Group 10 1998-02-10 TCA 965 B V8 Upper Edge Lower Edge V6 V7 t L t U t A B C D Inhibit A Pin 4 on GND A B 1 0 A B C C D D Inhibit B Pin 12 on GND A B C A 1 0 B C 1 0 1 0 1 0 IES00295 1.8 V < Pin 4