Data Sheet, Rev. 1.2, November 2009
TLE4253
Low Dropout Voltage Tracking Regulator
Automotive Power
Low Dropout Voltage Tracking Regulator TLE4253
TLE4253GS
1
Features • • • • • • • • • • • • • • • • •
Overview
Tight output tracking tolerance to reference Output voltage adjust down to 2.0 V Stable with ceramic output capacitor Flexibility of output voltage adjust higher or lower than reference, proportional to the reference voltage 250 mA output current capability Low dropout voltage Combined tracking / enable input Very low current consumption in OFF mode PG-DSO-8 packages with lowest thermal resistance Wide input voltage range -42 V ≤ VI ≤ 45 V Wide temperature range: -40 °C ≤ Tj ≤ 150 °C Output protected against short circuit to GND and battery Overtemperature protection Reverse polarity proof Suitable for use in automotive electronics Green Product (RoHS compliant) AEC Qualified
PG-DSO-8
Functional Description
PG-DSO-8 exposed pad
The TLE4253 is a monolithic integrated low-dropout voltage tracking regulator in small PG-DSO-8 packages. The exposed pad (EP) package variant PG-DSO-8 exposed pad offers extremely low thermal resistance. The IC is designed to supply off-board systems, e. g. sensors in engine management systems under the severe conditions of automotive applications. Therefore, the IC is equipped with additional protection functions against reverse polarity and short circuit to GND and battery. With supply voltages up to 40 V, the output voltage follows a reference voltage applied at the adjust input with high accuracy. The reference voltage applied directly to the adjust input or by an e. g. external resistor divider can be 2.0 V at minimum. The output is able to drive loads up to 250 mA at minimum while the device follows the e. g. 5 V output of a main voltage regulator acting as reference with high accuracy. The TLE4253 tracker can be set into shutdown mode in order to reduce the quiescent current to an extremly low value. This makes the IC suitable to low power battery applications.
Type TLE4253GS TLE4253E Data Sheet
Package PG-DSO-8 PG-DSO-8 exposed pad 2
Marking 4253 4253E Rev. 1.2, 2009-11-09
TLE4253
Block Diagram
2
Block Diagram
Saturation Control and Protection circuits
Temperature control
I
Q
TLE 4253
+ + typ. 1.4V
FB
EN/ ADJ
=
GND
Figure 1
Block Diagram
Data Sheet
3
Rev. 1.2, 2009-11-09
TLE4253
Pin Configuration
3
3.1
Pin Configuration
Pin Assignment
Q GND GND FB
1 2 3 4
8 7 6 5
I GND GND EN/ADJ
Q n. c. n. c. FB
1 2 3 4
8 7 6 5
I n. c. GND EN/ADJ
TLE4253GS
TLE4253E
Figure 2
Pin Configuration and Block Diagram
3.2
Pin 1
Pin Definitions and Functions
Symbol Q Function Tracker Output. Block to GND with a capacitor close to the IC terminals, respecting capacitance and ESR requirements given in the table “Functional Range”. Ground reference (version TLE4253GS only). Interconnect the pins on PCB. Connect to heatsink area. Ground (version TLE4253E only). Connect to exposed pad. Not connected (version TLE4253E only). Connect to GND externally. Feedback input for tracker. Non inverting input of the internal error amplifier to control the output voltage. Connect this pin directly to the output pin in order to obtain lower or equal output voltages with respect to the reference voltage and connect a voltage divider for higher output voltages than the reference (see application information). Adjust / Enable. Connect the reference to this pin. The active high signal of the reference turns on the device, with active low the tracker is disabled. The reference voltage can be connected directly or by a voltage divider for lower output voltages (see application information). Input. IC supply. For compensating line influences, a capacitor close to the IC terminals is recommended. Exposed pad (version TLE4253E only). Attach the exposed pad on package bottom to the heatsink area on circuit board. Connect to GND.
2, 3, 6, 7 6 2, 3, 7 4
GND GND n. c. FB
5
EN/ADJ
8
I
–
EP
Data Sheet
4
Rev. 1.2, 2009-11-09
TLE4253
General Product Characteristics
4
4.1
General Product Characteristics
Absolute Maximum Ratings
Absolute Maximum Ratings 1) -40 °C ≤ Tj ≤ 150 °C; all voltages with respect to ground (unless otherwise specified). Pos. Voltages 4.1.1 4.1.2 4.1.3 4.1.4 4.1.5 4.1.6 4.1.7 4.1.8 Input voltage Output voltage Adjust / Enable Input Feedback Input Junction Temperature Storage Temperature ESD Susceptibility Parameter Symbol Limit Values Min. Max. 45 45 45 45 150 150 4 1 V V V V °C °C kV kV – – – – – – HBM2) CDM3) Unit Conditions
VI VQ VADJ/EN VFB Tj Tstg VESD,HBM VESD,CDM
-42 -2 -42 -42 -40 -50 -4 -1
Temperature
ESD Rating
1) Not subject to production test, specified by design. 2) ESD susceptibility Human Body Model “HBM” according to EIA/JESD 22-A 114B. 3) ESD susceptibility Charged Device Model “CDM” according to EIA/JESD22-C101 or ESDA STM5.3.1.
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation.
Data Sheet
5
Rev. 1.2, 2009-11-09
TLE4253
General Product Characteristics
4.2
Pos. 4.2.1 4.2.1 4.2.2 4.2.3 4.2.4
Functional Range
Parameter Input Voltage Adjust / Enable Input Voltage (Voltage Tracking Range) Junction Temperature Output Capacitor Requirements Symbol Limit Values Min. Max. 40 – 150 5 V V °C µF Ω 3.5 2.0 -40 10 – Unit Conditions
VI VADJ/EN Tj CQ ESRCQ
VI ≥ VQ + Vdr
– – –1) –2)
1) The minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%. 2) relevant ESR value at f = 10 kHz.
Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table.
4.3
Pos.
Thermal Resistance
Parameter Symbol Min. Limit Value Typ. Max. Unit Conditions
PG-DSO-8: 4.3.1 4.3.2 4.3.3 4.3.4 4.3.5 PG-DSO-8 exposed pad: 4.3.6 4.3.7 4.3.8 4.3.9 4.3.10 Junction to Case Bottom Junction to Ambient Junction to Soldering Point Junction to Ambient
RthJSP RthJA
– – – – –
39 150 91 81 65
– – – – –
K/W K/W K/W K/W K/W
Pins 2 - 3 and 6 - 7 fixed to TA Footprint only 1) 300 mm2 PCB heatsink area 1) 600 mm2 PCB heatsink area 1) 2s2p board2)
RthJC RthJA
– – – – –
9 169 64 55 49
– – – – –
K/W K/W K/W K/W K/W
Measured to exposed bottom pad Footprint only 1) 300 mm2 PCB heatsink area 1) 600 mm2 PCB heatsink area 1) 2s2p board2)
1) Package mounted on PCB FR4; 80 x 80 x 1.5 mm; 35 µm Cu, 5 µm Sn; horizontal position; zero airflow. Not subject to production test; specified by design. 2) Specified RthJA value is according to JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The product (chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu). Where applicable a thermal via array under the package contacted the first inner copper layer.
Data Sheet
6
Rev. 1.2, 2009-11-09
TLE4253
Electrical Characteristics
5
5.1
Electrical Characteristics
Tracking Regulator
The output voltage VQ is controlled by comparing it to the voltage applied at pin ADJ/EN and driving a PNP pass transistor accordingly. The control loop stability depends on the output capacitor CQ, the load current, the chip temperature and the poles/zeros introduced by the integrated circuit. To ensure stable operation, the output capacitor’s capacitance and its equivalent series resistor ESR requirements given in the table “Functional Range” have to be maintained. For details see also the typical performance graph “Output Capacitor Series Resistor ESRCQ vs. Output Current IQ”. Also, the output capacitor shall be sized to buffer load transients. An input capacitor CI is strongly recommended to buffer line influences. Connect the capacitors close to the IC terminals. Protection circuitry prevent the IC as well as the application from destruction in case of catastrophic events. These safeguards contain output current limitation, reverse polarity protection as well as thermal shutdown in case of overtemperature. In order to avoid excessive power dissipation that could never be handled by the pass element and the package, the maximum output current is decreased at high input voltages. An overtemperature protection circuit prevents the IC from immediate destruction under fault conditions (e. g. output continuously short-circuited to GND) by reducing the output current. A thermal balance below 200 °C junction temperature is established. Please note that a junction temperature above 150 °C is outside the maximum ratings and reduces the IC lifetime. The TLE4253 allows a negative supply voltage. However, several small currents are flowing into the IC. For details see electrical characteristics table and typical performance graph. The thermal protection circuit is not operating during reverse polarity condition. Table 1 Electrical Characteristics Tracking Regulator
VI = 13.5 V; VADJ/EN ≥ 2.0 V; VFB = VQ; -40 °C ≤ Tj ≤ 150 °C; all voltages with respect to ground (unless otherwise specified).
Pos. 5.1.1 5.1.2 Parameter Output Voltage Tracking Accuracy ∆VQ = VEN/ADJ - VQ Symbol ∆ VQ -5 -10 Limit Values Min. Typ. – – Max. 5 10 mV mV Unit Test Condition
5.1.3
-15
–
15
mV
5.1.4 5.1.5
Load Regulation steady-state Line Regulation steady-state Power Supply Ripple Rejection
|dVQ,load| |dVQ,line|
– –
– –
10 10
mV mV
5.1.6
PSRR
60
–
–
dB
IQ = 30 mA; VADJ/EN = 5 V 0.1 mA ≤ IQ ≤ 200 mA; 3.5 V ≤ VI ≤ 32 V VADJ/EN = 2 V 0.1 mA ≤ IQ ≤ 250 mA; 9 V ≤ VI ≤ 3 2 V VADJ/EN = 5 V IQ = 0.1 mA to 200 mA; VADJ/EN = 5 V VI = 6 V to 32 V; IQ = 10 mA VADJ/EN = 5 V fripple = 100 Hz; Vripple = 1 Vpp CQ = 10 µF, ceramic type 1)
Data Sheet
7
Rev. 1.2, 2009-11-09
TLE4253
Electrical Characteristics Table 1 Electrical Characteristics Tracking Regulator
VI = 13.5 V; VADJ/EN ≥ 2.0 V; VFB = VQ; -40 °C ≤ Tj ≤ 150 °C; all voltages with respect to ground (unless otherwise specified).
Pos. 5.1.7 5.1.8 5.1.9 Parameter Dropout Voltage Vdr = VI - VQ Output Current Limitation Reverse Current Symbol Limit Values Min. Typ. 280 400 -5.5 Max. 600 600 – mV mA mA – 251 -10 Unit Test Condition
Vdr IQ,max IQ
IQ = 200 mA 2) VQ = (VADJ - 0.1 V); VADJ/EN = 5 V VI = 0 V; VQ = 16 V; VADJ/EN = 5 V VI = -16 V; VQ = 0 V ; VADJ/EN = 5 V VFB = 5 V
5.1.10 Reverse Current at Negative Input Voltage Feedback Input FB: 5.1.11 Feedback Input Biasing Current Overtemperature Protection: 5.1.12 Junction Temperature Equilibrium
II
-5
-2
–
mA
IFB
0.1
0.5
µA
Tj,eq
151
–
200
°C
Tj increasing due to power dissipation generated by the IC1)
1) Parameter not subject to production test; specified by design. 2) Measured when the output voltage VQ has dropped 100 mV from its nominal value.
Data Sheet
8
Rev. 1.2, 2009-11-09
TLE4253
Electrical Characteristics Typical Performance Characteristics Tracking Regulator
VADJ/EN = 5 V; VFB = VQ (unless otherwise noted)
Output Voltage VQ vs. Adjust Voltage VADJ
VQ-VADJ.vsd
Output Voltage VQ vs. Input Voltage VI
VQ-VI.vsd
V Q [ V]
VI = 13.5 V
V Q [ V]
5
Vdr
4
4
3
3
VADJ = 5 V
2 2
T j = 150 °C
1
T j = -40 °C Tj = -40 °C
1
T j = 150 °C
1 2 3 4 1 3 5 7
VADJ [ V]
Output Current Limitation IQ,max vs. Input Voltage VI
600
SOA.VSD
VI [ V]
Output Current Limitation IQ,max vs. Output Voltage VQ
IQmax-VQ.vsd
I Q [ mA] T j = 25 °C
400
5
VI = 13.5 V VADJ = 5 V V Q [V]
T j = 125 °C
T j = 25°C
3
300
T j = 125°C
200
V ADJ = 5 V
2
100
1
0
10
20
30
40
0
200
300
400
VI [V]
IQ [mA]
Data Sheet
9
Rev. 1.2, 2009-11-09
TLE4253
Electrical Characteristics Typical Performance Characteristics Tracking Regulator
VADJ/EN = 5 V; VFB = VQ (unless otherwise noted)
Output Capacitor Series Resistor ESRCQ vs. Output Current IQ
10
ESR-IQ_10u.vsd
Output Capacitor Series Resistor ESRCQ vs. Output Current IQ
10
ESR-IQ_6u8.vsd
ESR CQ
[Ω]
ESR CQ
[Ω]
1
Stable Region
1
Stable Region
0.1
0.1
C Q = 10 µF 6 V < VI < 28 V -40 °C < T j < 150 °C
0.01 0 50 100 150 200
C Q = 6.8 µF 6 V < VI < 28 V -40 °C < T j < 150 °C
0.01 0 50 100 150 200
I Q [mA]
Power Supply Ripple Rejection PSRR
90
PSRR.vsd
I Q [mA]
Line Regulation dVQ,line vs. Input Voltage Change dVI
2
dVQ-dVI.vsd
PSRR
[dB]
∆ VQ [ mV]
VI,initial = 6 V VADJ = 5 V I Q = 10 mA
IQ = 1 m A
70
0
60
-1
50
IQ = 100 mA VRIPPLE = 1 V VIN = 13.5 V C Q = 10 µF Ceramic T j = 25 °C
0.1 1 10 100
-2
IQ = 100 mA
40
-3 steady-state condition 0 0 5 10 15 20 25 30 35
0.01
f [ kHz]
∆VI [V]
Data Sheet
10
Rev. 1.2, 2009-11-09
TLE4253
Electrical Characteristics Typical Performance Characteristics Tracking Regulator
VADJ/EN = 5 V; VFB = VQ (unless otherwise noted)
Load Regulation dVQ,line vs. Output Current Change dIQ
dVQ-dIQ.vsd
Tracking Accuracy ∆VQ vs. Junction Temperature Tj
dVQ-Tj.vsd
∆ VQ [ mV]
I Q,initial = 0 m A VADJ = 5 V
[mV]
∆VQ
0
2
T j = 25 °C
-1
0
IQ = 0.1 mA
IQ = 200 mA
-2
Tj = 125 °C
-2
-3 steady-state condition 0 50 100 150 200
-4
-40 -20
0
20
40
60 80 100 120 140
∆ΙQ [mA]
Line Transient Response
dVI-reponse.vsd
T j [°C]
Load Transient Response
∆ VQ
[mV] 50
dIQresponse.vsd
125
∆ VQ
[mV] 0 -25
0
[V] 16
VI
I Q = 5 mA C Q = 10 µF Ceramic
[mA] 100
ΙQ
VI = 13.5 V VADJ = 5 V CQ = 10 µF
9 0 40 80 100 120
10 0 50 100 150 200
t [µs]
t [µs]
Data Sheet
11
Rev. 1.2, 2009-11-09
TLE4253
Electrical Characteristics Typical Performance Characteristics Tracking Regulator
VADJ/EN = 5 V; VFB = VQ (unless otherwise noted)
Dropout Voltage Vdr vs. Output Current IQ
Vdr-IQ_log.vsd
Dropout Voltage Vdr vs. Junction Temperature Tj
600
Vdr-Tj.vsd
V dr [ mV]
V dr [mV]
1000
400
I Q = 200 mA
100
300
Tj = 150 °C
200
10
Tj = 25 °C
100
0.2
1
10
100
-40 -20
0
20
40
60
80 100 120 140
IQ [mA]
Reverse Current II vs. Input Voltage VI
+1
II-VI.vsd
T j [°C]
Reverse Output Current IQ vs. Output Voltage VQ
+2
IQ-VQ.vsd
I I [mA]
VQ = 0 V VADJ = 5 V
I Q [mA]
VI = 0 V V ADJ = 5 V
-2
T j = 25 °C T j = 150 °C
-4
-4
-8
T j = 25 °C
-6
-12
T j = 150 °C
-8 -16
-32
-24
-16
-8
0
0
8
16
24
32
VI [V]
VQ [V]
Data Sheet
12
Rev. 1.2, 2009-11-09
TLE4253
Electrical Characteristics
5.2
Table 2
Current Consumption
Electrical Characteristics Current Consumption
VI = 13.5 V; VADJ/EN ≥ 2.0 V; VFB = VQ; -40 °C ≤ Tj ≤ 150 °C;
all voltages with respect to ground (unless otherwise specified). Pos. 5.2.1 Parameter Quiescent Current Stand-by Mode Current Consumption Symbol Min. Limit Values Typ. 0 Max. 2 µA – Unit Conditions
Iq1
5.2.2
Iq2
–
120
150
µA
Iq = II - IQ
5.2.3 5.2.4 Current Consumption Dropout Region; Iq = II - IQ – 7 1 15 3 mA mA
Iq3
–
VQ = 0 V ; VADJ/EN ≤ 0.4 V; Tj ≤ 85 °C IQ ≤ 100 µA; VADJ/EN = 5 V; Tj ≤ 85 °C IQ ≤ 200 mA; VADJ/EN = 5 V VADJ = VI = 5 V; IQ = 0 m A
Data Sheet
13
Rev. 1.2, 2009-11-09
TLE4253
Electrical Characteristics Typical Performance Characteristics Tracking Regulator
VADJ/EN = 5 V; VFB = VQ (unless otherwise noted)
Current Consumption Iq2 vs. Junction Temperature Tj
Iq-Tj.vsd
Current Consumption Iq vs. Output Current IQ
Iq-IQ.vsd
I q [ mA] VI = 13.5V
10
I q [ mA]
V EN/ADJ = 5 V
IQ = 200 mA
10
VI = 6 V
1
1
VI > 9 V
I Q = 200 µA
0.1
0.1
0.01 -40 -20
0
20
40 60
80 100 120 140
0.01 0.2
1
10
100
Tj [°C]
Current Consumption Iq vs. Input VoltageVI
30
IQ [mA]
Quiescent Current Iq1 vs. Junction Temperature Tj
Iq1-Tj.vsd
Iq-VI.vsd
25
I q1 [ µA]
VI = 13.5V VEN/ADJ = 0 V
20
R LOAD = 25 Ω R LOAD = 50 Ω R LOAD = 100 Ω R LOAD = 500 Ω
I q [mA]
15
1
10
5
0 0 10 20 30 40
0.1 -40 -20
0
20
40
60
80 100 120 140
V I [V]
T j [°C]
Data Sheet
14
Rev. 1.2, 2009-11-09
TLE4253
Electrical Characteristics
5.3
Adjust / Enable Input
In order to reduce the quiescent current to a minimum, the TLE4253 can be switched to stand-by mode by setting the adjust/enable input “ADJ/EN” to “low”. In case the pin “ADJ/EN is left open, an internal pull-down resistor keeps the voltage at the pin low and therefore ensures that the regulator is switched off. Table 3 Electrical Characteristics Adjust / Enable
VI = 13.5 V; VADJ/EN ≥ 2.0 V; VFB = VQ; -40 °C ≤ Tj ≤ 150 °C;
all voltages with respect to ground (unless otherwise specified). Pos. 5.3.1 Parameter Adjust / Enable Low Signal Valid Adjust / Enable High Signal Valid (Tracking Region) Adjust / Enable Input Current Adjust / Enable internal pull-down resistor Symbol Min. Limit Values Typ. – Max. 0.4 V – Unit Test Condition
VADJ/EN,low
5.3.2
VADJ/EN,high
2
–
–
V
5.3.3 5.3.4
IADJ/EN RADJ/EN
– 1
3.8 1.5
5.5 2
µA MΩ
VQ = 0 V ; II < 2 µA; Tj ≤ 85 °C VQ settled: |VQ - VADJ/EN| < 10 mV; IQ = 10 mA VADJ/EN = 5 V;
Typical Performance Characteristics Tracking Regulator
VADJ/EN = 5 V; VFB = VQ (unless otherwise noted)
Startup Sequence
4253_startup.vsd
V [ V]
Overshoot depends on load current, CQ , ESR (CQ )
4
VADJ
3
2
d VQ / dt = ( IQ,max-ILoad ) / C Q
1
0
20
40 60
80 100 120 140
t [µs]
Data Sheet 15 Rev. 1.2, 2009-11-09
TLE4253
Application Information
6
Application Information
Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. The application circuits shown are simplified examples. The function must be verified in the real application.
VBAT
µC, e.g. C167 Main µC supply, e.g. TLE4271-2 I Q TLE4278 TLE4470 etc. GND VREF VDD
I/O
5
EN/ ADJ
Q
1
TLE 4253 G
8
I GND
2, 3, 6, 7
FB
4
e.g. off board supply, sensors
Figure 3
Application circuit: Output voltage VQ equal to reference voltage VREF
Figure 3 shows the typical schematic for applications where the tracker output voltage equals the reference voltage VREF applied to the pin “EN/ADJ”. The pin “FB” is connected directly to the output. The reference voltage is directly applied “EN/ADJ”.
Data Sheet
16
Rev. 1.2, 2009-11-09
TLE4253
Application Information
VBAT
µC, e.g. C167 Main µC supply, e.g. TLE4271-2 I Q TLE4278 TLE4470 etc. GND VREF R1ADJ
5
VDD
I/O
EN/ ADJ
Q
1
VQ < VREF
R2ADJ
TLE 4253 G
8
I GND
2, 3, 6, 7
FB
4
Figure 4
Application circuit: Output voltage VQ lower than reference voltage VREF
In order to obtain a lower output voltage VQ at the tracker output than the reference voltage VREF, a voltage divider according to Figure 4 has to be used. The output voltage VQ then calculates:
R2 ADJ V Q = V REF ⋅ --------------------------------------- R1 ADJ + R2 ADJ
With a given reference voltage VREF, the desired output voltage VQ and the resistor value R1ADJ, the resistor value for R2ADJ is given by:
VQ R2 ADJ = R1 ADJ ⋅ --------------------------- V REF – V Q
Taking into consideration also the effect of the internal EN/ADJ pull-down resistor, the external resistor divider’s R2ADJ has to be selected to:
R2 ADJ ⋅ R PullDown ,min R2 ADJ ,select = --------------------------------------------------------- R PullDown ,min – R2 ADJ
Data Sheet
17
Rev. 1.2, 2009-11-09
TLE4253
Application Information
VBAT
µC, e.g. C167 Main µC supply, e.g. TLE4271-2 I Q TLE4278 TLE4470 etc. GND VREF VQ > VREF VDD
I/O
5
EN/ ADJ
Q
1
TLE 4253 G
8
I GND
2, 3, 6, 7
FB
4
R1FB R2FB
Figure 5
Application circuit: Output voltage VQ higher than reference voltage VREF
For output voltages higher than the reference voltage, the voltage divider has to be applied between the feedback and the output according to Figure 5. The equation for the output voltage with respect to the reference voltage is given by:
R1 FB + R2 FB V Q = V REF ⋅ -------------------------------- R2 FB
Keep in mind that the input voltage has to be at minimum equal to the output voltage plus the dropout voltage of the regulator. With a given reference voltage VREF, the desired output voltage VQ and the resistor value R1FB, the resistor value for R2FB is given by:
V REF R2 FB = R1 FB ⋅ --------------------------- V Q – V REF
Data Sheet
18
Rev. 1.2, 2009-11-09
TLE4253
Package Outlines
7
Package Outlines
0.35 x 45˚
1.75 MAX.
0.175 ±0.07 (1.45)
4 -0.21)
0.19 +0.06
C
L
8 MAX.
0.41+0.1 2) -0.06
B
1.27 0.2
M
0.1 A B 8x
B 6 ±0.2
0.64 ±0.25 0.2
M
C 8x
A
HLG05506
8
5
Reflow Soldering
1 4
5 -0.2 1) Index Marking
A
1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Lead width can be 0.61 max. in dambar area
GPS01181
Dimensions: e = 1.27 A = 5.69 L = 1.31 B = 0.65
Figure 6
Outline and Footprint PG-DSO-8
Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Find all packages, sorts of packing and others at the Infineon Internet Page “Packages”: Dimensions in mm http://www.infineon.com/packages. Data Sheet 19 Rev. 1.2, 2009-11-09
e
TLE4253
Package Outlines
0.35 x 45˚ 3.9 ±0.11)
Stand Off (1.45)
1.7 MAX.
0.1 C D 2x
0.19 +0.06
0.08 C Seating Plane
0.1+0 -0.1
1.27 0.41±0.09 2) 0.2
C
0.64 ±0.25
D 6 ±0.2 0.2
8˚ MAX.
M
M
C A-B D 8x
D 8x
Bottom View A
8 5
3 ±0.2
1 4
1
4
8
5
B 4.9 ±0.11)
Index Marking
0.1 C A-B 2x
1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Dambar protrusion shall be maximum 0.1 mm total in excess of lead width 3) JEDEC reference MS-012 variation BA
Figure 7
Outline and footprint PG-DSO-8 exposed pad (exposed pad)
Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Find all packages, sorts of packing and others at the Infineon Internet Page “Packages”: Dimensions in mm http://www.infineon.com/packages. Data Sheet 20 Rev. 1.2, 2009-11-09
2.65 ±0.2
PG-DSO-8-27-PO V01
TLE4253
Revision History
8
Revision History
Changes
Revision Date 1.2
2009-11-09 Updated Version Data Sheet, version TLE4253E in PG-DSO-8 exposed pad and all related description added: In “Overview” on Page 2 picture for package PG-DSO-8 updated In “Features” on Page 2 “package” replaced by “packages” In “Functional Description” on Page 2 “a small PG-DSO-8 package” replaced by “small PG-DSO-8 packages”; “The exposed pad (EP) package variant PG-DSO-8 exposed pad offers extremely low thermal resistance.” added; “suits” replaces by “makes” In “Pin Assignment” on Page 4, package PG-DSO-8 exposed pad added In “Pin Definitions and Functions” on Page 4 all definition for package PG-DSO-8 exposed pad added In “Thermal Resistance” on Page 6 all values for package PG-DSO-8 exposed pad added (Item 4.3.6 - Item 4.3.10) In “Adjust / Enable Input” on Page 15 typo corrected: “resistors” replaced by “resistor” In “Package Outlines” on Page 19 package PG-DSO-8 exposed pad added
1.1
2008-08-19 Updated Version Final Datasheet for TLE4253GS: “Package Outlines” on Page 19 updated; In “Typical Performance Characteristics Tracking Regulator” on Page 14 Graph “Current Consumption Iq vs. Input VoltageVI” on Page 14 added
1.0
2007-07-10 Initial Final Datasheet for TLE4253GS. • For the TLE4253ES (exposed pad) product variant, please refer to the respective datasheet
0.41
2006-01-27 Target Datasheet
Data Sheet
21
Rev. 1.2, 2009-11-09
Edition 2009-11-09 Published by Infineon Technologies AG 81726 Munich, Germany © 2009 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
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