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TLE4678GM

TLE4678GM

  • 厂商:

    INFINEON

  • 封装:

  • 描述:

    TLE4678GM - Low Drop Out Linear Voltage Regulator 5 V Fixed Output Voltage - Infineon Technologies A...

  • 数据手册
  • 价格&库存
TLE4678GM 数据手册
Datasheet, Rev. 1.1, August 2009 TLE4678 Low Drop Out Linear Voltage Regulator 5 V Fixed Output Voltage Automotive Power TLE4678 Table of Contents Table of Contents 1 2 3 3.1 3.2 3.3 3.4 4 4.1 4.2 4.3 5 5.1 5.2 5.3 6 6.1 6.2 7 7.1 7.2 7.3 8 8.1 8.2 8.3 9 10 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Assignment PG-DSO-14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Definitions and Functions PG-DSO-14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Assignment PG-SSOP-14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Definitions and Functions PG-SSOP-14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5 5 6 7 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Description Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical Performance Characteristics Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 11 12 13 Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Electrical Characteristics Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Typical Performance Characteristics Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Reset Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Description Reset Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics Reset Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical Performance Characteristics Reset Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Watchdog Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics Watchdog Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical Performance Characteristics Standard Watchdog Function . . . . . . . . . . . . . . . . . . . . . . . . . 17 17 20 21 22 22 25 27 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Datasheet 2 Rev. 1.1, 2009-08-27 Low Drop Out Linear Voltage Regulator 5 V Fixed Output Voltage TLE4678 1 Features • • • • • • • • • • • • • • • • • Overview Output Voltage 5 V ± 2% Current Capability 200 mA Ultra Low Current Consumption Very Low Dropout Voltage Watchdog Circuit for Monitoring a Microprocessor with Programmable Load-dependent Activating Threshold Reset Circuit Sensing the Output Voltage with Programmable Switching Threshold and Delay Time Reset Output Active Low Down to VQ = 1 V Separated Reset and Watchdog Output Excellent Line Transient Robustness Maximum Input Voltage -42 V ≤ VI ≤ +45 V Reverse Polarity Protection Short Circuit Protected Overtemperature Shutdown Automotive Temperature Range -40 °C ≤ Tj ≤ 150 °C Available in a small thermally enhanced PG-SSOP-14 package Green Product (RoHS Compliant) AEC Qualified PG-DSO-14 PG-SSOP-14 Description The TLE4678 is a monolithic integrated low dropout fixed output voltage regulator for loads up to 200 mA. An input voltage of up to 45 V is regulated to an output voltage of 5 V. The integrated reset and watchdog function, as well as several protection circuits, combined with a wide operating temperature range offered by the TLE4678 make it suitable for supplying microprocessor systems in automotive environments. The watchdog circuitry will be disabled in case the output current drops below a programmable threshold, enabling a microcontroller to switch in stand-by mode. Modifying the reset threshold is possible by an optional resistor divider. The TLE4678 is available in a PG-DSO-14 package which makes it pin-compatible to the TLE4278 as well as in a small thermally enhanced PG-SSOP-14 exposed pad package. Type TLE4678GM TLE4678EL Datasheet Package PG-DSO-14 PG-SSOP-14 3 Marking TLE4678GM TLE4678 Rev. 1.1, 2009-08-27 TLE4678 Block Diagram 2 Block Diagram For details on the circuit blocks see the respective section in this datasheet. Supply I TLE 4678 Q Regulated Output Voltage CQ Load e. g. Micro Controller XC22xx RO Reset and Watchdog Generator WO WI RADJ WADJ GND D CD Protection Circuits Bandgap Reference GND Figure 1 Block Diagram and Simplified Application Circuit Datasheet 4 Rev. 1.1, 2009-08-27 Blo ckD gram _AppCircuit1 .vsd ia TLE4678 Pin Configuration 3 3.1 Pin Configuration Pin Assignment PG-DSO-14 WO WADJ GND GND GND D RADJ 1 2 3 4 5 6 7 14 13 12 11 10 9 8 Pinout_SO14 .vsd RO I GND GND GND Q WI Figure 2 Pin Assignment PG-DSO-14 Package 3.2 Pin 1 Pin Definitions and Functions PG-DSO-14 Symbol WO Function Watchdog Output Open collector output with an internal pull-up resistor to the output Q. An additional external pull-up resistor to the output Q is optional. Leave open if the watchdog function is not needed. Watchdog Activating Threshold Adjust An external resistor to GND determines the watchdog activating threshold. Connect directly to GND for disabling the watchdog. Connect directly to GND if the watchdog function is not needed. Connect to output Q via 270 kΩ resistor for permanently activating the watchdog. IC Ground Interconnect the GND pins on PCB. Connect to heat sink area. Reset Delay and Watchdog Timing Connect a ceramic capacitor D (pin 6) to GND for reset delay and watchdog timing adjustment. Leave only open if both, the reset and the watchdog function are not needed. Reset Switching Threshold Adjust For reset threshold adjustment connect to a voltage divider from output Q to GND. For triggering the reset at the internally determined threshold, connect this pin directly to GND. Connect directly to GND if the reset function is not needed. 2 WADJ 3, 4, 5, GND 10, 11, 12 6 D 7 RADJ Datasheet 5 Rev. 1.1, 2009-08-27 TLE4678 Pin Configuration Pin 8 Symbol WI Function Watchdog Input Positive edge triggered input, usable for microcontroller monitoring. Connect to GND if the watchdog function is not needed. 5 V Regulator Output Block to GND with a capacitor close to the IC pins, respecting capacitance and ESR requirements given in the Chapter 4.2 Functional Range. Regulator Input and IC Supply For compensating line influences, a capacitor to GND close to the IC pins is recommended. Reset Output Open collector output with an internal pull-up resistor to the output Q. An additional external pull-up resistor to the output Q is optional. Leave open if the reset function is not needed. 9 Q 13 I 14 RO 3.3 Pin Assignment PG-SSOP-14 Figure 3 Pin Assignment PG-SSOP-14 Package Datasheet 6 Rev. 1.1, 2009-08-27 TLE4678 Pin Configuration 3.4 Pin 1 Pin Definitions and Functions PG-SSOP-14 Symbol WO Function Watchdog Output Open collector output with an internal pull-up resistor to the output Q. An additional external pull-up resistor to the output Q is optional. Leave open if the watchdog function is not needed. Watchdog Activating Threshold Adjust An external resistor to GND determines the watchdog activating threshold. Connect directly to GND for disabling the watchdog. Connect directly to GND if the watchdog function is not needed. Connect to output Q via 270 kΩ resistor for permanently activating the watchdog. IC Ground Interconnect with the exposed pad and heatsink area on PCB. Reset Delay and Watchdog Timing Connect a ceramic capacitor D (pin 6) to GND for reset delay and watchdog timing adjustment. Leave only open if both, the reset and the watchdog function are not needed. Reset Switching Threshold Adjust For reset threshold adjustment connect to a voltage divider from output Q to GND. For triggering the reset at the internally determined threshold, connect this pin directly to GND. Connect directly to GND if the reset function is not needed. Watchdog Input Positive edge triggered input, usable for microcontroller monitoring. Connect to GND if the watchdog function is not needed. 5 V Regulator Output Block to GND with a capacitor close to the IC pins, respecting capacitance and ESR requirements given in the Chapter 4.2 Functional Range. Regulator Input and IC Supply For compensating line influences, a capacitor to GND close to the IC pins is recommended. Reset Output Open collector output with an internal pull-up resistor to the output Q. An additional external pull-up resistor to the output Q is optional. Leave open if the reset function is not needed. Internally not connected Connection to GND on PCB recommended. Connect to heat sink area on PCB. Interconnect with GND. 3 WADJ 4 5 GND D 7 RADJ 8 WI 10 Q 12 I 14 RO 2, 6, 9, 11, 13, n. c. Exposed pad Datasheet 7 Rev. 1.1, 2009-08-27 TLE4678 General Product Characteristics 4 4.1 General Product Characteristics Absolute Maximum Ratings Absolute Maximum Ratings 1) Tj = -40 °C to +150 °C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Min. Voltage Rating 4.1.1 4.1.2 4.1.3 4.1.4 4.1.5 4.1.6 4.1.7 4.1.8 Regulator Input and IC Supply I Regulator Output Q Limit Values Max. 45 7 7 7 7 7 7 7 V V V V V V V V – – – – – – – – Unit Conditions VI -42 -1 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 VQ Reset Output RO VRO Reset Delay and Watchdog VD Timing D Reset Switching Threshold VRADJ Adjust RADJ Watchdog Input WI Watchdog Output WO Watchdog Activating Threshold Adjust WADJ Junction Temperature Storage Temperature ESD Resistivity VWI VWO VWADJ Temperature 4.1.9 4.1.10 4.1.11 4.1.12 4.1.13 Tj Tstg VESD,HBM -40 -55 -3 -2 150 150 3 2 1 °C °C kV kV kV – – Human Body Model 2) Pin 13 (Input) only. Human Body Model 2) All pins except pin 13 (Input) Charged Device Model 3) ESD Susceptibility VESD,CDM -1 1) Not subject to production test, specified by design. 2) ESD susceptibility, Human Body Model “HBM” according to EIA/JESD 22-A114B. 3) ESD susceptibility, Charged Device Model “CDM” according to EIA/JESD22-C101 or ESDA STM5.3.1. Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Datasheet 8 Rev. 1.1, 2009-08-27 TLE4678 General Product Characteristics 4.2 Pos. 4.2.1 4.2.2 4.2.3 4.2.4 4.2.5 4.2.6 Functional Range Parameter Input Voltage Range for Normal Operation Extended Input Voltage Range Input Voltage Transient Immunity Junction Temperature Output Capacitor Requirements Symbol Min. Limit Values Max. 45 45 20 150 V V V/µs °C µF 1) Unit Conditions VI(nor) VI(ext) dVI/dt VQ + Vdr 3.3 -10 -40 10 – 2) dVI ≤ 10 V; VI > 9 V; No trigger of WO, RO. 3) – –4) 3 Ω –5) 1) For specification of the output voltage VQ and the dropout voltage Vdr, see Chapter 5 Voltage Regulator. 2) The output voltage VQ will follow the input voltage, but is outside the specified range. Tj CQ ESRCQ For details see Chapter 5 Voltage Regulator. 3) Transient measured directly at the input pin. Not subject to production test, specified by design. 4) The minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%. 5) Relevant ESR value at f = 10 kHz. Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. Datasheet 9 Rev. 1.1, 2009-08-27 TLE4678 General Product Characteristics 4.3 Thermal Resistance Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Pos. Parameter Symbol Min. TLE4678GM (PG-DSO-14) 4.3.1 4.3.2 4.3.3 4.3.4 4.3.5 TLE4678EL (PG-SSOP-14) 4.3.6 4.3.7 4.3.8 4.3.9 4.3.10 Junction to Case Junction to Ambient Junction – Soldering Point RthJSP Junction – Ambient – – – – – 27 104 73 65 63 10 140 63 53 47 – – – – – – – – – – K/W K/W K/W K/W K/W K/W K/W K/W K/W K/W Pins 3 - 5 and 10 - 12 fixed to TA 1) Footprint only 1) 2) 300 mm2 PCB heatsink area 1) 2) 600 mm2 PCB heatsink area 1) 2) 2s2p PCB 1) 3) – 1) Footprint only 1) 2) 300mm2 PCB heatsink area 1) 2) 600mm2 PCB heatsink area 1) 2) 2s2p PCB 1) 3) Limit Values Typ. Max. Unit Conditions RthJA RthJC RthJA – – – – – 1) Not subject to prodution test; specified by design. 2) Specified RthJA value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The Product (Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70µm Cu). 3) Specified RthJA value is according to JEDEC JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. Datasheet 10 Rev. 1.1, 2009-08-27 TLE4678 Voltage Regulator 5 5.1 Voltage Regulator Description Voltage Regulator The output voltage VQ is controlled by comparing a portion of it to an internal reference and driving a PNP pass transistor accordingly. Saturation control as a function of the load current prevents any oversaturation of the pass element. The control loop stability depends on the output capacitor CQ, the load current, the chip temperature and the poles/zeros introduced by the integrated circuit. To ensure stable operation, the output capacitor’s capacitance and its equivalent series resistor ESR requirements given in the table “Functional Range” on Page 9 have to be maintained. For details see also the typical performance graph “Output Capacitor Series Resistor ESRCQ vs. Output Current IQ”. Also, the output capacitor shall be sized to buffer load transients. An input capacitor CI is not needed for the control loop stability, but recommended to buffer line influences. Connect the capacitors close to the IC terminals. Protection circuitry prevent the IC as well as the application from destruction in case of catastrophic events. These safeguards contain output current limitation, reverse polarity protection as well as thermal shutdown in case of overtemperature. In order to avoid excessive power dissipation that could never be handled by the pass element and the package, the maximum output current is decreased at input voltages above VI = 22 V. The thermal shutdown circuit prevents the IC from immediate destruction under fault conditions (e.g. output continuously short-circuited) by switching off the power stage. After the chip has cooled down, the regulator restarts. This leads to an oscillatory behaviour of the output voltage until the fault is removed. However, a junction temperature above 150 °C is outside the maximum rating and therefore reduces the IC lifetime. The TLE4678 allows a negative supply voltage. However, several small currents are flowing into the IC increasing its junction temperature. This has to be considered for the thermal design, respecting that the thermal protection circuit is not operating during reverse polarity condition. Supply II I Q IQ Regulated Output Voltage + Saturation Control Current Limitation + VI CI Temperature Shutdown CQ Bandgap Reference VQ LOAD BlockDiagram _VoltageRegulator .vsd GND Figure 4 Block Diagram Voltage Regulator Circuit Figure 5 Datasheet Output Voltage vs. Input Voltage 11 Rev. 1.1, 2009-08-27 TLE4678 Voltage Regulator 5.2 Electrical Characteristics Voltage Regulator Electrical Characteristics: Voltage Regulator VI = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, direction of currents as shown in Figure 4 (unless otherwise specified) Pos. 5.2.1 5.2.2 5.2.3 Parameter Output Voltage Symbol Min. Limit Values Typ. 5.0 Max. 5.1 V 0 mA ≤ IQ ≤ 200 mA; 8 V ≤ VI ≤ 1 8 V 0 mA ≤ IQ ≤ 150 mA; 6 V ≤ VI ≤ 1 8 V 0 mA ≤ IQ ≤ 100 mA; 18 V ≤ VI ≤ 32 V Tj ≤ 105 °C 1) 2) 0 mA ≤ IQ ≤ 10 mA; 32 V ≤ VI ≤ 45 V Tj ≤ 105 °C 1) 2) 0.3 mA ≤ IQ ≤ 100 mA; 18 V ≤ VI ≤ 32 V 1) 0.3 mA ≤ IQ ≤ 10 mA; 32 V ≤ VI ≤ 45 V 1) Load Regulation steady-state Line Regulation steady-state Power Supply Ripple Rejection Dropout Voltage |dVQ,load| |dVQ,line| – – 60 – – 201 -1.5 -2 -5 151 – 5 5 65 90 165 350 -0.7 -1 -3 – 20 30 20 – 200 350 500 – – – 200 – mV mV dB mV mV mA mA mA mA °C K 4.9 Unit Conditions VQ 5.2.4 5.2.5 5.2.6 5.2.7 5.2.8 5.2.9 5.2.10 5.2.11 5.2.12 5.2.13 5.2.14 5.2.15 5.2.16 5.2.17 PSRR Vdr IQ,max IQ II Tj,sd Tj,hy Vdr = VI - VQ Output Current Limitation Reverse Current Reverse Current at Negative Input Voltage Overtemperature Shutdown Threshold Overtemperature Shutdown Threshold Hysteresis IQ = 1 mA to 150 mA; VI = 6 V VI = 6 V to 32 V; IQ = 5 mA fripple = 100 Hz; Vripple = 1 Vpp 2) IQ = 50 mA 3) IQ = 150 mA 3) 0 V ≤ VQ ≤ 4.8 V VI = 0 V ; VQ = 5 V VI = -16 V; VQ = 0 V VI = -42 V; VQ = 0 V Tj increasing 2) Tj decreasing 2) 1) See typical performance graph for details. 2) Parameter not subject to production test; specified by design. 3) Measured when the output voltage VQ has dropped 100 mV from its nominal value. Datasheet 12 Rev. 1.1, 2009-08-27 TLE4678 Voltage Regulator 5.3 Typical Performance Characteristics Voltage Regulator Output Capacitor Series Resistor ESRCQ vs. Output Current IQ VQ -Tj v s d . Output Voltage VQ vs. Junction Temperature Tj VQ [V] 100 ESR 1 0 u .v s d -IQ ESRCQ [ Ω] 10 C Q ≥ 10 µF; 6 V ≤ VI ≤ 28 V; -40 °C ≤ Tj ≤ 150 °C 5.02 5.00 1 4.98 0 .1 Stable Region 4.96 -40 -20 0 20 40 60 80 100 120 140 0.01 0 40 80 120 160 T j [°C] IQ [mA] Output Current Limitation IQ,max vs. Input VoltageV I SO A.v s d IQ,ma x [mA] 400 Tj = 25 °C 300 T j = 125 °C 200 100 0 10 20 30 40 VI [V] Datasheet 13 Rev. 1.1, 2009-08-27 TLE4678 Voltage Regulator Dropout Voltage Vdr vs. Output Current IQ Vd r- IQ.v s d Dropout Voltage Vdr vs. Junction Temperature Tj 300 Vd r- Tj v s d . Vdr [mV] Vdr [mV] 200 200 IQ = 150 mA 100 T j = 125 °C 150 100 IQ = 50 mA 20 T j = 25 °C 50 IQ = 200 µA 0.2 1 10 100 -40 -20 0 20 40 60 80 100 120 140 IQ [mA] Tj [°C] Reverse Output Current IQ vs. Output Voltage VQ 0 IQ-VQ @ VI=0 v s d . Reverse Current II vs. Input Voltage VI 0 II-VI@VQ =0 .v s d IQ [mA] VI = 0 V II [mA] VQ = 0 V -0.4 -1 T j = -40 °C -0.6 -1.5 T j = 150 °C -0.8 Tj = -40 °C -2 Tj = 25 °C -2.5 T j = 150 °C 0 1.6 3.2 4 .8 6 -32 - 24 -16 -8 0 V Q [V] VI [V] Datasheet 14 Rev. 1.1, 2009-08-27 TLE4678 Current Consumption 6 6.1 Current Consumption Electrical Characteristics Current Consumption Electrical Characteristics: Current Consumption VI = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, direction of currents as shown in Figure 6 (unless otherwise specified). Pos. 6.1.1 6.1.2 6.1.3 6.1.4 6.1.5 6.1.6 Parameter Symbol Min. Current Consumption Iq1 Watchdog Deactivated Iq = II - IQ Current Consumption – – – – – – Limit Values Typ. 60 70 110 120 1 5.5 Max. 80 85 130 135 2 8 µA µA µA µA mA mA Unit Conditions IQ ≤ 200 µA; Tj ≤ 25 °C Watchdog deactivated IQ ≤ 200 µA; Tj ≤ 85 °C Watchdog deactivated Iq = II - IQ Iq2 IQ ≤ 2 mA; Tj ≤ 25 °C Watchdog activated IQ ≤ 2 mA; Tj ≤ 85 °C Watchdog activated IQ = 50 mA IQ = 150 mA Supply II I Voltage Regulator Q IQ Regulated Output Voltage + + VI CI CurrentConsumption _ ParameterDefinition .vsd CQ GND VQ LOAD Iq Figure 6 Parameter Definition Datasheet 15 Rev. 1.1, 2009-08-27 TLE4678 Current Consumption 6.2 Typical Performance Characteristics Current Consumption Current Consumption Iq vs. Junction Temperature Tj I q -Tj .v s d Current Consumption Iq vs. Junction Temperature Tj Iq [mA] VI = 13 .5 V Watchdog activated 10 140 Iq 0 0 u _ Tj v s d 1 . Iq [µA] IQ = 100 µA VI = 13.5 V Watchdog deactivated IQ = 150 mA 100 IQ = 50 mA 1 80 IQ = 2 mA 0.1 60 40 0.01 -40 -20 0 20 40 60 80 100 120 140 -40 0 40 80 120 150 Tj [°C] T j [°C] Current Consumption Iq vs. Output Current IQ Iq -IQ .v s d Current Consumption Iq vs. Input Voltage VI 24 Iq -VI.v s d Iq [mA] Iq [mA] 10 16 Tj = 25 °C RL = 50 Ω 1 12 VI = 13.5 V T j = 125 °C 0.1 VI = 13 .5 V Tj = 25 °C 8 RL = 500 Ω 4 0.01 0.2 1 10 100 0 2 4 6 8 IQ [mA] VI [V] Datasheet 16 Rev. 1.1, 2009-08-27 TLE4678 Reset Function 7 7.1 Reset Function Description Reset Function The reset function provides several features: Output Undervoltage Reset: An output undervoltage condition is indicated by setting the Reset Output “RO” to “low”. This signal might be used to reset a microcontroller during low supply voltage. Power-On Reset Delay Time The power-on reset delay time td,PWR-ON allows a microcontroller and oscillator to start up. This delay time is the time period from exceeding the upper reset switching threshold VRT,hi until the reset is released by switching the reset output “RO” from “low” to “high”. The power-on reset delay time td,PWR-ON is defined by an external delay capacitor CD connected to pin “D” which is charged up by the delay capacitor charge current ID,ch starting from VD = 0 V. In case a power-on reset delay time td,PWR-ON different from the value for CD = 100nF is required, the delay capacitor’s value can be derived from the specified value given in Item 7.2.15: CD = 100nF × td,PWR-ON / td,PWR-ON,100nF with • • • (1) td,PWR-ON: Desired power-on reset delay time td,PWR-ON,100nF: Power-on reset delay time specified in Item 7.2.15 CD: Delay capacitor required. The formula is valid for CD ≥ 10nF. For precise timing calculations consider also the delay capacitor’s tolerance. Undervoltage Reset Delay Time Unlike the power-on reset delay time, the undervoltage reset delay time td considers a short output undervoltage event where the delay capacitor CD is assumed to be discharged to VD = VDST,lo only before the charging sequence starts. Therefore, the undervoltage reset delay time td is defined by the delay capacitor charge current ID,ch starting from VD = VDST,lo and the external delay capacitor CD. A delay capacitor CD for a different undervoltage reset delay time as specified in Item 7.2.14 can be calculated similar as above: CD = 100nF × td / td,100nF with • • • (2) td: Desired undervoltage reset delay time td,100nF: Power-on reset delay time specified in Item 7.2.14 CD: Delay capacitor required The formula is valid for CD ≥ 10nF. For precise timing calculations consider also the delay capacitor’s tolerance. Datasheet 17 Rev. 1.1, 2009-08-27 TLE4678 Reset Function Reset Reaction Time In case the output voltage of the regulator drops below the output undervoltage lower reset threshold VRT,lo, the delay capacitor CD is discharged rapidly. Once the delay capacitor’s voltage has reached the lower delay switching threshold VDST,lo, the reset output “RO” will be set to “low”. Additionally to the delay capacitor discharge time trr,d, an internal reaction time trr,int applies. Hence, the total reset reaction rime trr,total becomes: trr,total = trr,int + trr,d with • • • (3) trr,total: Total reset reaction time trr,int: Internal reset reaction time; see Item 7.2.16. trr,d: Delay capacitor discharge time. For a capacitor CD different from the value specified in Item 7.2.17, see typical performance graphs. Reset Ouput “RO” The reset output “RO” is an open collector output with an integrated pull-up resistor. In case a lower-ohmic “RO” signal is desired, an external pull-up resistor to the output “Q” can be connected. Since the maximum “RO” sink current is limited, the optional external resistor RRO,ext must not below as specified in Item 7.2.8. Reset Output “RO” Low for VQ ≥ 1 V In case of an undervoltage reset condition reset output “RO” is held “low” for VQ ≥ 1 V, even if the input voltage VI is 0 V. This is achieved by supplying the reset circuit from the output capacitor. Reset Adjust Function The undervoltage reset switching threshold can be adjusted according to the application’s needs by connecting an external voltage divider (RADJ1, RADJ2) at pin “RADJ”. For selecting the default threshold connect pin “RADJ” to GND. The reset adjustment range is given in Item 7.2.6. When dimensioning the voltage divider, take into consideration that there will be an additional current constantly flowing through the resistors. With a voltage divider connected, the reset switching threshold VRT,adj is calculated as follows: VRT,adj = VRADJ,th × (RADJ,1 + RADJ,2) / RADJ,2 with • • • (4) VRT,adj: Desired reset switching threshold. RADJ,1, RADJ,2: Resistors of the external voltage divider, see Figure 7. VRADJ,th: Reset adjust switching threshold given in Item 7.2.5. Datasheet 18 Rev. 1.1, 2009-08-27 TLE4678 Reset Function Supply I Q optional VDD Control Int. Supply R RO ID ,ch RO CQ IRO Reset VRADJ ,th OR VDST RADJ ,1 IDR ,dsch RADJ opti onal MicroController IRADJ GND BlockDiagram _ResetAdjust .vsd D RADJ ,2 CD GND Figure 7 Block Diagram Reset Circuit VI t VQ V RT,hi V RT,lo V RH t < trr,blank 1V t VD VDS T,hi VDS T,lo t VRO td trr,total td t rr,total td t rr,total td V RO,low 1V t Thermal Shutdown Input Voltage Dip Undervoltage Spike at output Overload T i mi n g Di a g ra m_ Re se t. vs Figure 8 Datasheet Timing Diagram Reset 19 Rev. 1.1, 2009-08-27 TLE4678 Reset Function 7.2 Electrical Characteristics Reset Function Electrical Characteristics: Reset Function VI = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, direction of currents as shown in Figure 7 (unless otherwise specified). Pos. Parameter Symbol Min. 7.2.1 Output Undervoltage Reset Lower Switching Threshold Output Undervoltage Reset Upper Switching Threshold Output Undervoltage Reset Switching Hysteresis Output Undervoltage Reset Headroom Limit Values Typ. 4.7 Max. 4.8 V Unit Conditions Output Undervoltage Reset Comparator Default Values (Pin RADJ = GND) VRT,lo 4.6 VI = 0 V VQ decreasing RADJ = GND 7.2.2 VRT,hi 4.7 4.8 4.9 V VI within operating range VQ increasing RADJ = GND 7.2.3 7.2.4 VRT,hy VRH 60 250 120 300 – – mV mV VI within operating range RADJ = GND. Calculated Value: VQ - VRT,lo VI within operating range IQ = 50 mA RADJ = GND Reset Threshold Adjustment 7.2.5 7.2.6 Reset Adjust Lower Switching Threshold Lower Reset Threshold Adjustment Range 1) Reset Output Low Voltage VRADJ,th VRT,adj 1.176 3.20 1.20 – 1.224 V V VI = 0 V 3.2 V ≤ VQ < 5 V – VRT,lo Reset Output RO 7.2.7 VRO,low – 0.2 0.4 V 7.2.8 Reset Output RRO,ext External Pull-up Resistor to Q Reset Output Internal Pull-up Resistor Upper Delay Switching Threshold Lower Delay Switching Threshold Delay Capacitor Charge Current Delay Capacitor Reset Discharge Current Undervoltage Reset Delay Time 3 – – kΩ VI = 0 V; RRO,ext = 3.3 kΩ; 1 V ≤ VQ ≤ VRT,low VI = 0 V; VRO = 0.4 V 1 V ≤ VQ ≤ VRT,low internally connected to Q – – 7.2.9 RRO 20 30 40 kΩ Reset Delay Timing 7.2.10 7.2.11 7.2.12 7.2.13 7.2.14 VDST,hi VDST,lo ID,ch IDR,dsch td,100nF – – – – 23 1.21 0.30 2.8 80 31 – – – – 41 V V µA mA ms VD = 1 V VD = 1 V Calculated value; CD = 100 nF 2); CD discharged to VDST,lo Rev. 1.1, 2009-08-27 Datasheet 20 TLE4678 Reset Function Electrical Characteristics: Reset Function (cont’d) VI = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, direction of currents as shown in Figure 7 (unless otherwise specified). Pos. 7.2.15 Parameter Power-on Reset Delay Time Symbol Min. Limit Values Typ. 43 Max. 56 ms Calculated value; 30 Unit Conditions td,PWRON,100nF 7.2.16 7.2.17 7.2.18 Internal Reset Reaction Time Delay Capacitor Discharge Time Total Reset Reaction Time trr,int trr,d,100nF – – 9 1.5 10.5 15 3 18 µs µs µs CD = 100 nF 2); CD discharged to 0 V; CD = 0 nF CD = 100 nF 2) Calculated Value: trr,d,100nF + trr,int ; CD = 100 nF 2) trr,total,100nF – 1) Related Parameters (VRT,hi, VRT,hy) are scaled linear when the Reset Switching Threshold is modified. 2) For programming a different delay and reset reaction time, see Chapter 7.1. 7.3 Typical Performance Characteristics Reset Function Reset Delay Time td, td,PWR-ON versus Delay Capacitor CD VRT-Tj .v s d Undervoltage Reset Switching Thresholds VRT,lo, VRT,hi versus Tj VQ [V], VRT [V] Pin RADJ = GND td -CD .v s d td ,PWR- ON [ms] td , 5.0 VQ 100 Output Undervoltage Reset Headroom VRH td,PWR-ON (typ.) 4,9 4,8 VRT,hi td (typ.) 10 4,7 VRT,lo -40 -20 0 20 40 60 80 100 120 140 1 10 100 1000 Tj [°C] CD [nF] Datasheet 21 Rev. 1.1, 2009-08-27 TLE4678 Watchdog Function 8 8.1 Watchdog Function Description The TLE4678 features a load dependent watchdog function with a programmable activating threshold as well as a programmable watchdog timing. The watchdog function monitors a microcontroller, including time base failures. In case of a missing rising edge within a certain pulse repetition time, the watchdog output is set to ‘low’. The programming of the expected watchdog pulse repetition time can be easily done by an external reset delay capacitor. The watchdog output “WO” is separated from the reset output “RO”. Hence, the watchdog output might be used as an interrupt signal for the microcontroller independent from the reset signal. It is possible to interconnect pin “WO” and pin “RO” in order to establish a wire-or function with a dominant low signal. Programmable Watchdog Activation Threshold and Hysteresis In case a microcontroller is set to sleep mode or to low power mode, its current consumption is very low and the controller might not be able to send any watchdog pulses to the regulators watchdog input “WI”. In order to avoid unwanted wake-up signals due to missing edges at pin “WI”, the TLE4678 watchdog function can be activated dependent on the regulator’s output current. The TLE4678 comprises a default watchdog activating threshold IQ,WDact,th with a small hysteresis IQ,WDact,hy. The thresholds can be increased by connecting an external resistor RWADJ,ext to pin “WADJ”. For using the default watchdog activating threshold, leave pin “WADJ” open. The following equation calculates the external resisistor RWADJ,ext that is needed at pin “WADJ” for activating the watchdog at a desired output current IQ,WDact,th: RWADJ,ext = FWDact,th × RWADJ,int for IQ,WDact,th larger than the default value given in Item 8.2.1. (5) (RWADJ,int × IQ,WDact,th) - FWDact,th At decreasing output current, the deactivation threshold then would be: IQ,WDdeact,th = FWDdeact,th × RWADJ,int + RWADJ,ext RWADJ,int × RWADJ,ext (6) The watchdog activating threshold hysteresis IQ,WDact,hy calculates: IQ,WDact,hy = FWDact,hy × with: • • • • • • RWADJ,int + RWADJ,ext RWADJ,int × RWADJ,ext (7) IQ,WDact,th : Desired “Watchdog Activating Threshold” RWADJ,int : Internal Watchdog Adjust Resistor RWADJ,ext : External Watchdog Adjust Resistor FWDact,th : Activating Threshold Factor FWDdeact,th : Deactivating Threshold Factor FWDact,hy : Activating Threshold Factor Hysteresis Datasheet 22 Rev. 1.1, 2009-08-27 TLE4678 Watchdog Function Supply I Q IQ VDD Control WADJ IWADJ CQ VWADJ,th RWO optional MicroController RWADJ ,ext (optional) RWADJ ,int Int. Supply WI Edge Detect I D,ch VDW & WO Reset IWO OR S R 1 IDW ,dsch VDW,hi WI I/O GND D BlockDiagram _WatchdogAdjust .vsd GND CD Figure 9 Figure 10 Block Diagram Watchdog Circuit Watchdog Output “WO” The watchdog output “WO” is an open collector output with an integrated pull-up resistor. In case a lower-ohmic “WO” signal is desired, an external pull-up resistor to the output “Q” can be connected. Since the maximum “WO” sink current is limited, the optional external resistor RWO,ext needs to be sized to comply with the watchdog output sink current (see Item 8.2.15 and Item 8.2.16). Watchdog Input “WI” The watchdog is triggered by an positive edge at the watchdog input “WI”. The signal is filtered by a bandpass filter and therefore its amplitude and slope has to comply with the specification Item 8.2.10 to Item 8.2.14. For details on the test pulse applied, see Figure 11. V WI VWI,hi tWI,p V WI VWI,hi 1 / fWI VWI,lo d VWI / d t VWI,lo t t Figure 11 Datasheet Test Pulses Watchdog Input WI 23 Rev. 1.1, 2009-08-27 TLE4678 Watchdog Function Watchdog Timing Positive edges at the watchdog input pin “WI” are expected within the watchdog trigger time frame tWI,tr, otherwise a low signal at pin “WO” is generated. If a watchdog low signal at pin “WO” is generated, it remains low for tWD,lo. All watchdog timings are defined by charging and discharging the capacitor CD at pin “D”. Thus, the watchdog timing can be programmed by selecting CD. For timing details see also Figure 12. In case a watchdog trigger time period tWI,tr different from the value for CD = 100nF is required, the delay capacitor’s value can be derived from the specified value given in Item 8.2.22: CD = 100nF × tWI,tr / tWI,tr,100nF The watchdog output low time tWD,lo and the watchdog period tWD,p then becomes: (8) tWD,lo = tWD,lo,100nF × CD / 100nF tWD,p = tWI,tr + tWD,lo (9) (10) The formula is valid for CD ≥ 10nF. For precise timing calculations consider also the delay capacitor’s tolerance. VWI V WI,hi V WI,lo No positive VWI edge dV WI / d t outside spec 1/ fWI t WI,p t VD VDW,hi tWI,tr TWI,p VDW,lo t t WD,lo VWO t WD,lo V WO,low T i mi n g Di a g ra m_ W a t ch d o g .vsd t Figure 12 Timing Diagram Watchdog Datasheet 24 Rev. 1.1, 2009-08-27 TLE4678 Watchdog Function 8.2 Electrical Characteristics Watchdog Function Electrical Characteristics Watchdog Function VI = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, direction of currents as shown in Figure 9 (unless otherwise specified). Pos. Parameter Symbol Min. 8.2.1 8.2.2 8.2.3 Watchdog Activating Threshold Watchdog Deactivating Threshold Watchdog Activating Threshold Hysteresis Activating Threshold Current ratio Internal Watchdog Adjust Resistor Activating Threshold Factor Limit Values Typ. 1.1 0.9 200 Max. 1.5 – – mA mA µA Unit Conditions Default Watchdog Activating Threshold (pin WADJ left open) IQ,WDact,th 0.65 IQ,WDdeact,th 0.55 IQ,WDact,hy 50 IQ increasing IQ decreasing – Adjustable Watchdog Activating Threshold (external resistor connected to pin WADJ) 8.2.4 8.2.5 8.2.6 8.2.7 8.2.8 8.2.9 VWADJ,th – IQ / IWADJ – RWADJ,int 96 FWDact,th 127 693 208 131 144 118 26 – – 175 162 – – mV – kΩ mA × kΩ mA × kΩ mA × kΩ V V µs V/µs MHz – VWADJ = 0V – Calculated value 1) Calculated value 1) Calculated value 1) Deactivating Threshold Factor FWDdeact,th 104 Activating Threshold Switching Hysteresis Factor Watchdog Input Low Signal Valid Watchdog Input High Signal Valid Watchdog Input High Signal Pulse Length Watchdog Input Signal Slew Rate Watchdog Input Signal Frequency Capture Range FWDact,hy 7 Watchdog Input WI 8.2.10 8.2.11 8.2.12 8.2.13 8.2.14 VWI,lo VWI,hi tWI,p dVWI/dt – 2.6 0.5 1 – – – – – – 0.8 – – – 1 – 2) – 2) VWI ≥ VWI,high 2) VWI,low ≤ VWI ≤ VWI,high 2) Square Wave, 50% Duty Cycle 2) fWI Datasheet 25 Rev. 1.1, 2009-08-27 TLE4678 Watchdog Function Electrical Characteristics Watchdog Function VI = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, direction of currents as shown in Figure 9 (unless otherwise specified). Pos. Parameter Symbol Min. Watchdog Output WO 8.2.15 Watchdog Output Low Voltage Watchdog Output Maximum Sink Current Watchdog Output Internal Pull-up Resistor Delay Capacitor Charge Current Delay capacitor watchdog discharge current Upper watchdog timing threshold Lower watchdog timing threshold Watchdog Trigger Time Watchdog Output Low Time Limit Values Typ. 0.2 Max. 0.4 V Unit Conditions VWO,low – IWO = 1 mA; Watchdog active; VWI = 0 V VWO = 0.8 V; Watchdog active; VWI = 0 V 8.2.16 IWO,max 1.5 13 30 mA 8.2.17 RWO 20 30 40 kΩ – Watchdog Timing 8.2.18 8.2.19 8.2.20 8.2.21 8.2.22 8.2.23 ID IDW,disch VDW,hi VDW,lo – – – – 2.78 1.39 1.2 0.7 36 18 – – – – 47 23 µA µA V V ms ms VD = 1 V VD = 1 V – – Calculated value; CD = 100 nF 3) Calculated value; CD = 100 nF 3) VQ > VRT,lo Calculated value; tWI,tr,100nF + tWD,lo,100nF CD = 100 nF 3) tWI,tr,100nF 25 tWD,lo,100nF 13 8.2.24 Watchdog Period tWD,p,100nF 38 54 70 ms 1) See Chapter 8.1 for calculation hint 2) For details on the test pulse applied, see Figure 11. 3) For programming a different watchdog timing, see Chapter 8.1.. Datasheet 26 Rev. 1.1, 2009-08-27 TLE4678 Watchdog Function 8.3 Typical Performance Characteristics Standard Watchdog Function Watchdog Deactivating Threshold VWADJdeact,th vs. External Resistor RWADJ,ext 24 VWADJ d e a c t-RWADJ e x t.v s d Watchdog Activating Threshold VWADJact,th vs. External Resistor RWADJ,ext 24 VWADJ a c t-RWADJ e x t.v s d IQ,WDact,th [mA] IQ,WDact,th [mA] 16 14 12 10 8 6 4 2 4 10 100 1000 4000 max. typ. 16 14 12 10 8 6 4 2 4 10 100 1000 4000 typ. min. RWAD J ,e xt [k Ω] RWAD J ,e xt [k Ω] Watchdog Trigger Time tWI,tr vs. Delay Capacitor CD tWItr-CD v s d . tWI,tr [ms] 100 max. typ. 10 min . 1 10 100 1000 C D [nF] Datasheet 27 Rev. 1.1, 2009-08-27 TLE4678 Package Outlines 9 Package Outlines 0.35 x 45˚ 1.75 MAX. 0.175 ±0.07 (1.47) C 4 -0.2 1.27 0.41+0.10 2) -0.06 14 B 0.1 0.2 M A B 14x 8 6±0.2 0.64 ±0.25 0.2 M C 1 7 1) 8.75 -0.2 A Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Lead width can be 0.61 max. in dambar area GPS01230 Figure 13 Outline PG-DSO-14 Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). Datasheet 28 8˚MAX. Rev. 1.1, 2009-08-27 1) 0.19 +0.06 TLE4678 Package Outlines 0.35 x 45˚ Stand Off (1.45) 1.7 MAX. 3.9 ±0.11) 0.1 C D 0 ... 0.1 0.19 +0.06 0.08 C 6 ±0.2 0.65 0.25 ±0.05 2) C 0.64 ±0.25 D 0.2 8˚ MAX. M 0.15 M C A-B D 14x D 8x A 14 8 Bottom View 3 ±0.2 1 7 1 7 B 0.1 C A-B 2x Exposed Diepad 14 8 4.9 ±0.11) Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion PG-SSOP-14-1,-2,-3-PO V02 Figure 14 Outline PG-SSOP-14 Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on packages, please visit our website: http://www.infineon.com/packages. Datasheet 29 2.65 ±0.2 Dimensions in mm Rev. 1.1, 2009-08-27 TLE4678 Revision History 10 Revision History Changes Modified the Programmable Watchdog Activation Threshold and Hysteresis description for better understanding. “Reset Function” on Page 17: Renamed VRT,new to VRT,adj for better understanding. Revision Date 1.1 2009-08-27 Final datasheet version for both package variants. 1.01 1.0 2008-08-19 Added target definition for PG-SSOP-14 package. Modifications: Overview page, thermal resistance table, pin definition, package outlines. 2008-07-31 Final datasheet initial version. Datasheet 30 Rev. 1.1, 2009-08-27 Edition 2009-08-27 Published by Infineon Technologies AG 81726 Munich, Germany © 2009 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
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