TLE4946-1L_08

D ata Sheet, Rev 1.2, December 2008 TLE4946-1L H igh Precision Bipolar Hall-Effect Latch Sensors Edition 2008-12 Published by Infineon Technologies AG 81726 München, Germany © 2007 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. TLE4946-1L Revision History: Previous Version: Page 2008-12 1.1 Rev 1.2 Subjects (major changes since last revision) TLE4946H version removed (transfered to own datasheet) We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: sensors@infineon.com TLE4946-1L 1 1.1 1.2 1.3 2 2.1 2.2 3 4 5 6 7 7.1 7.2 7.3 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Configuration (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2 2 3 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Electrical and Magnetic Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Distance between Chip and Package Surface . . . . . . . . . . . . . . . . . . . . . Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 10 11 12 Data Sheet 1 Rev 1.2, 2008-12 High Precision Bipolar Hall-Effect Latch TLE4946-1L 1 1.1 • • • • • • • • • • • Overview Features 2.7 V to 24 V supply voltage operation Operation from unregulated power supply High sensitivity and high stability of the magnetic switching points High resistance to mechanical stress by Active Error Compensation Reverse battery protection (– 18 V) Superior temperature stability Peak temperatures up to 195°C without damage Low jitter (typ. 1 µs) High ESD performance (± 6 kV HBM) Digital output signal Leaded package PG-SSO-3-2 1.2 Functional Description The TLE4946-1L is an integrated circuit Hall-effect sensor designed specifically for highly accurate applications. Precise magnetic switching points and high temperature stability are achieved by active compensation circuits and chopper techniques on chip. Type TLE4946-1L Package PG-SSO-3-2 Data Sheet 2 Rev 1.2, 2008-12 TLE4946-1L Overview 1.3 Pin Configuration (top view) Center of Sensitive Area 2.08 ± 0.1 1.35 ± 0.1 123 PG-SSO-3-2 Figure 1 Table 1 Pin No. 1 2 3 Pin Definition and Center of Sensitive Area Pin Definitions and Functions PG-SSO-3-2 Symbol Function Supply voltage Ground Output VS GND Q Data Sheet 3 Rev 1.2, 2008-12 TLE4946-1L General 2 2.1 General Block Diagram VS Voltage Regulator reverse polarity protected Bias and Compensation Circuits Oscillator and Sequencer Ref Q Amplifier Chopped Hall Probe Low Pass Filter Comparator with Hysteresis GND Figure 2 Block Diagram 2.2 Circuit Description The chopped Hall IC Switch comprises a Hall probe, bias generator, compensation circuits, oscillator, and output transistor. The bias generator provides currents for the Hall probe and the active circuits. Compensation circuits stabilize the temperature behavior and reduce technology variations. The Active Error Compensation rejects offsets in signal stages and the influence of mechanical stress to the Hall probe caused by molding and soldering processes and other thermal stresses in the package. This chopper technique together with the threshold generator and the comparator ensure high accurate magnetic switching points. Data Sheet 4 Rev 1.2, 2008-12 TLE4946-1L Maximum Ratings 3 Table 2 Parameter Maximum Ratings Absolute Maximum Ratings Tj = – 40°C to 150°C Symbol Limit Values min. Supply voltage max. 18 24 26 + 50 V for 1 h, Rs ≥ 200 Ω for 5 min, Rs ≥ 200 Ω – 18 – 18 – 18 – 50 Unit Conditions VS Supply current IS through protection device Output voltage Continuous output current Junction temperature mA VQ IQ Tj – 0.7 – 0.7 – 50 – – – – – 40 – 18 26 + 50 155 165 175 195 150 unlimited V for 5 min @ 1.2 kΩ pull up mA °C for 2000 h (not additive) for 1000 h (not additive) for 168 h (not additive) for 3 x 1 h (additive) Storage temperature Magnetic flux density TS B °C mT Note: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD Protection 1) Symbol min. ESD voltage Limit Values max. ±6 kV HBM, R = 1.5 kΩ, C = 100 pF TA = 25°C – Unit Notes Table 3 Parameter VESD 1) Human Body Model (HBM) tests according to: EOS/ESD Association Standard S5.1-1993 and Mil. Std. 883D method 3015.7 Data Sheet 5 Rev 1.2, 2008-12 TLE4946-1L Operating Range 4 Table 4 Parameter Operating Range Operating Range Symbol min. Limit Values typ. – – – – max. 18 18 150 20 V V °C mA 2.7 – 0.7 – 40 0 Unit Conditions Supply voltage Output voltage Junction temperature Output current VS VQ Tj IQ Data Sheet 6 Rev 1.2, 2008-12 TLE4946-1L Electrical and Magnetic Parameters 5 Table 5 Parameter Electrical and Magnetic Parameters Electrical Characteristics 1). Symbol Limit Values min. typ. 4 0.2 0.3 0.05 0.02 0.4 320 – 13 1 13 – max. 6 1 0.6 10 1 1 – 15 – – – 190 2) Unit mA mA V µA µs µs kHz kHz µs Conditions Supply current Reverse current Output saturation voltage Output leakage current Output fall time Output rise time IS ISR VQSAT IQLEAK tf tr fSW td tQJ 2 0 – – – – – 0 – – – – VS = 2.7 V ... 18 V VS = – 1 8 V IQ = 20 mA for VQ = 18 V RL = 1.2 kΩ; CL = 50 pF see: Figure 3 “Timing Definition” on Page 9 Chopper frequency fOSC Switching frequency Delay time 3) Output jitter 4) µsRMS Typical value for square wave signal 1 kHz µs K/W Power-on time 5) 6) tPON Thermal resistance RthJA VS ≥ 2.7 V PG-SSO-3-2 1) over operating range, unless otherwise specified. Typical values correspond to VS =12 V and TA = 25°C 2) To operate the sensor at the max. switching frequency, the value of the magnetic signal amplitude must be 1.4 times higher than for static fields. This is due to the - 3 dB corner frequency of the low pass filter in the signal path. 3) Systematic delay between magnetic threshold reached and output switching 4) Jitter is the unpredictable deviation of the output switching delay 5) Time from applying VS ≥ 2.7 V to the sensor until the output state is valid 6) Thermal resistance from junction to ambient Note: Typical characteristics specify mean values expected over the production spread. Data Sheet 7 Rev 1.2, 2008-12 TLE4946-1L Electrical and Magnetic Parameters Table 6 Parameter Operate point Magnetic Characteristics TLE4946-1L 1) Symbol Tj [°C] min. Limit Values typ. 15.4 15.0 14.3 max. 19.5 19.0 18.1 – 11.3 – 11.0 – 10.5 – 38.0 – – 2.0 – – mT 11.3 11.0 10.5 Unit Notes BOP BRP BHYS BOFF – 40 25 150 – 40 25 150 – 40 25 150 – 40 25 150 – Release point – 19.5 – 15.4 – 19.0 – 15.0 – 18.1 – 14.3 – 22.0 – – – 2.0 – – – 30.0 – – – – - 350 mT Hysteresis mT Magnetic Offset mT 2) Temperature TC compensation of magn. thresholds Repeatability of magnetic thresholds 3) ppm/°C BREP – 20 – µTRMS Typ. value for ∆B / ∆t > 12 mT/ms 1) over operating range, unless otherwise specified. Typical values correspond to VS = 12 V. 2) BOFF = (BOP + BRP) / 2 3) BREP is equivalent to the noise constant Field Direction Definion Positive magnetic fields related with south pole of magnet to the branded side of package. Data Sheet 8 Rev 1.2, 2008-12 TLE4946-1L Timing Diagram 6 Timing Diagram Applied Magnetic Field B OP B RP td VQ 90% tf td tr 10% Figure 3 Timing Definition Data Sheet 9 Rev 1.2, 2008-12 TLE4946-1L Package Information 7 7.1 Package Information Package Marking yww S 46 1 Year (y) = 0 ... 9 Calendar Week (ww) = 01 ... 52 AEP03644 Figure 4 Marking TLE4946-1L Data Sheet 10 Rev 1.2, 2008-12 TLE4946-1L Package Information 7.2 Distance between Chip and Package Surface d Branded Side Hall-Probe d : Distance chip to upper side of IC PG-SSO-3-2 : 0.57 ±0.08 mm AEA02510-1 Figure 5 Distance Chip PG-SSO-3-2 to Upper Side of IC Data Sheet 11 Rev 1.2, 2008-12 TLE4946-1L Package Information 7.3 Package Outlines 0.8 ±0.1 x 45˚ 7˚ 4.16 ±0.05 0.15 MAX. 3.29 ±0.08 3 ±0.06 4.06 ±0.08 1.9 MAX. 0.2 2A 1.52 ±0.05 0.35 ±0.1 x 45˚ (0.25) 1 MAX.1) 7˚ 0.6 MAX. 0.4 ±0.05 (0.79) 0.2 +0.1 1.27±0.25 1 2 3 1.27±0.25 12.7 ±1 23.8 ±0.5 38 MAX. 9 +0.75 -0.5 18 ±0.5 6 ±0.5 A 6.35 ±0.4 12.7 ±0.3 Total tolerance at 10 pitches ±1 4 ±0.3 0.25 -0.15 0.39 ±0.1 GPO05358 1) No solder function area Figure 6 PG-SSO-3-2 Note: You can find all of our packages, sort of packing and others on our Infineon Internet page “Products”: http://www.infineon.com/products Data Sheet 12 1-1 Adhesive Tape Tape Rev 1.2, 2008-12 GPS09473 TLE4946-1L Notes Data Sheet 13 Rev 1.2, 2008-12 www.infineon.com Published by Infineon Technologies AG