TLE4946-2L

June 2008 TLE4946-2L High Precision Hall Effect Latch TLE4946-2L D atasheet Rev 1.0 Sensors Edition 2008-06 Published by Infineon Technologies AG 81726 München, Germany © 2007 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. TLE4946-2L TLE4946-2L High Precision Hall Effect Latch Revision History: 2008-06, Rev 1.0 Previous Version: Page Subjects (major changes since last revision) We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? 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Please send your proposal (including a reference to this document) to: sensors@infineon.com Datasheet 3 Rev 1.0, 2008-06 TLE4946-2L 1 1.1 1.2 1.3 2 2.1 2.2 2.3 2.4 2.5 2.6 3 3.1 3.2 3.3 3.4 4 4.1 Product Description 5 Overview 5 Features 5 Target Applications 5 Functional Description 5 General 5 Pin Configuration 6 Pin Description 6 Block Diagram 6 Operating Modes and States 7 Functional Block Description 7 Specification 8 Application Circuit 8 Absolute Maximum Ratings 8 Operating Range 9 Characteristics 9 Package Information 10 Package Outline 10 Datasheet 4 Rev 1.0, 2008-06 High Precision Hall Effect Latch TLE4946-2L 1 1.1 Product Description Overview The TLE4946-2L is a high precision Hall effect latch with highly accurate switching thresholds for operating temperatures up to 150°C. 1.2 • • • • • • • • • • Features 2.7 V to 18 V supply voltage operation Operation from unregulated power supply High sensitivity and high stability of the magnetic switching points High resistance to mechanical stress by active error compensation Reverse battery protection (Vs = -18V) Superior temperature stability Peak temperatures up to 195°C without damage Low jitter (typ. 1µs) High ESD performance (± 4 kV HBM) Digital output signal 1.3 Target Applications The TLE4946-2L is an integrated circuit Hall-effect sensor with low switching thresholds and low hysteresis. It is specially designed for high sensitivity applications and is ideally suited to detect the rotor position in a BLDC motor. Also for index counting with small pole wheels and large air gaps the sensor provides a reliable switching information. 2 2.1 Functional Description General Precise magnetic switching thresholds and high temperature stability are achieved by active compensation circuits and chopper techniques on chip. Offset voltages, generated by temperature induced stress or overmolding are canceled and high accuracy is achieved. The IC has an open collector output stage with 20mA current sink capability. A wide operating voltage range form 2.7V to 18V with reverse polarity protection up to -18V makes the device suitable for a wide range of applications. A magnetic south pole with field strength above Bop turns the output on and a magnetic north pole exceeding Brp turns it off. Product Name Hall Effect Latch Datasheet Product Type TLE4946-2L 5 Ordering Code SP000398352 Package PG-SSO-3-2 Rev 1.0, 2008-06 TLE4946-2L Functional Description 2.2 Pin Configuration Center of Sensitive Area 2.08 ± 0.1 1.35 ± 0.1 123 PG-SSO-3-2 Figure 1 Pin Configuration and sensitive area (Top View, Figure not to Scale) 2.3 Table 1 Pin or Ball No. 1 2 3 Pin Description Pin Description Name Vs GND Q Pin Type I O O Function Supply voltage Ground Output Comments 2.4 Block Diagram VS Voltage Regulator reverse polarity protected Bias and Compensation Circuits Oscillator and Sequencer Ref Q Amplifier Chopped Hall Probe Low Pass Filter Comparator with Hysteresis GND Figure 2 TLE4946-2L Block Diagram Datasheet 6 Rev 1.0, 2008-06 TLE4946-2L Functional Description 2.5 Operating Modes and States Field Direction Definition: Positive magnetic fields are related with the south pole of the magnet to the branded side of package. B OP B RP Applied Magnetic Field td VQ 90% tf td tr 10% Figure 3 Timing diagram VQ B B rp Figure 4 Output Signal 0 Bop 2.6 Functional Block Description The chopped Hall IC switch comprises a Hall probe, bias generator, compensation circuits, oscillator and output transistor. The bias generator provides currents for the Hall probe and the active circuits. Compensation circuits stabilize the temperature behavior and reduce technology variations. The Active Error Compensation rejects offsets in signal stages and the influence of mechanical stress to the Hall probe caused by molding and soldering processes and other thermal stresses in the package. This chopper technique together with the threshold generator and the comparator ensure high accurate magnetic switching points Datasheet 7 Rev 1.0, 2008-06 TLE4946-2L Specification 3 3.1 Specification Application Circuit TLE4946-2L Q 4.7nF GND 200Ω 1.2kΩ Q GND VS 4.7nF VS Figure 5 Application circuit It is recommended to use a serial resistor of 200Ω in the supply line for current limitation in the case of a overvoltage pulse. Two capacitors of 4.7nF enhance the EMC performance. The pull-up resistor of 1.2kΩ limits the current through the output transistor. 3.2 Absolute Maximum Ratings Table 2 Parameter Absolute Maximum Ratings Symbol Min. Values Typ. – – – – – – – – – – – – – 4 Max. 150 155 165 175 195 18 24 26 + 50 18 26 150 unlimited °C mT kV According to EIA/JESD22-A114-B Rev 1.0, 2008-06 V for 1h, Rs ≥ 200Ω for 5min, Rs ≥ 200Ω mA V for 5min @ 1.2kΩ pull up °C for 2000 h (not additive) for 1000 h (not additive for 168 h (not additive) for 3 x 1 h (additive) -40 – – – – Unit Note/Test Condition Max. junction temperature TJ Supply voltage VDD -18 -18 -18 – 50 -0.7 -0.7 Supply current through protection device Output voltage IS VQ Storage temperature Magnetic flux density ESD robustness HBM: 1.5 kΩ, 100 pF Datasheet TS – 40 B VESD,HBM 8 TLE4946-2L Specification Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. 3.3 Operating Range The following operating conditions must not be exceeded in order to ensure correct operation of the TLE4946-2L. All parameters specified in the following sections refer to these operating conditions unless otherwise mentioned. Table 3 Parameter Supply voltage Output voltage Junction temperature Output current Operating Range Symbol Min. VS VQ Tj IQ Values Typ. – – – – Max. 18 18 150 20 2.7 – 0.7 – 40 0 Unit V V °C mA Note/ Test Condition 3.4 Characteristics Product characteristics involve the spread of values guaranteed within the specified voltage and ambient temperature range. Typical characteristics are the median of the production (at Vs = 12V and TA= 25°C). Table 4 Parameter Supply current Reverse current Output saturation voltage Output leakage current Output fall time Output rise time Chopper frequency Switching frequency Delay time 2) 3) Electrical Characteristics Symbol Min. IS ISR VQSAT IQLEAK tf tr fOSC fSW td tQJ tPON 5) Values Typ. 4 0.2 0.3 0.05 0.02 0.4 320 – 13 1 13 Max. 6 1 0.6 10 1 1 – 15 – – – 190 1) Unit mA mA V µA µs µs kHz kHz µs Note/ Test Condition VS = 2.7 V ... 18 V VS = – 1 8 V IQ = 20 mA 2 0 – – – – – 0 – – – – for VQ = 18 V RL = 1.2 kΩ; CL = 50 pF Output jitter µsRMS Typ. value for square wave signal 1 kHz µs K/W VS ≥ 2.7 V Power-on time 4) Thermal resistance RthJA PG-SSO-3-2 1) To operate the sensor at the max. switching frequency, the value of the magnetic signal amplitude must be 1.4 times higher than for static fields. This is due to the - 3 dB corner frequency of the low pass filter in the signal path. 2) Systematic delay between magnetic threshold reached and output switching 3) Jitter is the unpredictable deviation of the output switching delay 4) Time from applying VS ≥ 2.7 V to the sensor until the output state is valid 5) Thermal resistance from junction to ambient Datasheet 9 Rev 1.0, 2008-06 TLE4946-2L Package Information Table 5 Parameter Operate point Release point Hysteresis Magnetic Offset 1) Magnetic Characteristics Symbol Min. BOP BRP BHYS BOFF TC 0.5 -3.5 1.0 -1.5 Values Typ. 2.0 -2.0 4 0 -350 20 Unit Max. 3.5 -0.5 6.0 1.5 mT mT mT mT ppm/°C µTRMS Note/ Test Condition Temperature compensation of magn. thresholds Repeatability of magnetic thresholds 2) BREP 1) Boff = (Bop + Brp)/2 2) BREP is equivalent to the noise constant 4 4.1 Package Information Package Outline d yww S 46 2 Year (y) = 0...9 Calendar Week (ww) = 01...52 Branded Side Hall-Probe d : Distance chip to upper side of IC PG-SSO-3-2 : 0.57 ±0.08 mm AEA03644 AEA02510-1 Figure 6 Marking of TLE4946-2L and Distance of chip to upper side of IC Datasheet 10 Rev 1.0, 2008-06 TLE4946-2L Package Information 0.8 ±0.1 x 45˚ 7˚ 4.16 ±0.05 0.15 MAX. 3.29 ±0.08 3 ±0.06 4.06 ±0.08 1.9 MAX. 0.2 2A 1.52 ±0.05 0.35 ±0.1 x 45˚ (0.25) 1 MAX.1) 0.6 MAX. 0.4 ±0.05 (0.79) 0.2 +0.1 1.27±0.25 1 2 3 1.27±0.25 12.7 ±1 23.8 ±0.5 38 MAX. 7˚ 9 +0.75 -0.5 18 ±0.5 6 ±0.5 A 6.35 ±0.4 12.7 ±0.3 Total tolerance at 10 pitches ±1 4 ±0.3 0.25 -0.15 0.39 ±0.1 GPO05358 1) No solder function area Figure 7 Package outline Datasheet 11 1-1 Adhesive Tape Tape Rev 1.0, 2008-06 www.infineon.com Published by Infineon Technologies AG