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TLE4966K

TLE4966K

  • 厂商:

    INFINEON

  • 封装:

  • 描述:

    TLE4966K - High Precision Hall-Effect Switch with Direction Detection - Infineon Technologies AG

  • 数据手册
  • 价格&库存
TLE4966K 数据手册
D ata Sheet, Rev. 1.0, September 2007 TLE4966K H igh Precision Hall-Effect Switch with Direction Detection Sensors Edition 2007-09 Published by Infineon Technologies AG 81726 München, Germany © 2007 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. TLE4966K Revision History: Previous Version: Page 2007-09 none Rev. 1.0 Subjects (major changes since last revision) We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: sensors@infineon.com TLE4966K 1 1.1 1.2 1.3 2 2.1 2.2 3 4 5 6 7 7.1 7.2 7.3 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Configuration (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5 5 6 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical and Magnetic Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Field Direction Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Timing Diagrams for the Speed and Direction Outputs . . . . . . . . . . . . 12 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Distance between Chip and Package Surface . . . . . . . . . . . . . . . . . . . . . Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PCB Footprint for PG-TSOP6-6-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 14 14 15 15 Data Sheet 4 Rev. 1.0, 2007-09 High Precision Hall-Effect Switch with Direction Detection TLE4966K 1 1.1 • • • • • • • • • • • • • • • Overview Features 2.7 V to 24 V supply voltage operation Operation from unregulated power supply High sensitivity and high stability of the magnetic switching points High resistance to mechanical stress by Active Error Compensation Reverse battery protection (-18 V) Superior temperature stability Peak temperatures up to 195°C without damage Low jitter (typ. 1 µs) Digital output signals Bipolar version Excellent matching between the 2 Hall probes Hall plate distance 1.45 mm Direction & speed information Direction signal switches before the speed signal SMD package PG-TSOP6-6-5 1.2 Functional Description The TLE4966K is an integrated circuit double Hall-effect sensor designed specifically for highly accurate applications. Precise magnetic switching points and high temperature stability are achieved by active compensation circuits and chopper techniques on chip. They provide a speed signal at Q2 for every magnetic pole pair and a direction information at Q1, which is provided before the speed signal. Type TLE4966K Package PG-TSOP6-6-5 Data Sheet 5 Rev. 1.0, 2007-09 TLE4966K Overview 1.3 Pin Configuration (top view) Center of Sensitive Area 0.73 ± 0.15 1.45 6 0.8 ± 0.15 5 4 s 66 speed direction Year (y) = 0...9 Month (m) = 1...9, O - October N - November D - Decembe r AEA03645 1 2 PG-TSOP6-6-5 Figure 1 Table 1 Pin No. 1 2 3 4 5 6 Pin Definition and Center of Sensitive Area Pin Definitions and Functions PG-TSOP6-6-5 Symbol Q2 GND Q1 Function Speed Recommended connection to GND Direction Supply voltage Recommended connection to GND Ground VS GND GND Data Sheet 6 ym 3 Rev. 1.0, 2007-09 TLE4966K General 2 2.1 General Block Diagram VS Voltage Regulator (reverse polarity protected) ESD Oscillator & Sequencer Bias and Compensation Circuits GND Q2 Chopped Hall Probe Amplifier Filter Chopped Hall Probe Amplifier Filter Comparator with Hysteresis Q1 Direction Detection Figure 2 Block Diagram 2.2 Circuit Description The chopped Double Hall Switch comprises two Hall probes, bias generator, compensation circuits, oscillator, and output transistors. The bias generator provides currents for the Hall probes and the active circuits. Compensation circuits stabilize the temperature behavior and reduce technology variations. The Active Error Compensation rejects offsets in signal stages and the influence of mechanical stress to the Hall probes caused by molding and soldering processes and other thermal stresses in the package. This chopper technique together with the threshold generator and the comparator ensures high accurate magnetic switching points. Data Sheet 7 Rev. 1.0, 2007-09 TLE4966K Maximum Ratings 3 Table 2 Parameter Maximum Ratings Absolute Maximum Ratings Tj = -40°C to 150°C Symbol min. Supply voltage Limit Values max. 18 24 26 50 V for 1 h, RS ≥ 200 Ω for 5 min, RS ≥ 200 Ω mA -18 -18 -18 -50 Unit Conditions VS Supply current IS through protection device Output voltage Continuous output current Junction temperature VQ IQ Tj -0.7 -0.7 -50 – – – – -40 – 18 26 50 155 165 175 195 150 unlimited V mA °C for 5 min @ 1.2 kΩ pull up for 2000 h (not additive) for 1000 h (not additive) for 168 h (not additive) for 3 x 1 h (additive) Storage temperature Magnetic flux density TS B °C mT Note: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 3 Parameter ESD voltage ESD Protection 1) Symbol min. Limit Values max. ±4 kV HBM, R = 1.5 kΩ, C = 100 pF TA = 25°C – Unit Notes VESD 1) Human Body Model (HBM) tests according to: EOS/ESD Association Standard S5.1-1993 and Mil. Std. 883D method 3015.7 Data Sheet 8 Rev. 1.0, 2007-09 TLE4966K Operating Range 4 Table 4 Parameter Operating Range Operating Range Symbol min. Limit Values typ. – – – – – – – max. 18 24 26 18 150 175 10 V 1 h with RS ≥ 200 Ω for 5 min RS ≥ 200 Ω 2.7 – – -0.7 -40 – 0 Unit Conditions Supply voltage VS VQ Tj IQ Output voltage Junction temperature Output current V °C for 168 h mA Data Sheet 9 Rev. 1.0, 2007-09 TLE4966K Electrical and Magnetic Parameters 5 Table 5 Parameter Electrical and Magnetic Parameters Electrical Characteristics Symbol min. 1) Limit Values typ. 5.2 0.2 0.3 0.05 0.2 0.2 320 – 13 200 1 40 13 1.45 100 max. 7 1 0.6 10 1 1 – 15 2) – 1000 – – – – – 4 0 – – – – – 0 – 50 – – – – – Unit mA mA V µA µs µs kHz kHz µs ns Conditions Supply current Reverse current Output saturation voltage Output leakage current Output fall time Output rise time Chopper frequency Switching frequency Delay time 3) IS ISR VQSAT IQLEAK tf tr fOSC fSW td tdc tQJ VS = 2.7 V ... 18 V VS = -18 V IQ = 1 0 mA for VQ = 18 V RL = 1.2 kΩ; CL < 50 pF see: Figure 3 on Page 12 Count Signal Delay Output jitter 4) µsRMS Typ. value for squarewave signal 1 kHz µTRMS Typ. value for ∆B/∆t > 12 mT/ms µs mm K/W PG-TSOP6-6-5 Repeatability of BREP magnetic thresholds 5) Power-on time 6) tPON Distance of hall plates dHALL Thermal resistance 7) RthJA VS ≥ 2.7 V 1) over operating range, unless otherwise specified. Typical values correspond to VS = 12 V and TA = 25°C 2) To operate the sensor at the max. switching frequency, the magnetic signal amplitude must be 1.4 times higher than for static fields. This is due to the -3 dB corner frequency of the low pass filter in the signal path. 3) Systematic delay between magnetic threshold reached and output switching 4) Jitter is the unpredictable deviation of the output switching delay 5) BREP is equivalent to the noise constant 6) Time from applying VS ≥ 2.7 V to the sensor until the output state is valid 7) Thermal resistance from junction to ambient Data Sheet 10 Rev. 1.0, 2007-09 TLE4966K Electrical and Magnetic Parameters Calculation of the ambient temperature (PG-TSOP6-6-5 example) e.g. for VS = 12.0 V, IStyp = 5.5 mA, VQSATtyp = 0.3 V and 2 x IQ = 10 mA : Power Dissipation: PDIS = 72.0 mW. In TA = Tj – (RthJA × PDIS) = 175°C – (100 K / W × 0.072 W) Resulting max. ambient temperature: TA = 167.8°C Table 6 Parameter Operate point Magnetic Characteristics 1). Symbol Tj [°C] min. -40 25 150 -40 25 150 -40 25 150 -40 25 150 -40 25 150 – 5.2 5.0 4.7 -10.3 -10.0 -9.5 – 10.0 – – -2.0 – – -2.0 – – Limit Values typ. 7.7 7.5 7.1 -7.7 -7.5 -7.1 – 15.0 – – 0 – – 0 – -350 max. 10.3 10.0 9.5 -5.2 -5.0 -4.7 – 20.0 – – 2.0 – – 2.0 – – Unit mT Conditions BOP BRP BHYS BMATCH Release point mT Hysteresis mT Magnetic matching mT Valid for BOP1 - BOP2 and BRP1 - BRP2 (BOP + BRP)/2 Magnetic offset BOFF mT Temperature TC compensation of magnetic thresholds ppm/°C 1) over operating range, unless otherwise specified. Typical values correspond to VS = 12 V Note: Typical characteristics specify mean values expected over the production spread. Field Direction Definition Positive magnetic fields related with south pole of magnet to the branded side of package. Data Sheet 11 Rev. 1.0, 2007-09 TLE4966K Timing Diagrams for the Speed and Direction Outputs 6 Timing Diagrams for the Speed and Direction Outputs Applied Magnetic Field BOP BRP td VQ 90% 10% tf td tr Figure 3 Timing Definition of the Speed Signal tdc tdc Speed Direction t Change of Direction Figure 4 Timing Definition of the Direction Signal Data Sheet 12 Rev. 1.0, 2007-09 TLE4966K Timing Diagrams for the Speed and Direction Outputs N S N S N Branded Side of IC S N S N S Rotation Direction S N TLE4966 Figure 5 Definition of the Direction Signal State of Direction Output VQ1 Low High Rotation Direction Left to right Right to left Data Sheet 13 Rev. 1.0, 2007-09 TLE4966K Package Information 7 7.1 Package Information Package Marking s 66 Figure 6 Year (y) = 0...9 Month (m) = 1...9, O - October N - November D - December AEA03645 Marking PG-TSOP6-6-5 7.2 Distance between Chip and Package Surface Branded Side ym 0.56 ± 0.1 mm Figure 7 Distance Chip to Upper Side of IC Data Sheet 14 d Rev. 1.0, 2007-09 TLE4966K Package Information 7.3 Package Outlines 2.9 ±0.2 (2.25) (0.35) 6 5 4 B 1.1 MAX. 0.1 MAX. 2.6 MAX. 10˚ MAX. 1 2 3 0.35 +0.1 -0.05 0.95 1.9 10˚ MAX. 0.15 +0.1 -0.06 0.2 M A 0.2 M B 6x A GPX09300 Figure 8 PG-TSOP6-6-5 (Plastic Thin Small Outline Package) PCB Footprint for PG-TSOP6-6-5 The following picture shows a recommendation for the PCB layout. 0.5 0.95 Remark: Wave soldering possible dep. on customers process conditions HLG09283 Figure 9 Footprint PG-TSOP6-6-5 You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Data Sheet 15 1.9 2.9 Dimensions in mm Rev. 1.0, 2007-09 1.6 ±0.1 +0.2 acc. to DIN 6784 www.infineon.com Published by Infineon Technologies AG
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