TLE7276D

TLE7276 Low Drop Linear Voltage Regulator 5V Fixed Output Voltage Data Sheet Rev. 1.11, 2010-11-22 Automotive Power 5-V Low Drop Voltage Regulator TLE 7276 Features • • • • • • • Output voltage 5 V ±2% Ultra low current consumption: typ. 20 μA 300 mA current capability Inhibit input Very low-drop voltage Short-circuit-proof Suitable for use in automotive electronics Functional Description The TLE 7276 is a monolithic integrated low-drop voltage regulator for load currents up to 300 mA. An input voltage up to 42 V is regulated to VQ,nom = 5.0 V with a precision of ±2%. The sophisticated design allows to achieve stable operation even with ceramic output capacitors down to 470 nF. The device is designed for the harsh environment of automotive applications. Therefore it is protected against overload, short circuit and overtemperature conditions. Of course the TLE 7276 can be used also in all other applications, where a stabilized 5 V voltage is required. Due to its ultra low stand-by current consumption of typ. 20 μA the TLE 7276 is dedicated for use in applications permanently connected to VBAT. The regulator can be shut down via an Inhibit input. An integrated output sink current circuitry keeps the voltage at the Output pin Q below 5.5 V even when reverse currents are applied. Thus connected devices are protected from overvoltage damage. For applications requiring extremely low noise levels the Infineon voltage regulator family TLE 42XY and TLE 44XY is more suited than the TLE 7276. A mV-range output noise on the TLE 7276 caused by the charge pump operation is unavoidable due to the ultra low quiescent current concept. Type TLE 7276 D TLE 7276 G Data Sheet Ordering Code Package P-TO252-5-1,P-TO252-5-11 P-TO263-5-1 Rev. 1.11, 2010-11-22 Q67006-A9733 Q67006-A9732 2 TLE 7276 I 1 TLE 7276 5 Q Overtemperature Shutdown Bandgap Reference 1 INH 2 Inhibit Charge Pump 3, Tab GND AEB03609.VSD Figure 1 Block Diagram Data Sheet 3 Rev. 1.11, 2010-11-22 TLE 7276 GND 1 I Q 5 1 I GND Q INH N.C. 5 INH N.C. PG-TO252 -5-1 .vsd PG-TO263-5-1.vsd Figure 2 Table 1 Pin No. 1 2 3 4 5 I INH Pin Configuration P-TO252-5 (D-PAK), P-TO263-5 (D2-PAK)(top view) Pin Definitions and Functions Symbol Function Input; block to ground directly at the IC with a ceramic capacitor Inhibit Input; low level disables the IC. Integrated pull-down resistor Ground; internally connected to heat sink Not connected Output; block to ground with a ceramic capacitor, C ≥ 470 nF GND N.C. Q Data Sheet 4 Rev. 1.11, 2010-11-22 TLE 7276 Table 2 Parameter Input I Voltage Current Inhibit INH Voltage Current Output Q Voltage Voltage Current Temperature Absolute Maximum Ratings Symbol Limit Values Min. Max. 45 – 45 1 5.5 6.2 – 150 150 V mA V mA V V mA °C °C – – Observe current limit IINH,max1) – – Unit Test Condition VI II VINH IINH VQ VQ IQ Tj Tstg -0.3 -1 -0.3 -1 -0.3 -0.3 -1 -40 -50 t < 10 s2) – – – Junction temperature Storage temperature 1) External resistor required to keep current below absolute maximum rating when voltages ≥ 5.5 V are applied. 2) Exposure to these absolute maximum ratings for extended periods (t > 10 s) may affect device reliability. Note: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 3 Parameter Input voltage Junction temperature Operating Range Symbol Limit Values Min. Max. 42 150 V °C – – 5.5 -40 Unit Remarks VI Tj Data Sheet 5 Rev. 1.11, 2010-11-22 TLE 7276 Table 4 Parameter Junction case Thermal Resistance Symbol Limit Values Min. Max. 8 80 55 K/W K/W K/W – TO2521) – – – Unit Remarks Junction ambient Junction ambient 1) area 300 mm2 TO2632) Worst case, regarding peak temperature; zero airflow; mounted on a PCB FR4, 80 × 80 × 1.5 mm3, heat sink × 80 × 1.5 mm3, heat sink Rthj-c Rthj-a Rthj-a 2) Worst case, regarding peak temperature; zero airflow; mounted on a PCB FR4, 80 area 300 mm2 Note: In the operating range, the functions given in the circuit description are fulfilled. Data Sheet 6 Rev. 1.11, 2010-11-22 TLE 7276 Table 5 Parameter Output Q Electrical Characteristics Symbol Limit Values Min. Typ. Max. 5.0 5.0 – – 20 – 5 250 15 5 60 0.5 – – – 3 0.5 5.1 5.1 – 800 30 40 9 500 40 20 – – – – 0.8 4 1 V V mA mA μA μA μA mV mV mV dB 0.1 mA < IQ < 300 mA; 6 V < VI < 16 V 0.1 mA < IQ < 100 mA; 6 V < VI < 40 V 1) VI = 13.5 V; VINH = 5 V; -40 °C < Tj < 150 °C (unless otherwise specified) Unit Measuring Condition Output voltage Output voltage VQ VQ 4.9 4.9 320 – – – – – -40 -20 – – 470 3.1 – – – Output current limitation IQ Output current limitation IQ Current consumption; Iq = II - IQ Current consumption; Iq = II - IQ Quiescent current; inhibited Drop voltage Load regulation Line regulation Power supply ripple rejection Temperature output voltage drift Output Capacitor Inhibit Input INH Turn-on Voltage Turn-off Voltage H-input current L-input current Iq Iq Iq Vdr ΔVQ, lo ΔVQ, li PSRR dVQ/dT VQ = 0V IQ = 0.1 mA; Tj = 25 °C IQ = 0.1 mA; Tj ≤ 80 °C VINH = 0 V; Tj < 80 °C IQ = 200 mA; Vdr = VI - VQ1) IQ = 5 mA to 250 mA Vl = 10V to 32 V; IQ = 5 mA fr = 100 Hz; Vr = 0.5 Vpp mV/K – nF V V μA μA ESR < 3 Ohm VQ ≥ 4.9 V VQ ≤ 0.3 V CQ VINH ON VINH OFF IINH ON IINH OFF VINH = 5 V VINH = 0 V; Tj < 80 °C 1) Measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5 V. Data Sheet 7 Rev. 1.11, 2010-11-22 TLE 7276 Application Information VBat 100 nF TLE 7276 1I Q5 470 nF + 4.7 µF VC C Overtemperature Shutdown Bandgap Reference 1 e. g. Ignition 2 INH Inhibit Charge Pump GND 3, Tab AEA03608.VSD Figure 3 Input, Output Application Diagram An input capacitor is necessary for damping line influences. A resistor of approx. 1 Ω in series with CI, can damp the LC of the input inductivity and the input capacitor. In contrast to most low drop voltage regulators the TLE 7276 only needs moderate capacitance at the output to assure stability of the regulation loop. This offers more design flexibility to the circuit designer providing for cost efficient solutions. The TLE 7276 requires a ceramic output capacitor of at least 470 nF. In order to damp influences resulting from load current surges it is recommended to add an additional electrolytic capacitor of 4.7 μF to 47 μF at the output as shown in Figure 3. Data Sheet 8 Rev. 1.11, 2010-11-22 TLE 7276 Additionally a buffer capacitor CB of > 10μF should be used for the output to suppress influences from load surges to the voltage levels. This one can either be an aluminum electrolytic capacitor or a tantalum capacitor following the application requirements. A general recommendation is to keep the drop over the equivalent serial resistor (ESR) together with the discharge of the blocking capacitor below the allowed Headroom of the Application to be supplied (e.g. typ. dVQ = 350mV). Since the regulator output current roughly rises linearly with time the discharge of the capacitor can be calculated as follows: dVCB = dIQ*dt/CB The drop across the ESR calculates as: dVESR = dI*ESR To prevent a reset the following relationship must be fullfilled: dVC + dVESR < VRH = 350mV Example: Assuming a load current change of dIQ = 100mA, a blocking capacitor of CB = 22µF and a typical regulator reaction time under normal operating conditions of dt ~ 25µs and for special dynamic load conditions, such as load step from very low base load, a reaction time of dt ~ 75µs. dVC = dIQ*dt/CB = 100mA * 25µs/22µF = 113mV So for the ESR we can allow dVESR = VRH2 - dVC = 350mV - 113mV = 236mV The permissible ESR becomes: ESR = dVESR / dIQ = 236mV/100mA = 2.36Ohm During design-in of the TLE7469 product family, special care needs to be taken with regards to the regulators reaction time to sudden load current changes starting from very low pre-load as well as cyclic load changes. The application note “TLE7x Voltage Regulators - Application Note about Transient Response at ultra low quiescent current Voltage Regulators” (see 3_cip05405.pdf) gives important hints for successful design-in of the Voltage Regulators of the TLE7x family. Data Sheet 9 Rev. 1.11, 2010-11-22 TLE 7276 Typical Performance Characteristics Current Consumption Iq versus Junction Temperature Tj 1_Iq-Tj.vsd Current Consumption Iq versus Input Voltage VI 3_IQ-VI.VSD Iq [µA] VI = 13.5V 100 Iq [µA] Tj = 25°C IQ = 100 µA 10 40 IQ = 50mA 30 IQ = 10mA IQ = 0.2mA 20 1 10 0.01 -40 -20 0 20 40 60 80 100 120 140 0 10 20 30 40 Tj [°C] VI [V] Current Consumption Iq versus Output Current IQ 30 2_IQ-IQ.VSD Output Voltage VQ versus Junction Temperature Tj 5A_VQ-TJ.VSD Iq [µA] Tj = 25 °C 20 VI = 13.5 V VQ [V] VI = 13.5 V Tj = -40 °C 5.05 15 5.00 IQ =100µA...100mA 10 4.95 5 4.90 0 20 40 60 100 -40 -20 0 20 40 60 80 100 120 140 IQ [mA] Tj [°C] Data Sheet 10 Rev. 1.11, 2010-11-22 TLE 7276 Dropout Voltage Vdr versus Output Current IQ 600 6_VDR-IQ.VSD Maximum Output Current IQ versus Junction Temperature Tj 620 8_IQMAX-TJ.VSD Vdr [mV] Tj = 150 °C 400 IQ [mA] VI = 13.5 V 580 300 Tj = 25 °C 560 200 Tj = -40 °C 540 100 520 0 100 200 300 500 -40 -20 0 20 40 60 80 100 120 140 IQ [mA] Tj [°C] Dropout Voltage Vdr versus Junction Temperature Tj 600 7_VDR-TJ.VSD Maximum Output Current IQ versus Input Voltage VI 600 9_SOA.VSD Vdr [mV] IQ [mA] Tj = 125 °C Tj = 25 °C IQlim 400 IQ = 250 mA 400 300 IQ = 150mA 300 200 200 Pvmax = 1,18W for TO252 @ 300mm2 cooling area 100 100 IQ = 10 mA -40 -20 0 20 40 60 80 100 120 140 0 10 20 30 40 Tj [°C] VI [V] Data Sheet 11 Rev. 1.11, 2010-11-22 TLE 7276 Region of Stability 100 12_ESR-IQ.VSD Output Voltage VQ Start-up behaviour 14_VItime_startup.vsd ESRCQ [Ω] CQ = 10nF ...10 µF Tj = 25 °C VQ [V] INH = ON 5.05 10 IQ = 5mA 1 Stable Region 0.1 5.00 4.90 4.80 0.01 0 50 100 150 200 1 2 3 4 5 IQ [mA] t [ms] Power Supply Ripple Rejection PSRR versus Frequency f 80 13_PSRR.VSD Load Regulation dVQ versus Output Current Change dIQ 0 18a_dVQ-dIQ_Vi6V.vsd PSRR [dB] ΔVQ [mV] VI = 6V 60 IQ = 30 mA IQ = 100 mA IQ = 0.1 mA -10 Tj = -40 °C 50 -15 Tj = 25 °C -20 40 30 VRIPPLE = 1 V VIN = 13.5 V CQ = 10 µF Tantalum Tj = 25 °C 100 1k 10k 100k -25 Tj = 150 °C 10 -30 0 50 100 150 250 f [Hz] IQ [mA] Data Sheet 12 Rev. 1.11, 2010-11-22 TLE 7276 Load Regulation dVQ versus Output Current Change dIQ 0 18b_dVQ-dIQ_Vi135V.vsd Line Regulation dVQ versus Input Voltage ChangedVI 0 19_dVQ-dVI__150C.vsd ΔVQ [mV] VI = 13.5V ΔVQ [mV] IQ = 1mA IQ = 10mA Tj =150 °C IQ = 100mA -10 -2 -15 Tj = -40 °C Tj = 25 °C -3 -20 -4 IQ = 200mA -25 -5 Tj = 150 °C -30 0 50 100 150 250 -6 0 5 10 15 20 25 30 35 40 45 IQ [mA] VI [V] Load Regulation dVQ versus Output Current Change dIQ 0 18c_dVQ-dIQ_Vi28V.vsd Line Regulation dVQ versus Input Voltage ChangedVI 0 19_dVQ-dVI_25C.vsd ΔVQ [mV] V I = 28 ΔVQ [mV] Tj = 25 °C -10 -2 IQ = 1mA IQ = 10mA IQ = 200mA -15 IQ = 100mA -3 -20 Tj = -40 °C Tj = 25 °C -4 -25 -5 Tj = 150 °C -30 0 50 100 150 250 -6 0 5 10 15 20 25 30 35 40 45 IQ [mA] VI [V] Data Sheet 13 Rev. 1.11, 2010-11-22 TLE 7276 Line Regulation dVQ versus Input Voltage ChangedVI 0 19_dVQ-dVI_-40C.vsd Load Transient Response Peak Voltage dVQ 20_Load Trancient vs time 125.vsd ΔVQ [mV] Tj =40 °C IQ1:100mA -2 Tj=125°C Vi=13.5V IQ = 1mA IQ = 10mA IQ = 100mA -3 IQ = 200mA -4 VQ -5 -6 0 5 10 15 20 25 30 35 40 45 T=40µs/DIV VQ=100mV/DIV VI [V] Load Transient Response Peak Voltage dVQ 20_Load Trancient vs time 25.vsd Line Transient Response Peak Voltage dVQ 21_Line Trancient vs time 25.vsd IQ1:100mA Tj=25°C Vi=13.5V dVI 2V Tj=25°C Vi=13.5V VQ VQ T=40µs/DIV VQ=100mV/DIV T=400µs/DIV VQ=50mV/DIV Data Sheet 14 Rev. 1.11, 2010-11-22 TLE 7276 Line Transient Response Peak Voltage dVQ 21_Line Trancient vs time 125.vsd Inhibit Input Current IINH versus Input Voltage VI, INH=Off 25_IINH vs VIN INH_off.vsd dVI 2V Tj=125°C Vi=13.5V [µA] 1.0 IINH INH = OFF 0.8 Tj = 150°C Tj = 25°C Tj = -40°C 0.6 VQ 0.4 0.2 T=400µs/DIV VQ=50mV/DIV 10 20 30 40 VIN [V] Inhibit Input Current IINH versus Inhibit Input Voltage VINH 24_IINH vs VINH.vsd Thermal Resistance Junction-Ambient RTHJA versus Power Dissipation PV 75 32_RTH VS PV TO252.VSD [µA] 50 IINH Tj = 150°C RTH-JA [K/W] A = 300mm2 Cooling Area single sided PCB Tj = 25°C 40 65 TO252-3 Tj = -40°C 30 60 TO252-5 20 55 10 50 10 20 30 40 3 6 9 12 VINH [V] PV [W] Data Sheet 15 Rev. 1.11, 2010-11-22 TLE 7276 Package Outlines 6.5 +0.15 -0.10 2.3 +0.05 -0.10 B A 1 ±0.1 0...0.15 0.9 +0.08 -0.04 1 ±0.1 5.4 ±0.1 9.9 ±0.5 6.22 -0.2 0.8 ±0.15 (4.17) 0.15 max per side 0.51 min 5x0.6 ±0.1 1.14 0.5 +0.08 -0.04 0.1 4.56 0.25 M AB GPT09161 All metal surfaces tin plated, except area of cut. Figure 4 P-TO252-5-1 (Plastic Transistor Single Outline) Data Sheet 16 Rev. 1.11, 2010-11-22 TLE 7276 6.5 +0.15 -0.05 5.7 MAX. (4.24) 1 ±0.1 1) A B 0.8 ±0.15 2.3 +0.05 -0.10 0.5 +0.08 -0.04 (5) 9.98 ±0.5 6.22 -0.2 0.9 +0.20 -0.01 0...0.15 0.51 MIN. 0.15 MAX. per side 5 x 0.6 ±0.1 1.14 0.5 +0.08 -0.04 0.1 B 4.56 0.25 M A B 1) Includes mold flashes on each side. All metal surfaces tin plated, except area of cut. Figure 5 P-TO252-5-11 (Plastic Transistor Single Outline) 5.8 10.6 6.4 0.8 5.36 Figure 6 Foot Print for P-TO-252-5-1 and P-TO-252-5-11 (Plastic Transistor Single Outline) Data Sheet 17 2.2 Rev. 1.11, 2010-11-22 TLE 7276 4.4 10 ±0.2 0...0.3 8.5 1) A 1.27 ±0.1 B 0.05 1±0.3 (15) 9.25 ±0.2 7.55 1) 2.4 0.1 0...0.15 5 x 0.8 ±0.1 4 x 1.7 0.25 M 4.7 ±0.5 2.7 ±0.3 0.5 ±0.1 8˚ MAX. AB 0.1 B 1) Typical Metal surface min. X = 7.25, Y = 6.9 All metal surfaces tin plated, except area of cut. GPT09113 Figure 7 P-TO263-5-1 (Plastic Transistor Single Outline) 10.8 16.15 4.6 9.4 0.6 1.1 7.9 Figure 8 Foot Print for P-TO263-5-1 (Plastic Transistor Single Outline) You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Data Sheet 18 Dimensions in mm Rev. 1.11, 2010-11-22 TLE 7276 Remarks TLE 7276 D 5-V Low Drop Voltage Regulator Revision History: 2010-11-22 Previous Version: Page 4 all 1.1 Subjects (major changes since last revision) Pin configuration: Typo corrected (No change of product, process or test) New Infineon-Layout and Cover added Rev. 1.11 Data Sheet 19 Rev. 1.11, 2010-11-22 Edition 2010-11-22 Published by Infineon Technologies AG 81726 Munich, Germany © 2010 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. 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