D a t a S he et , R e v i s i on 2. 0 , J u l y 20 0 7
TUA 6039F-2, TUA 6037F
3 B and D i gita l / H yb r id T u ner I C wit h inte gr at ed IF A G C amp lifier O mni T un e™ T U A 6 03 9F -2 , O mni T un e™ T U A 6 03 7F
Co mmu nicat i on So lutio ns
Edition 2007-07-20 Published by Infineon Technologies AG 81726 München, Germany
© Infineon Technologies AG 2007. All Rights Reserved.
Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of noninfringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
D a t a S he et , R e v i s i on 2. 0 , J u l y 20 0 7
TUA 6039F-2, TUA 6037F
3 B and D i gita l / H yb r id T u ner I C wit h inte gr at ed IF A G C amp lifier O mni T un e™ T U A 6 03 9F -2 , O mni T un e™ T U A 6 03 7F
Co mmu nicat i on So lutio ns
TUA 6039F-2, TUA 6037F
TUA 6039F-2, TUA 6037F Revision History: Previous Version: Page all 9, 11 23 24 - 27 45 - 46 2007-07-20 2007-05-23 Data Sheet, Revision 2.0 Preliminary Data Sheet, Revision 1.0
Subjects (major changes since last revision) Status “Preliminary” and “Confidential” removed. Formatting of document cross-references updated. DMB-TH standard added. Functional Block Diagram of TUA 6037F added. Functional Description updated for PLL, Loop-Thru and added for ADC. Table footnotes updated.
We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: horst.klein@infineon.com
Data Sheet
4
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Table of Contents
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1 2 2.1 2.1.1 2.1.2 2.1.3 2.1.4 2.1.5 2.2 2.2.1 3 3.1 3.2 3.3 3.4 3.4.1 3.4.2 3.4.3 3.4.4 3.4.5 3.4.6 3.4.7 4 4.1 4.2 4.3 4.4 4.5 5 5.1 5.1.1 5.1.2 5.1.3 5.2 5.3 Product Info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mixer/Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SAW Filter Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IF AGC Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Recommended band limits in MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Definition and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mixer-Oscillator block with SAW filter driver . . . . . . . . . . . . . . . . . . . . . PLL block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IF AGC amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I2C-Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Loop thru . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tuner application block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Application circuit for hybrid application . . . . . . . . . . . . . . . . . . . . . . . . . . . Application circuit for ATSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Application circuit for DVB-T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Application circuit for ISDB-T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AC/DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I2C Bus Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 10 10 10 11 11 11 11 11 13 13 15 22 24 24 24 25 25 26 26 27 28 28 29 30 31 32 33 33 33 35 35 46 52
Data Sheet
5
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
5.4 5.4.1 5.4.2 5.4.3 5.4.4 5.4.5 5.4.6 5.4.7 5.4.8 5.5 5.5.1 5.5.2 5.5.3 5.5.4 5.5.5 5.5.6 5.5.7 5.5.8 6
Electrical Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input admittance (S11) of the LOW band mixer (30 to 200 MHz) . . . . . Input impedance (S11) of the MID band mixer (130 to 500 MHz) . . . . . Input impedance (S11) of the HIGH band mixer (400 to 1000 MHz) . . . Output admittance (S22) of the of the mixers (30 to 60 MHz) . . . . . . . . Input admittance (S11) of the SAW filter driver (30 to 60 MHz) . . . . . . . Output impedance (S22) of the SAW filter driver (30 to 60 MHz) . . . . . Input admittance (S11) of the IF AGC amplifier (30 to 60 MHz) . . . . . . Output impedance (S22) of the IF AGC amplifier (30 to 60 MHz) . . . . . Measurement Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gain (GV) measurement in LOW band . . . . . . . . . . . . . . . . . . . . . . . . . Gain (GV) measurement in MID and HIGH bands . . . . . . . . . . . . . . . . Matching circuit for optimum noise figure in LOW band . . . . . . . . . . . . Noise figure (NF) measurement in LOW band . . . . . . . . . . . . . . . . . . . Noise figure (NF) measurement in MID and HIGH bands . . . . . . . . . . . Cross modulation measurement in LOW band . . . . . . . . . . . . . . . . . . . Cross modulation measurement in MID and HIGH bands . . . . . . . . . . . Ripple susceptibility (RSC) measurement . . . . . . . . . . . . . . . . . . . . . . .
53 53 53 54 54 55 55 56 56 57 57 57 58 58 59 59 60 60
Package VQFN-48 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Data Sheet
6
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
List of Tables
Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 Table 7 Table 8 Table 9 Table 10 Table 11 Table 12 Table 13 Table 14 Table 15 Table 16 Table 17 Table 18 ATSC tuners . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DVB-T and analog tuners . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISDB-T tuners . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Definition and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AC/DC Characteristics, TA = 25°C, VCC = 5 V . . . . . . . . . . . . . . . . . . . Bit Allocation Read/Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Description of Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Address selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Test modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reference divider ratios . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF AGC take-over point. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A to D converter levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Charge pump current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internal band selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Defaults at power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Description of modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 12 12 15 33 35 35 46 47 48 48 49 49 50 50 50 51 51
Data Sheet
7
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
List of Figures
Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 Figure 18 Figure 19 Figure 20 Figure 21 Pin Configuration of TUA 6039F-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Configuration of TUA 6037F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Block Diagram of TUA 6039F-2 . . . . . . . . . . . . . . . . . . . . . Functional Block Diagram of TUA 6037F. . . . . . . . . . . . . . . . . . . . . . . Functional Block Diagram of Loop thru . . . . . . . . . . . . . . . . . . . . . . . . Tuner application block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Circuit diagram for hybrid application (DVB-T / PAL). . . . . . . . . . . . . . Circuit diagram for ATSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Circuit diagram for DVB-T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Circuit diagram for ISDB-T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I2C Bus Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gain (GV) measurement in LOW band . . . . . . . . . . . . . . . . . . . . . . . . Gain (GV) measurement in MID and HIGH bands. . . . . . . . . . . . . . . . Matching circuit for optimum noise figure in LOW band . . . . . . . . . . . Noise figure (NF) measurement in LOW band. . . . . . . . . . . . . . . . . . . Noise figure (NF) measurement in MID and HIGH bands . . . . . . . . . . Cross modulation measurement in LOW band . . . . . . . . . . . . . . . . . . Cross modulation measurement in MID and HIGH bands . . . . . . . . . . Ripple susceptibility measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . PG-VQFN-48 Vignette . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PG-VQFN-48 Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 14 22 23 27 28 29 30 31 32 52 57 57 58 58 59 59 60 60 61 61
Data Sheet
8
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Product Info
1
Product Info
General Description The TUA 6039F-2, TUA 6037F device combines a mixer-oscillator function and an IF AGC amplifier with a digitally programmable phase locked loop (PLL) for use in analog and digital terrestrial applications. Features General • • Supply voltage 5 Volt Narrowband RF AGC detector for internal tuner with - 5 programmable take over points - 2 programmable time constants - RF AGC buffer output Low phase noise Full ESD protection Qualified according to JEDEC for consumer applications Three band tuner Unbalanced highohmic LOW input Balanced lowohmic MID input Balanced lowohmic HIGH input Two pin oscillators for LOW/MID band Four pin oscillator for HIGH band 4 IF pins to connect a 2 pole bandpass Symmetrical SAW filter driver Fully balanced IF AGC amplifier PLL • • • • • • • • • I2C bus 4 pin-programmable I2C addresses High voltage VCO tuning output 4 PNP ports, 1 NPN port/ADC input1) Internal LOW/MID/HIGH band switch X_TAL 4 MHz, X_TAL buffer output 6 reference divider ratios 4 charge pump currents Bus controlled power down mode
• • •
Power management
Mixer/Oscillator • • • • • • • • •
Application • The IC is suitable for PAL, NTSC, SECAM, DVB-C, DVB-T, T-DMB, DMB-TH, DAB, ISDB-T, Open Cable and ATSC tuners.
SAW filter driver and IF-Amplifier
1) ADC function is only available in TUA 6039F-2.
Ordering Information Type TUA 6039F-2 TUA 6037F Ordering Code SP000315897 SP000315896 Package PG-VQFN-48 PG-VQFN-48
Data Sheet
9
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Product Description
2
Product Description
The TUA 6039F-2, TUA 6037F ’OmniTune™TUA 6039F-2, OmniTune™TUA 6037F’ device combines a mixer-oscillator block with a digitally programmable phase locked loop (PLL) and a variable gain IF AGC amplifier for use in TV and VCR tuners, set-topbox and mobile applications. Integrated narrow band RF AGC functions with output buffer are provided. The mixer-oscillator block includes three balanced mixers (one mixer with an unbalanced high-impedance input and two mixers with a balanced low-impedance input), two 2-pin asymmetrical oscillators for the LOW and the MID band, one 4-pin symmetrical oscillator for the HIGH band, a reference voltage and a band switch. The mixer output signal passes a SAW filter driver and an IF AGC amplifier to provide constant output level ready for A/D sampling. The PLL block with four pin programmable chip addresses forms a digitally programmable phase locked loop. With a 4 MHz quartz crystal, the PLL permits precise setting of the frequency of the tuner oscillator up to 1024 MHz in increments of 31.25, 50, 62.5, 125, 142.86 or 166.7 kHz. The tuning process is controlled by a microprocessor via an I2C bus. A flag is set when the loop is locked. The lock flag can be read by the processor via the I2C bus. The device has 5 output ports and a X_TAL output buffer. One of the ports (P4) can be also used as input for a 5-level A to D converter (only available in TUA 6039F-2).
2.1 2.1.1
• •
Features General
• • •
Supply voltage 5 Volt Narrowband RF AGC detector for internal tuner with - 5 programmable take over points - 2 programmable time constants - RF AGC buffer output Low phase noise Full ESD protection Qualified according to JEDEC for consumer applications
2.1.2
• • • • • •
Mixer/Oscillator
High impedance mixer input (common emitter) for LOW band Low impedance mixer input (common base) for MID band Low impedance mixer input (common base) for HIGH band 2 pin oscillator for LOW band 2 pin oscillator for MID band 4 pin oscillator for HIGH band
10 Revision 2.0, 2007-07-20
Data Sheet
TUA 6039F-2, TUA 6037F
Product Description
2.1.3
• •
SAW Filter Driver
4 IF pins to connect a 2 pole bandpass Symmetrical IF preamplifier with low output impedance able to drive a compensated SAW filter (500 Ω//40 pF)
2.1.4
•
IF AGC Amplifier
Symmetrical variable gain IF output amplifier with low noise, high linearity, high dynamic range.
2.1.5
• • • • • • • • • •
PLL
4 pin-programmable I2C addresses I2C bus protocol compatible with 3.3 V and 5 V micro-controllers up to 400 kHz High voltage VCO tuning output 4 PNP ports 1 NPN port/ADC input1) Power down mode Internal LOW/MID/HIGH band switch Lock-in flag 6 programmable reference divider ratios (24, 28, 32, 64, 80, 128) 4 programmable charge pump currents
2.2
• •
Application
The IC is suitable for PAL, NTSC, SECAM, DVB-C, DVB-T, T-DMB, DMB-TH, DAB, ISDB-T, Open Cable and ATSC tuners. The focus is on digital terrestrial. The AGC stage makes the tuner AGC independent of the Video-IF AGC.
2.2.1
Table 1
Recommended band limits in MHz
ATSC tuners RF input Oscillator max 157.25 451.25 861.25 min 101 209 503 max 203 497 907
Band LOW MID HIGH
min 55.25 163.25 457.25
1) ADC function is only available in TUA 6039F-2.
Data Sheet
11
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Product Description
Table 2
DVB-T and analog tuners RF input Oscillator max 154.25 439.25 863.25 min 87.15 200.15 486.15 max 193.15 478.15 902.15
Band LOW MID HIGH
min 48.25 161.25 447.25
Table 3
ISDB-T tuners RF input Oscillator max 167 467 767 min 150 230 530 max 224 524 824
Band LOW MID HIGH
min 93 173 473
Note: Tuning margin of 3 MHz not included.
Data Sheet
12
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Functional Description
3
3.1
Functional Description
Pin Configuration
48 n.c. 1 P4/ADC 2 OSCHIGHIN 3 OSCHIGHOUT 4 OSCHIGHOUT 5 OSCHIGHIN 6 GNDA 7 n.c. 8 SAWOUT 9 SAWOUT 10 VT 11 CP 12
47 46 45
44 43 42
41 40 39
38 37 36 GNDRF 35 MIXOUT 34 SAWIN 33 SAWIN 32 MIXOUT
TUA6039F-2 VQFN-48 package
31 VCC 30 RFAGC 29 P0 28 P1 27 P2 26 P3 49 25 X_TAL_IN
13 14 15 16
17 18 19
20 21 22
23 24 GND package
Figure 1
Pin Configuration of TUA 6039F-2
Data Sheet
13
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Functional Description
48 47 GNDRF 1 MIXOUT 2 SAWIN 3 SAWIN 4 MIXOUT 5 VCC 6 RFAGC 7 P0 8 P1 9 P2 10 P3 11 X_TAL_IN 12 13 14
46 45 44
43 42 41
40 39 38
37 36 n.c. 35 P4 34 OSCHIGHIN 33 OSCHIGHOUT 32 OSCHIGHOUT
TUA6037F VQFN-48 package
31 OSCHIGHIN 30 GNDA 29 n.c. 28 SAWOUT 27 SAWOUT 26 VT 49 25 CP
15 16 17
18 19 20
21 22 23 24 GND package
Figure 2
Pin Configuration of TUA 6037F
Data Sheet
14
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Functional Description
3.2
Table 4 Pin No.1) 1 (36) 2 (35)
Pin Definition and Functions
Pin Definition and Functions Symbol Equivalent I/O Schematic Average DC voltage at VCC = 5V LOW n.c. P4/ADC input2) (P4)
2
MID
HIGH
(35)
0V+ 0V+ 0V+ VCE or VCE or VCE or VCC VCC VCC
3 (34) 4 (33) 5 (32) 6 (31)
OSCHIGHIN OSCHIGHOUT OSCHIGHOUT OSCHIGHIN
4 5
2.3 V 2.1 V 2.1V 2.3 V
3
6
7 (30) 8 (29) 9 (28)
GNDA n.c. SAWOUT
Analog ground
0V 2.5 V 2.5 V
0V 2.5 V 2.5 V
0V 2.5 V 2.5 V
10 (27) SAWOUT
9
10
Data Sheet
15
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Functional Description Pin No.1) Symbol Equivalent I/O Schematic Average DC voltage at VCC = 5V LOW 11 (26) VT 12 (25) CP VT 1.4 V MID VT 1.4 V HIGH VT 1.4 V
12
11
13 (24) IFAMPIN 14 (23) IFAMPIN
13 14
2.6 V 2.6 V
2.6 V 2.6 V
2.6 V 2.6 V
15 (22) IFAMPAGC
n.a.
n.a.
n.a.
15
16 (21) IFAMPOUT 17 (20) IFAMPOUT
3.3 V 3.3 V
3.3 V 3.3 V
3.3 V 3.3 V
16
17
Data Sheet
16
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Functional Description Pin No.1) Symbol Equivalent I/O Schematic Average DC voltage at VCC = 5V LOW 18 (19) X_TAL_BUF
DC bias 18
MID 4V
HIGH 4V
4V
XTAL
19 (18) AS
n.a.
n.a.
n.a.
19
20 (17) SCL
n.a.
n.a.
n.a.
20
Data Sheet
17
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Functional Description Pin No.1) Symbol Equivalent I/O Schematic Average DC voltage at VCC = 5V LOW 21 (16) SDA n.a MID n.a HIGH n.a
21
22 (15) GNDACK 23 (14) GNDD 24 (13) X_TAL_CAP 25 (12) X_TAL_IN
Acknowledge ground Digital ground
0 0 0.6 V 1.2 V
0 0 0.6 V 1.2 V
0 0 0.6 V 1.2 V
25 24
26 (11) P3
0 V or 0 V or 0 V or VCC - VCC - VCC VCE VCE VCE
26, 27, 28, 29
27 (10) P2
0 V or 0 V or 0 V or VCC - VCC - VCC VCE VCE VCE 0 V or 0 V or 0 V or VCC - VCC - VCC VCE VCE VCE 0 V or 0 V or 0 V or VCC - VCC - VCC VCE VCE VCE
28 (9)
P1
29 (8)
P0
Data Sheet
18
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Functional Description Pin No.1) 30 (7) Symbol Equivalent I/O Schematic Average DC voltage at VCC = 5V LOW RFAGC MID HIGH VRFAGC VRFAGC VRFAGC
30
31 (6) 33 (4) 34 (3)
VCC SAWIN SAWIN
supply voltage
VCC VCC VCC
VCC VCC VCC
VCC VCC VCC
33
34
32 (5) 35 (2)
MIXOUT MIXOUT
32 35
VCC VCC
VCC VCC
VCC VCC
Oscillator
36 (1)
GNDRF
RF ground
0.0 V
0.0 V
0.0 V
Data Sheet
19
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Functional Description Pin No.1) Symbol Equivalent I/O Schematic Average DC voltage at VCC = 5V LOW 37 (48) LOWIN 2V MID HIGH
37
38 (47) MIDIN 39 (46) MIDIN
1V 1V
38
39
40 (45) HIGHIN 41 (44) HIGHIN
1V 1V
40
41
42 (43) RFAGC_BUF
VRFAGC VRFAGC VRFAGC
42
Data Sheet
20
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Functional Description Pin No.1) Symbol Equivalent I/O Schematic Average DC voltage at VCC = 5V LOW 43 (42) OSCLOWOUT 44 (41) OSCLOWIN
43 44
MID
HIGH
1.8 V 2.3 V
45 (40) GNDOSC 46 (39) OSCMIDIN 47 (38) OSCMIDOUT
Oscillator ground
0.0 V
0.0 V 2.3 V 1.8 V
0.0 V
47 46
48 (37) n.c. 49 (49) GND package Exposed pad ground
2) ADC function is only available in TUA 6039F-2.
0.0 V
0.0 V
0.0 V
1) Pin numbering for TUA 6039F-2 (Pin numbering for TUA 6037F in parentheses).
Data Sheet
21
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Functional Description
3.3
Functional Block Diagram
48
47
46
45
44
43
42
41
40
39
38
37
n.c.
1
36
GNDRF
Oscillator LOW P4/ADC
2 P4 ADC
Mixer HIGH
35
3
Oscillator MID
Mixer MID
34
4
33
Oscillator HIGH
5
Mixer LOW RF AGC Buffer SAW Filter Driver
32
6
31 VCC 30
7
Prog. Divider
Lock Detector
fdiv
AGC Detector
AGC
ADC
8
ADC
P4
29
P0
1/N Divider
9
FL
PORTS Charge Pump Phase/ Freq Comp
fref
28
P1
10
Reference Divider
27
P2
11
IF AGC Amplifier
12
Crystal Oscillator Buffer
Crystal Oscillator I2C Bus
26
P3
25
X_TAL_IN
13
14
15
16
17
18
19
20
21
22
23
24
TUA6039F-2
Figure 3
Functional Block Diagram of TUA 6039F-2
Data Sheet
22
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Functional Description
48
47
46
45
44
43
42
41
40
39
38
37
GNDRF
1
36
n.c.
Mixer HIGH
2
Oscillator LOW
P4 35
P4
3
Mixer MID
Oscillator MID
34
4
33
Mixer LOW
5
Oscillator HIGH
32
RF AGC Buffer SAW Filter Driver Prog. Divider
6 VCC 7
31
30
AGC Detector P0
8 AGC P4 FL
Lock Detector
fdiv
29
1/N Divider
28
fref
P1
9
PORTS Reference Divider Phase/ Freq Comp Charge Pump
P2
10
27
P3
11
Crystal Oscillator I2C Bus
Crystal Oscillator Buffer
26
IF AGC Amplifier
25
X_TAL_IN
12
13
14
15
16
17
18
19
20
21
22
23
24
TUA6037F
Figure 4
Functional Block Diagram of TUA 6037F
Data Sheet
23
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Functional Description
3.4 3.4.1
Circuit Description Mixer-Oscillator block with SAW filter driver
The mixer-oscillator block includes three balanced mixers (one mixer with an unbalanced high-impedance input and two mixers with a balanced low-impedance input), two 2-pin asymmetrical oscillators for the LOW and the MID band, one 4-pin symmetrical oscillator for the HIGH band, an SAW filter driver, a reference voltage and a band switch. Filters between tuner input and IC separate the TV frequency signals into three bands. The band switching in the tuner front-end is done by using three PNP port outputs. In the selected band the signal passes a tuner input stage with a MOSFET amplifier, a doubletuned bandpass filter and is then fed to the mixer input of the IC which has in case of LOW band a high-impedance input and in case of MID or HIGH band a low-impedance input. The input signal is mixed there with the signal from the activated on chip oscillator to the IF frequency. The IF is filtered by means of an IF filter in between the 2 mixer output pins and the 2 input pins of the following SAW filter driver. The SAW filter driver has a low output impedance to drive the SAW filter directly.
3.4.2
PLL block
The oscillator signal is internally DC-coupled as a differential signal to the programmable divider inputs. The signal subsequently passes through a programmable divider with ratio N = 256 through 32767 and is then compared in a digital frequency/phase detector with a reference frequency fref = 31.25, 50, 62.5, 125, 142.86 or 166.67 kHz. This frequency is derived from a low-impedance 4 MHz crystal oscillator (pins XTALIN, XTALCAP) divided by 128, 80, 64, 32, 28 or 24. The reference frequencies will be different with a quartz other than 4 MHz. The phase detector has two outputs which drive four current sources of a charge pump. If the negative edge of the divided VCO signal appears prior to the negative edge of the reference signal, the positive current source pulses for the duration of the phase difference. In the reverse case the negative current source pulses. If the two signals are in phase, the charge pump output (CP) goes into the high-impedance state (PLL is locked). An active low-pass filter integrates the current pulses to generate the tuning voltage for the VCO (internal amplifier, external pull-up resistor at VT and external RC circuitry). The charge pump output is also switched into the high-impedance state if the control bits T2, T1, T0 = 0, 1, 0. Here it should be noted, however, that the tuning voltage can alter over a long period in the high impedance state as a result of self discharge in the peripheral circuity. VT may be switched off by the control bit OS to allow external adjustments. If the VCO is not oscillating the PLL locks to a tuning voltage of 33V (VTH). By means of control bits CP, T0, T1 and T2 the pump current can be switched between four values by software. This programmability permits alteration of the control response
Data Sheet 24 Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Functional Description of the PLL in the locked-in state. In this way different VCO gains can be compensated, for example. Furthermore, in order to obtain best results for phase noise, reference frequency rejection and PLL stability especially in a wideband system like a digital tuner, it is necessary to set the charge pump current to different values depending on the band and frequency used. This is to cope with the variations of the different parameters that set the bandwidth. The selection can be done in the application and requires for each frequency to program not only the divider ratios, but also the band and the best charge pump current. The software controlled ports P0 to P4 are general purpose open-collector outputs. The test bits T2, T1, T0, OS = 0, 1, 0, 1 switch the test signals fdiv / 2 (divided input signal) and fref (i.e. 4 MHz / 64) to P0 and P1 respectively. The lock detector resets the lock flag FL if the width of the charge pump current pulses is greater than the period of the crystal oscillator (i.e. 250 ns). Hence, if FL = 1, the maximum deviation of the input frequency from the programmed frequency is given by
∆f = ± IP ∗ (KVCO / fXTAL) ∗ (C1 + C2) / (C1 ∗ C2)
where IP is the charge pump current, KVCO the VCO gain, fXtal the crystal oscillator frequency and C1, C2 the capacitances in the loop filter (see Section 4.2). As the charge pump pulses at i.e. 62.5 kHz (= fref), it takes a maximum of 16 µs for FL to be reset after the loop has lost lock state. Once FL has been reset, it is set only if the charge pump pulse width is less than 250 ns for eight consecutive fref periods. Therefore it takes between 128 and 144 µs for FL to be set after the loop regains lock.
3.4.3
RF AGC
The RF AGC stage detects the level of the SAW filter driver output signal. If the detected level is below the RF AGC take-over point, a external capacity will be charged with the source current of 300 nA or 9 µA (release current). If the detected level is above the RF AGC take-over point, the external capacity will be discharged with the sink current of 100 µA (attack current). The integrated current generates the AGC voltage for gain control of the tuners input transistors. The RF AGC take-over and the time constant are selectable by the I2C bus (see Table 13). An integrated RF AGC buffer allows to monitor the AGC voltage without any influence on the tuner gain control.
3.4.4
IF AGC amplifier
Coming out of the SAW filter the IF signal is sent through a VGA (Variable Gain Amplifier) which will set the differential IF output signal to the desired level (preferably 1 Vpp). The gain of the VGA is determined by the DC-voltage at pin IFAMPAGC
Data Sheet
25
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Functional Description
3.4.5
I2C-Bus Interface
Data is exchanged between the processor and the PLL via the I2C bus. The clock is generated by the processor (input SCL). Pin SDA functions as an input or output depending on the direction of the data (open collector, external pull-up resistor). Both inputs have a hysteresis and a low-pass characteristic, which enhance the noise immunity of the I2C bus. The data from the processor pass through an I2C bus controller. Depending on their function the data are subsequently stored in registers. If the bus is free, both lines will be in the marking state (SDA, SCL are high). Each telegram begins with the start condition and ends with the stop condition. Start condition: SDA goes low, while SCL remains high. Stop condition: SDA goes high while SCL remains high. All further information transfer takes place during SCL = low, and the data is forwarded to the control logic on the positive clock edge. The table ’Bit Allocation’ (see Table 8) should be referred to for the following description. All telegrams are transmitted byte-by-byte, followed by a ninth clock pulse, during which the control logic returns the SDA line to low (acknowledge condition). The first byte is comprised of seven address bits. These are used by the processor to select the PLL from several peripheral components (address select). The LSB bit (R/W) determines whether data are written into (R/W = 0) or read from (R/W = 1) the PLL. In the data portion of the telegram during a WRITE operation, the MSB bit of the first or third data byte determines whether a divider ratio or control information is to follow. In each case the second byte of the same data type has to follow the first byte. Appropriate setting of the test bits will decide whether the band-switch byte or the auxiliary byte will be transmitted (see Table 11). If the address byte indicates a READ operation, the PLL generates an acknowledge and then shifts out the status byte onto the SDA line. If the processor generates an acknowledge, a further status byte is output; otherwise the data line is released to allow the processor to generate a stop condition. The status word consists of three bits from the A/D converter, the lock flag and the power-on flag. Four different chip addresses can be set by an appropriate DC level at pin AS (see Table 10). While the supply voltage is applied, a power-on reset circuit prevents the PLL from setting the SDA line to low, which would block the bus. The power-on reset flag POR is set at power-on and if VCC falls below 2 V. It will be reset at the end of a READ operation.
3.4.6
Loop thru
For the tuner prestage alignment a programmable switch is integrated to bypass the bandpass, the SAW filter driver and the SAW filter. If "Loop thru" is active the mixer output signal in front of the external bandpass is fed into the IF AGC amplifier as shown in Figure 5.
Data Sheet 26 Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Functional Description
Bandpass
Loop thru control = bit 0 of Auxiliary byte
MIXER input MIXER
Loop thru IF AGC
IF AGC output
SAW Filter SAWDRV
Figure 5
Functional Block Diagram of Loop thru
This results in a flat frequency response from the mixer input to the IF amplifier output and allows tuner alignment without the need of an external resistor.
3.4.7
ADC1)
A built-in 5 level Analog to Digital converter is available on P4/ADC pin. This converter can be used to read out an external AFC information via the I2C-BUS interface. The relationship between the external voltage at P4/ADC pin and the bits A2, A1 and A0 is given in Table 14. P4 output port cannot be used and the corresponding bit needs to be programmed to logic 0 when the ADC is in use.
1) ADC function is only available in TUA 6039F-2.
Data Sheet
27
Revision 2.0, 2007-07-20
4
4.1
Figure 6
Data Sheet
VCC IF Bandfilter
Application
HIGH
AGC
SAW 30...60 MHz
SAWDriver
external AGC to Channel Decoder
IF Amplifier
Antenna input AGC
MID
AGC
Detector small
AGC Buffer
AGC
Tuner application block diagram
Tuner application block diagram
P N Ports
28
CP PD R
P0 P1 P2 P3 P4 SCL
I2C
SDA AS
LOW
~~~ ~~~ ~~~
~ ~ ~
X_Tal Buffer
Power Supply
VCC
Buffered 4 MHz 4 MHz
LOW
MID
HIGH
TUA6039F-2 Tuner Application + 33 V
TUA 6039F-2, TUA 6037F
Application
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Application
4.2
Application circuit for hybrid application
+,&+
*1' ; 0$&20 (7& 0$&20 (7&
0,'
; *1'
*1' 5 5 & S %% & / WXUQV 5 N
*1' 5 5 & S 5 N
/2:
; *1'
*1'
*1'
5 5
*1'
75
75 & Q
%% &
/ WXUQV
'
'
*1' & S 9&& & S *1'
$*&B%8)
& S & S
& S
& Q
& Q
& S
& & S Q
& S
*1' 0,',1< /2:,1 *1'5) 0,;287; 6$:,1; 6$:,1< 0,;287< 9&& 5)$*& 3 3 3 3 ;B7$/B&$3 *1' SDF NDJH
26 &0,',1
+,*+,1;
26&/2:,1
+,*+,1<
26&0,'287
*1'
*1' 3 5 N
&
QS
5 N
QF 3/ADC
26&/2:287
5)$*&B%8)
*1'26&
0,',1;
& QS
QF
*1' 5 / QS 5 5 & 5S6 5
& S /
*1'
9&&
&
S
& &
S S
26&+,*+,1; 26&+,*+287<
Q+ 5 QS / Q+ & S *1' 5 5 & QS *1' 9&& 5)$*& 3 3 3 3
%%
'
WXUQV
/
& S & S
26&+,*+287;
*1'
5 5
5 N
26&+,*+,1< *1'$ QF 6$:287;
,& 78$F-2 94)1
&
Q
*1' / *1' *1' *1' *1' *1'
QS
*1'
& Q
& Q & & & Q Q Q
6$:287< & Q 5 N
,)$03287;
,)$03287<
,)$03,1;
,)$03,1<
;B7$/B%8)
97 ,)$03$*& &3
& S 5 N
Q *1' *1' & S 5 N
$6
&
*1''
&
Q
*1'$& .
5 N
;B7$/B,1
6'$
6& /
& S & S *1' 0+] 4
5 N & 5 N Q *1'
*1' 5 5 5 5 & Q *1' 5 N *1' & & Q S & Q & Q ; *1' 6& / $6 & S *1' 6'$ & S *1' & Q *1' 5 5 5
97
03
,1
*1'
,1
287 287
6$: 6,3 ' ;'
,)$03$*&
; WDOB%XI
*1'
*1' ,)
*1' *1'
*1'
QF *1' 6&/ 6'$
,) 287
,)287
-
QF
,ð& %86
75 72.2$ 75$16)250(5
*1'
;
,)
Figure 7
Circuit diagram for hybrid application (DVB-T / PAL)
Note: TUA 6037F has different pinning and no ADC function.
Data Sheet
*1'
29
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Application
4.3
Application circuit for ATSC
+,&+
*1' ; 0$&20(7& 0$&20(7&
0,'
; *1'
*1' 5 5 & S %%& / WXUQV 5 N
*1' 5 5 & S 5 N
/2:
; *1'
*1'
*1'
5 5
*1'
75
%%&
75 & Q
/ WXUQV
'
'
*1' & S 9&& 26&0,',1 & S *1' QF *1' QF 26&0,'287 *1'26& 26&/2:,1 26&/2:287 & S & & S Q
$*&B%8)
& S & S +,*+,1;
& S
& Q
& Q
& S 0,',1; 0,',1< /2:,1 *1'5) 0,;287; 6$:,1; 6$:,1< 0,;287< 9&& 5)$*& 3 3 3 3 ;B7$/B,1 +,*+,1< *1' *1' SDFNDJH & Q & Q & Q & Q & & Q Q *1' *1' *1' *1' *1' *1' / QS / QS 5 5 *1' 5 5 & S 5 QS / Q+ & S *1'
5)$*&B%8)
& QS *1' 3 5 N & %% WXUQV / ' & S & QS 5 N
& S /
*1'
9&&
3/ADC & S S
26&+,*+,1; 26&+,*+287< 26&+,*+287; 26&+,*+,1< *1'$ QF 6$:287;
Q+ 5 5 & QS *1' 9&& 5)$*& 3 3 3 3
& S & S
*1'
5 5
5 N
,& 78$F-2 94)1 $76&
*1'
6$:287< & Q 5 N 5 N & Q *1' *1' & S 5 N 5 N & Q 5 N *1' 5 & S N & Q ,)$03287; ,)$03287< 97 ,)$03,1; ,)$03,1< ,)$03$*&
;B7$/B%8)
*1''
6'$
6&/
&3
*1'$&.
$6
;B7$/B&$3
*1'
& S & S *1' 0+] 4
5 5
5 5
& Q *1' 5 N *1' & & Q S & Q
& Q *1' 5 & Q ; *1' 6&/ $6 & S *1' 6'$ & S *1' 5 5
97
03
,1
6$: 6,3' ;'
*1'
,1
287 287
,)$03$*&
;WDOB%XI
*1'
*1' ,)
*1'
*1'
QF *1' 6&/ 6'$
,)287
,)287
-
QF
,ð&%86
*1'
75
*1'
;
,)
Figure 8
Circuit diagram for ATSC
Note: TUA 6037F has different pinning and no ADC function.
Data Sheet
72.2$75$16)250(5
*1'
30
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Application
4.4
Application circuit for DVB-T
+,&+
*1' ; 0$&20 (7& 0$&20 (7&
0,'
; *1'
*1' 5 5 & S %% & / WXUQV 5 N
*1' 5 5 & S 5 N
/2:
; *1'
*1'
*1'
5 5
*1'
75
75 & Q
/ WXUQV
%% &
'
'
*1' & S 9&& & S *1'
$*&B%8)
& S & S
& S
& Q
& Q
& S
& & S Q
& S
*1' 0, ',1< /2:,1 *1'5) 0,;287; 6$:,1; 6$:,1< 0,;287< 9&& 5)$*& 3 3 3 3 ;B7$/B&$3 *1' SDF NDJH
26&0,',1
+,*+,1;
+,*+,1<
26 &/2:,1
26 &0,'287
*1'
*1' 3 5 N
&
QS
5 N
QF 3/ADC
26 &/2:287
5) $*&B%8)
*1'26&
0, ',1;
& QS
QF
*1' 5 / QS 5 5 & S 5
& S /
*1'
9&&
&
S
& &
S S
26&+,*+,1; 26&+,*+287< 26&+,*+287; 26&+,*+,1< *1'$ QF 6$:287;
Q+ 5 QS / Q+ & S *1' 5 5 & QS *1' 9&& 5)$*& 3 3 3 3
%%
'
WXUQV
/
& S
*1'
5 5
5 N
& S
,& 78$F-2 94)1 DVB-T
&
Q
*1' / *1' *1' *1' *1' *1'
QS
*1'
& Q
& Q & & & Q Q Q
6$:287< & Q 5 N
,)$03287;
,)$03287<
,)$03, 1;
,)$03, 1<
;B7$/B%8)
97 ,)$03$*& &3
& S 5 N
Q *1' *1' & S 5 N
$6
&
*1''
&
Q
*1'$& .
5 N
;B7$/B,1
6'$
6& /
& S & S *1' 0+] 4
5 N & 5 N Q *1'
*1' 5 5 5 5 & Q *1' 5 N *1' & & Q S & Q & Q ; *1' 6& / $6 & S *1' 6'$ & S *1' & Q *1' 5 5 5
97
03
,1
*1'
,1
287 287
6$: 6,3 ' ;'
,)$03$*&
; WDOB%XI
*1'
*1' ,)
*1' *1'
*1'
QF *1' 6&/ 6'$
,) 287
,)287
-
QF
,ð& %86
75 72.2$75$16)250(5
*1'
;
,)
Figure 9
Circuit diagram for DVB-T
Note: TUA 6037F has different pinning and no ADC function.
Data Sheet
*1'
31
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Application
4.5
Application circuit for ISDB-T
+,&+
*1' ; 0$&20(7& 0$&20(7&
0,'
; *1'
*1' 5 5 & S %%& / WXUQV 5 N
*1' 5 5 & S 5 N
/2:
; *1'
*1'
*1'
5 5
*1'
75
%%&
75 & Q
/ WXUQV
'
'
*1' & S 9&& 26&0,',1 & S *1' QF *1' QF 26&0,'287 *1'26& 26&/2:,1 26&/2:287 & S & & S Q
$*&B%8)
& S & S +,*+,1;
& S
& Q
& Q
& S 0,',1; 0,',1< /2:,1 *1'5) 0,;287; 6$:,1; 6$:,1< 0,;287< 9&& 5)$*& 3 3 3 3 ;B7$/B,1 +,*+,1< *1' *1' SDFNDJH & Q & Q & Q & Q & & Q Q *1' *1' *1' *1' *1' *1' / QS / QS 5 5 *1' 5 5 & S 5 QS / Q+ & S *1'
5)$*&B%8)
& QS *1' 3 5 N & %% WXUQV / ' & S & QS 5 N
& S /
*1'
9&&
3/ADC & S S
26&+,*+,1; 26&+,*+287< 26&+,*+287; 26&+,*+,1< *1'$ QF 6$:287;
Q+ 5 5 & QS *1' 9&& 5)$*& 3 3 3 3
& S & S
*1'
5 5
5 N
,& 78$F-2 94)1 ,6'%7
*1'
6$:287< & Q 5 N 5 N & Q *1' *1' & S 5 N 5 N & Q 5 N *1' 5 & S N & Q ,)$03287; ,)$03287< 97 ,)$03,1; ,)$03,1< ,)$03$*&
;B7$/B%8)
*1''
6'$
6&/
&3
*1'$&.
$6
;B7$/B&$3
*1'
& S & S *1' 0+] 4
5 5
5 5
& Q *1' 5 N *1' & & Q S & Q
& Q *1' 5 & Q ; *1' 6&/ $6 & S *1' 6'$ & S *1' 5 5
97
03
,1
6$: 6,3' ;'
*1'
,1
287 287
,)$03$*&
;WDOB%XI
*1'
*1' ,)
*1'
*1'
QF *1' 6&/ 6'$
,)287
,)287
-
QF
,ð&%86
*1'
75
*1'
;
,)
Figure 10
Circuit diagram for ISDB-T
Note: TUA 6037F has different pinning and no ADC function.
Data Sheet
72.2$75$16)250(5
*1'
32
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference
5
5.1 5.1.1
Reference
Electrical Data Absolute Maximum Ratings
Attention: The maximum ratings may not be exceeded under any circumstances, not even momentarily and individually, as permanent damage to the IC will result. Table 5 # 1. 2. 3. 4. 5. 6. PLL 7. 8. 9. Bus input/output SDA CP VCP ICP VSDA -0.3 -0.3 3 1 6 10 -0.3 -0.3 -0.3 -5 -20 6 6 35 0 0 V mA V mA V V V mA mA open collector tmax = 0.1 s at 5.5 V open collector Absolute Maximum Ratings Symbol VCC TA TJ TStg RTHJA -40 Limit Values min. Supply voltage Ambient temperature Junction temperature Storage temperature Thermal resistance junction to ambient2) -0.3 -40 max. 6 +85 +125 +125 39 3 V °C °C °C K/W K exposed GND pad soldered exposed GND pad soldered exposed GND pad soldered Unit Remarks
Parameter1)
Temperature difference TJC junction to case3)
10. Bus output current SDA ISDA(L) during acknowledge 11. Bus input SCL VSCL 12. Chip address switch AS VAS 13. VCO tuning output (loop VVT filter) 14. PNP port output current IPP of P0,P1,P2,P3 15. Total port output current ΣIPP of PNP ports
Data Sheet
33
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference # Parameter1) Symbol Limit Values min. 16. NPN port output current IPN of P4 Mixer-Oscillator 17. Mix inputs LOW band 18. Mix inputs MID/HIGH 19. band 20. VCO base voltage VLOW VMID/HIGH IMID/HIGH VB -0.3 -0.3 -5 -0.3 3 2 6 3 V V mA V LOW, MID and HIGH band oscillators LOW, MID and HIGH band oscillators 0 max. 5 mA open collector Unit Remarks
21. VCO collector voltage
VC
6
V
22. RF AGC output 23. 24. Voltage on all other input and output pins except GNDs ESD-Protection4) 25. all pins
VRFAGC IRFAGC Vmax
-0.3 -0.3
4 1 VCC
V mA V
VESD
2
kV
1) All values are referred to ground (pin), unless stated otherwise. Currents with a positive sign flow into the pin and currents with a negative sign flow out of pin. 2) Measured in a multi layer board as defined by JEDEC standard. The thermal resistance depends on the PCB board design. 3) Referred to top center of package in free air condition. 4) According to EIA/JESD22-A114-B (HBM incircuit test), as a single device incircuit contact discharge test.
Data Sheet
34
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference
5.1.2
Table 6 # 1. 2. 3. 4. 5.
Operating Range
Operating Range Symbol VCC TA N fMIXV fMIXU Limit Values min. max. 5.5 +85 32767 200 1000 MHz MHz V °C nominal 5 V exposed GND pad soldered 4.5 -20 256 30 130 Unit Remarks
Parameter Supply voltage Ambient temperature Programmable divider factor LOW mixer input frequency range MID and HIGH band mixer input frequency range LOW oscillator frequency range MID band oscillator frequency range HIGH band oscillator frequency range
6. 7. 8.
fOH fOU fOU
65 165 400
250 530 950
MHz MHz MHz
5.1.3
Table 7 #
AC/DC Characteristics
AC/DC Characteristics, TA = 25°C, VCC = 5 V Symbol min. Limit Values typ. 5 105 105 105 max. 5.5 126 126 126 V mA mA mA LOW band MID band HIGH band Unit Test Conditions ■
Parameter1)
Supply 1. 2. 3. 4. Supply voltage Current consumption in active mode VCC IVCC IVCC IVCC 4.5 84 84 84
Data Sheet
35
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference # 5. Parameter1) Symbol min. Current Ipd consumption in power down mode Limit Values typ. 12 max. mA Unit Test Conditions ■
Digital Part PLL Crystal oscillator connections XTAL 6. 7. 8. 9. Crystal frequency Crystal resistance Crystal oscillator startup capability fXTAL RXTAL ZXTAL 3.2 4.0 30 -1000 4.0 400 4.8 300 MHz Ω fXTAL = 4 MHz
-650 Ω
XTAL Buffer output fXTALIO frequency
MHz fXTAL = 4 MHz mVpp
10. XTAL Buffer Signal VAC voltage Charge pump output CP 11. Output current, 12. see Table 15 13. 14. 15. Tristate current 16. Output voltage 17. Leakage current ICPDH ICPH ICPDL ICPL ICPZ VCP ITH 0.4 0.9
± 455 ± 650 ± 845 µA ± 175 ± 250 ± 325 µA ± 87 ± 35 ± 125 ± 163 µA ± 50 ± 65 µA ±10 1.4 1.9 10 nA V µA
VCP = 1.4 V VCP = 1.4 V VCP = 1.4 V VCP = 1.4 V VCP = 1.4 V, T2,T1,OS = 1,0,1 loop locked VTH = 33 V, T2,T1,OS = 0,0,1 OS = 0, RLoad = 33 kΩ, tuning supply = 33 V
Tuning voltage output VT (open collector)
18. Output voltage VTL when the loop is closed, (test mode in normal operation) I2C-Bus Bus inputs SCL, SDA
32.7 V
Data Sheet
36
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference # Parameter1) Symbol min. 19. High-level input voltage 20. Low-level input voltage 21. High-level input current 22. 23. Low-level input current 24. VIH VIL IIH IIH IIL IIL -10 2.5 0 Limit Values typ. max. 5.5 1 10 10 10 V V µA µA µA µA VCC = 4.5 to 5.5 V VCC = 4.5 to 5.5 V Vbus = 5.5 V, VCC = 0 V Vbus = 5.5 V, VCC = 5.5 V Vbus = 1.5 V, VCC = 0 V Vbus = 0 V, VCC = 5.5 V VOH = 5.5 V IOL = 3 mA Unit Test Conditions ■
Bus output SDA (open collector) 25. Leakage current 26. Low-level output voltage Edge speed SCL,SDA 27. Rise time 28. Fall time Clock timing SCL 29. Frequency 30. High pulse width 31. Low pulse width Start condition 32. Set-up time 33. Hold time Stop condition 34. Set up time 35. Bus free time between a STOP and START condition Data transfer
Data Sheet 37 Revision 2.0, 2007-07-20
IOH VOL
10 0.4
µA V
tr tf fSCL tH tL tsusta thsta tsusto tbuf 0 0.6 1.3 0.6 0.6 0.6 1.3 100
300 300 400
ns ns kHz µs µs µs µs µs µs
TUA 6039F-2, TUA 6037F
Reference # Parameter1) Symbol min. 36. Set-up time 37. Hold time 38. Input hysteresis SCL, SDA 39. Pulse width of spikes which are suppressed tsudat thdat Vhys tsp 0 0.1 0 200 50 Limit Values typ. max. µs µs mV ns Unit Test Conditions ■
40. Capacitive load for CL each bus line Ports 41. PNP Output saturation voltage 42. NPN Output saturation voltage 43. Port Output leakage current VPP,sat = VCC VCE,sat VPN,sat 0.25
400
pF
0.4
V
IPP = 5 mA
0.25
0.4
V
IPN = 5 mA
ILEAK,Port
10
µA
ADC input (only available in TUA 6039F-2) 44. ADC input voltage VADC 45. High-level input current 46. Low-level input current Analog Part LOW band mixer and SAW filter driver 47. RF frequency 48. Voltage gain fRF GV 44.25 21 24 170.25 MHz picture carrier2) 27 dB fRF = 48.25 MHz to 154.25 MHz see Section 5.5.1 fRF = 48.25 MHz to 154.25 MHz see Section 5.5.4
Revision 2.0, 2007-07-20
0
VCC 10
V µA µA
IADCH IADCL -10
49. Noise figure
NF
8
12
dB
Data Sheet
38
TUA 6039F-2, TUA 6037F
Reference # Parameter1) Symbol min. 50. SAWOUT output Vo voltage causing 0.8% of crossmodulation in channel 51. Input IP3 IIP3 Limit Values typ. 120 max. dBµV fRF = 48.25 MHz to 154.25 MHz see Section 5.5.6 Unit Test Conditions ■
117
dBµV fRF1 = 48.25 MHz, fRF2 = 49.25 MHz, PRF1 = PRF2 dBµV fRF1 = 154.25 MHz, fRF2 = 155.25 MHz, PRF1 = PRF2 2.12 kHz fRF = 154.25 MHz3)
52.
IIP3
117
53. Local oscillator FM FMI2C caused by I2C communication 54. (N+5) - 1 MHz pulling 55. Input impedance 56. Zi = (Rp || 1/jωCp) N+5 - 1 MHz Rp Cp 77 80
dBµV fRFw = 69.25 MHz, fOSC = 108.15 MHz, fRFu = 108.25 MHz4) kΩ pF parallel equivalent circuit at 100 MHz5) see Section 5.4.1
1 2
Mid band mixer and SAW filter driver 57. RF frequency 58. Voltage gain fRF GV 154.25 31 34 454.25 MHz picture carrier2) 37 dB fRF = 161.25 MHz to 439.25 MHz see Section 5.5.2 fRF = 161.25 MHz to 439.25 MHz see Section 5.5.5
59. Noise figure (not corrected for image)
NF
6
10
dB
60. SAWOUT output Vo voltage causing 0.8% of crossmodulation in channel
120
dBµV fRF = 161.25 MHz to 439.25 MHz see Section 5.5.7
Data Sheet
39
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference # Parameter1) Symbol min. 61. Input IP3 IIP3 Limit Values typ. 106 max. dBµV fRF1 = 161.25 MHz fRF2 = 162.25 MHz, PRF1 = PRF2 dBµV fRF1 = 439.25 MHz fRF2 = 440.25 MHz, PRF1 = PRF2 2.12 kHz fRF = 439.25 MHz3) Unit Test Conditions ■
62.
IIP3
105
63. Local oscillator FM FMI2C caused by I2C communication 64. (N+5) - 1 MHz pulling 65. Input impedance 66. Zi = (Rs + jωLs) N+5 - 1 MHz Rs Ls 77 80
dBµV fRFw = 359.25 MHz, fOSC = 398.15 MHz, fRFu = 398.25 MHz4) Ω nH series equivalent circuit at 300 MHz5) see Section 5.4.2
22 2.7
HIGH band mixer and SAW filter driver 67. RF frequency 68. Voltage gain fRF GV 399.25 31 34 863.25 MHz picture carrier2) 37 dB fRF = 447.25 MHz to 863.25 MHz see Section 5.5.2 fRF = 447.25 MHz to 863.25 MHz see Section 5.5.5
69. Noise figure (not corrected for image)
NF
6
10
dB
70. SAWOUT output Vo voltage causing 0.8% of crossmodulation in channel 71. Input IP3 IIP3
120
dBµV fRF = 447.25 MHz to 863.25 MHz see Section 5.5.7
105
dBµV fRF1 = 447.25 MHz fRF2 = 448.25 MHz PRF1 = PRF2 dBµV fRF1 = 863.25 MHz fRF2 = 864.25 MHz PRF1 = PRF2
72.
IIP3
105
Data Sheet
40
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference # Parameter1) Symbol min. 73. Local oscillator FM FMI2C caused by I2C communication 74. (N+5) - 1 MHz pulling 75. Input impedance 76. Zi = (Rs + jωLs) LOW band oscillator 77. Oscillator frequency 78. Phase noise, carrier to noise sideband 79. fOSC ΦOSC 80 -85 210 -77 MHz
6)
Limit Values typ. max.
Unit Test Conditions fRF = 863.25 MHz3)
■
2.12 kHz
N+5 - 1 MHz Rs Ls
77
80
dBµV fRFw = 823.25 MHz, fOSC = 862.15 MHz, fRFu = 862.25 MHz4) Ω nH series equivalent circuit at 650 MHz5) see Section 5.4.3
25 2.5
dBc/ ±1 kHz frequency Hz offset, worst case in the frequency range7) dBc/ ±10 kHz frequency Hz offset, worst case in the frequency range8)
-92
-88
80.
-112
-108 dBc/ ±100 kHz Hz frequency offset, worst case in the frequency range dBc VRipple = 20 mVpp, fRipple = 100 kHz9)
6)
RSC 81. Ripple susceptibility of VP MID band oscillator 82. Oscillator frequency fOSC 201
-50
493
MHz
Data Sheet
41
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference # Parameter1) Symbol min. 83. Phase noise, carrier to noise sideband 84. ΦOSC Limit Values typ. -80 max. -73 dBc/ ±1 kHz frequency Hz offset, worst case in the frequency range7) dBc/ ±10 kHz frequency Hz offset, worst case in the frequency range8) Unit Test Conditions ■
-92
-88
85.
-112
-108 dBc/ ±100 kHz Hz frequency offset, worst case in the frequency range dBc VRipple = 20 mVpp, fRipple = 100 kHz9)
6)
86. Ripple RSC susceptibility of VP HIGH band oscillator 87. Oscillator frequency 88. Phase noise, carrier to noise sideband 89. fOSC ΦOSC 435
-60
905 -77 -70
MHz
dBc/ ±1 kHz frequency Hz offset, worst case in the frequency range7) dBc/ ±10 kHz frequency Hz offset, worst case in the frequency range8)
-90
-86
90.
-110
-106 dBc/ ±100 kHz Hz frequency offset, worst case in the frequency range dBc VRipple = 20 mVpp, fRipple = 100 kHz9) fIF = 36 MHz to 54 MHz
91. Ripple RSC susceptibility of VP SAW filter driver 92. Voltage gain GV
-60
20
dB
Data Sheet
42
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference # Parameter1) Symbol min. 93. Output voltage Vo causing 1 dB compression 94. Input impedance 95. Zi = (Rp || 1/jωCp) Rp Cp Limit Values typ. 126 max. dBµV Unit Test Conditions ■
470 6 25 50
Ω pF Ω nH
parallel equivalent circuit at 36 MHz5) see Section 5.4.5 series equivalent circuit at 36 MHz5) see Section 5.4.6 VOUT = 100 dBµV10)
96. Output impedance RS 97. Zo = (Rs + jωLs) LS Rejection at the SAW driver outputs 98. Level of divider INTDIV interferences in the IF signal 99. Crystal oscillator interferences rejection INTXTAL
-66
-60
dBc
-66
-60
dBc
VOUT = 100 dBµV11)
100. Reference INTREF frequency rejection 101. Channel S02 beat INTS02
-66 -66
-60 -60
dBc dBc
VOUT = 100 dBµV12) fRFpix = 76.25 MHz, VRFpix = 80 dBµV, fIF = 38.9 MHz13)
RF AGC output 102. RF AGC output 103. Source current 1 104. Source current 2 106. RF AGC output voltage 107. AGCTOP
narrow
103 9.0 300 100 3.7 0
115
dBµV µA nA µA V maximum level, IAGC = 9 µA minimum level
IAGCfast IAGCslow VAGCmax VAGCmin
105. Peak sink to ground IAGCpeak
0.25 V 0.5 dB
108. RF voltage range to AGCSLIP switch the AGC from active to inactive mode
Data Sheet
43
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference # Parameter1) Symbol min. 109. RF AGC leakage current 110. RF AGC output voltage RF AGC buffer 111. RF AGC buffer output current 112. RF AGC buffer output saturation voltage low 113. RF AGC buffer output saturation voltage high IF AGC amplifier 114. Voltage gain 115. 116. Maximum IF input level Gmax Gmin VIF/IF 65 9 102 dB dB VIFAGC ≥ 2.0 V VIFAGC ≤ 0.2 V Imax Vlow 120 1 200 mA mV Iload = 1 mA AGCLEAK -50 Limit Values typ. max. 50 nA 0 < VAGC < VCC, AL2, AL1, AL0 = 1, 1, 0 AGC is disabled, IAGC = 9 µA Unit Test Conditions ■
AGCOFF
3.7
V
VCC Vhigh
170
300
mV
Iload = 1 mA
dBµV min. gain, fIF/IF = 36 MHz (sine), VIFAGC = 0.2 V, VOUT/OUT = 1 Vpp max. gain, fIF/IF = 36 MHz (sine), VIFAGC = 2 V, VOUT/OUT = 1 Vpp kΩ pF 25 parallel equivalent circuit at 36 MHz5) see Section 5.4.7
117. Minimum IF input level
VIF/IF
46
118. Input impedance 119. Zi = (RIF/IF || 1/jωCIF/IF) 120. Low end cutoff frequency (-1 dB) 121. High end cutoff frequency (-1 dB)
RIF/IF CIF/IF fL fH 65
2 1.5
MHz VIF/IF = 60 dBµV, RLOAD ≥ 5 kΩ, CLOAD ≤ 1.5 pF, MHz VOUT/OUT = 1 Vpp at fIF/IF = 36 MHz (sine)
Revision 2.0, 2007-07-20
Data Sheet
44
TUA 6039F-2, TUA 6037F
Reference # Parameter1) Symbol min. 122. Intermodulation C/IM3 Limit Values typ. -56 max. dBc fIF/IF1 = 37 MHz, fIF/IF2 = 38 MHz, VIF/IF1 = 90 dBµV, VIF/IF2 = 90 dBµV RLOAD ≥ 5 kΩ, CLOAD ≤ 10 pF, VOUT/OUT = 1 Vpp Unit Test Conditions ■
123. Third order output intercept point
OIP3
138
dBµV fIF/IF1 = 37 MHz, fIF/IF2 = 38 MHz, VIF/IF1 = 90 dBµV, VIF/IF2 = 90 dBµV RLOAD ≥ 5 kΩ, CLOAD ≤ 10 pF, VOUT/OUT = 1 Vpp dB fIF/IF = 36 MHz (sine), VIF/IF = 60 dBµV, VOUT/OUT = 1 Vpp, BW = 8 MHz max. gain series equivalent circuit at 36 MHz5) see Section 5.4.8
124. Signal to noise ratio SNR
43
125. Noise figure 126. Output impedance RIF/IF 127. Zo = (RIF/IF + jωLIF/IF) LIF/IF
9 90 120 150
dB Ω nH
1) Values are referred to the application given in Figure 7 and fIF = 36 MHz, unless stated otherwise. 2) The RF frequency range is defined by the oscillator frequency range and the intermediate frequency (IF). 3) Local oscillator FM modulation resulting from I2C communication is measured at the IF output using a modulation analyzer with a peak to peak detector ((P+ + P-) / 2) and a post detection filter 20 Hz - 100 kHz. The I2C messages are sent to the tuner in such a way that the tuner is addressed but the content of the PLL registers are not altered. The refresh interval between each data set shall be 20 ms to 1 s. 4) (N+5) -1 MHz is defined as the input level of channel N+5, at frequency 1 MHz lower, causing 100 kHz FM sidebands 30 dB below the wanted carrier. 5) Impedance measured with differential 2-port measurement at input or output. Input and output pins directly connected to measurement equipment with 50 Ω strip lines. 6) Limits are related to the tank circuit used in the application board (see Figure 7). Frequency bands may be adjusted by the choice of external components. 7) For wide loop filter application (see Figure 9). 8) For narrow loop filter application (see Figure 8).
Data Sheet
45
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference
9) The supply ripple susceptibility is a sideband measurement using a spectrum analyzer connected to the IF output. An unmodulated RF signal with a level of 80 dBµV is applied to the test board RF input. A sinewave signal with a defined frequency is superposed onto the supply voltage (see Figure 19). The specified value is the worst case in the frequency range. 10) This is the level of divider interferences close to the IF frequency. For example channel S3: fOSC = 158.15 MHz, 1/4 fOSC = 39.5375 MHz. The rejection has to be better than 60 dB for a SAW driver output level of 100 dBµV. 11) Crystal oscillator interference means the 4 MHz sidebands caused by the crystal oscillator. The rejection has to be better than 60 dB for a SAW driver output level of 100 dBµV. 12) The reference frequency rejection is the level of reference frequency sidebands according to the application circuit (166.67 kHz for DVB-T standard, 142.86 kHz for ISDB-T standard or 62.5 kHz for ATSC standard) related to the carrier. The rejection has to be better than 60 dB for a SAW driver output level of 100 dBµV. In hybrid application the rejection is valid for the digital reference frequency (166.67 kHz for DVB-T/PAL standard, or 142.86 kHz for ISDB-T/NTSC standard), but any lower analog reference frequency may reduce this rejection. 13) Channel S02 beat is the interfering product of fRFpix, fIF and fOSC of channel S02, fBEAT = 37.35 MHz. The possible mechanisms are fOSC - 2 x fIF or 2 x fRFpix - fOSC.
5.2
Table 8 Name
Bus Interface
Bit Allocation Read/Write Byte MSB bit6 bit5 0 N13 N5 T2 AL1 0 1 0 1 bit4 0 N12 N4 T1 P4 AL2 1 FL 1 FL AL0 0 Bits bit3 0 N11 N3 T0 P3 0 0 bit2 bit1 LSB A A A A A A A A A A Ack
Write Data (for TUA 6039F-2 and for TUA 6037F) Address Byte Divider Byte 1 Divider Byte 2 Control byte Auxiliary byte Address byte Status byte Address byte Status byte
1)
ADB DB1 DB2 CB AB ADB SB ADB SB
1 0 N7 1 XTB ATC 1 POR 1 POR
1 N14 N6 CP
MA1 MA0 R/W=0 N10 N2 P2 0 N9 N1 P1 0 N8 N0 OS P0 LP
RSA RSB
Bandswitch byte BB
Read data (for TUA 6039F-2) MA1 MA0 R/W=1 A2 A1 A0 NBD AGC 0 1 0
Read data (for TUA 6037F) MA1 MA0 R/W=1 1 1 AGC NBD
1) AB replaces BB when T2, T1, T0 = 0, 1, 1, see Table 11.
Data Sheet
46
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference Table 9 Symbol A MA0, MA1 N14 to N0 CP Description of Symbols Description Acknowledge Address selection bits, see Table 10 programmable divider bits: N = 214 x N14 + 213 x N13 + ... + 23 x N3 + 22 x N2 + 21 xN1 + N0 charge pump current bit: bit = 0: charge pump current = 50 µA or 125 µA bit = 1: charge pump current = 250 µA (default) or 650 µA, see Table 15 test bits, Table 11 reference divider bits, see Table 12 tuning amplifier control bit: bit = 0: enable VT; bit = 1: disable VT (default) disable XTAL buffer control bit: bit = 0: enable XTAL buffer (default); bit = 1: disable XTAL buffer
T0, T1, T2 RSA, RSB OS XTB
P0, P1, P2, PNP ports control bits: P3 bit = 0: Port is inactive, high impedance state (default) bit = 1: Port is active, VOUT = VCC-VCE,sat P4 NPN port control bit: bit = 0: Port is inactive, high impedance state (default) bit = 1: Port is active, VOUT = VCE,sat RF AGC time constant bit: bit = 0: IAGC = 300 nA; ∆t = 2s with C = 160 nF (default) bit = 1: IAGC = 9 µA; ∆t = 50ms with C = 160 nF RF AGC take-over point bits, see Table 13 Loop through: bit = 0: disable loop through (default); bit = 1: enable loop through Power-on reset flag, bit = 1 at power-on PLL lock flag, bit = 1: loop is locked Narrow Band detector flag, bit =1 when SAWOUT level is above RF AGC take-over point internal AGC flag, bit = 1 when internal AGC is active (level below 3V)
ATC
AL0, AL1, AL2 LP POR FL NBD AGC
A0, A1, A2 digital output of the 5-level ADC (only available in TUA 6039F-2)
Data Sheet
47
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference Table 10 Address selection MA1 0 0 1 1 MA0 0 1 0 1
Voltage at AS (0 to 0.1) x VCC open circuit or (0.2 to 0.3) x VCC (0.4 to 0.6) x VCC (0.9 to 1) x VCC
Table 11 Mode
Test modes T2
1)
T1 0 0 0 1 1 1 1 0 0 0 1 1 1
T0 0 1 x 0 0 1 1 0 1 x 0 1 x
OS 0 0 1 0 1 0 1 0 0 1 0 0 1
Normal mode (XMODE = 0 ), charge pump currents 50 µA and 250 µA selectable Normal mode (XMODE = 0), charge pump currents 50 µA and 250 µA selectable (default) Normal mode (XMODE = 0), CP test tristate, CP currents off, VT disabled Port test output: P0 = NB Port test output: P0 = fdiv / 2, P1 = fref byte AB will follow (otherwise byte BB will follow) byte AB will follow (otherwise byte BB will follow), CP test tristate, CP currents off, VT disabled CP test sink CP test source CP test tristate, CP currents off, VT active Extended mode (XMODE = 1), charge pump currents 50 µA and 250 µA selectable Extended mode (XMODE = 1), charge pump currents 125 µA and 650 µA selectable Extended mode (XMODE = 1), CP test tristate, CP currents off, VT disabled
1) XMODE = internal flag for extended mode
0 0 0 0 0 0 0 1 1 1 1 1 1
Data Sheet
48
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference Table 12 Reference divider ratios fref1) 50 kHz 31.25 kHz 166.67 kHz 62.5 kHz 125 kHz 142.86 kHz Mode normal normal x x extended extended T2 0 0 x x 1 1 T1 0 0 x x 1 1 RSA 0 0 1 1 0 0 RSB 0 1 0 1 0 1
Reference divider ratio 80 128 24 64 32 28
1) With a 4 MHz quartz.
Table 13
RF AGC take-over point AL2 AL1 AL0
SAW driver output Remark level, symmetrical mode 115 dBµV 115 dBµV 112 dBµV 109 dBµV 106 dBµV 103 dBµV IRFAGC = 0 VRFAGC = high External RF AGC Disable RF AGC buffer Disabled 2)
1)
0 0 default mode at POR 0 0 1 1 1 1
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1
1) The RF AGC detector is disabled. Both the sinking and sourcing current from the IC is disabled. The RF AGC output goes into a high impedance state and an external RF AGC source can be connected in parallel and will not be influenced. The RF AGC buffer is disabled. 2) The RF AGC detector is disabled, VRFAGC is set to high voltage VRFAGC = 3.7 V.
Data Sheet
49
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference Table 14 A to D converter levels1) A2 0 0 0 0 1 A1 0 0 1 1 0 A0 0 1 0 1 0
Voltage at ADC1) (0 to 0.15) * VCC (0.15 to 0.3) * VCC (0.3 to 0.45) * VCC (0.45 to 0.6) * VCC (0.6 to 1) * VCC
1) No erratic codes in the transition.
Table 15
Charge pump current Mode normal CP 0 1 0 extended 0 1 1 1 1 0 0 T2 T1 T0 x1) x 0 1 0 1
Charge pump current 50 µA 250 µA (default) 50 µA 125 µA 250 µA 650 µA
1) x = don‘t care.
Table 16 Band LOW MID
Internal band selection Mixer P0, P1
1)
Oscillator P0, P1 P1, P0 P0, P1 P0, P1
P1, P0 P0, P1 P0, P1
HIGH (default) Power down mode
1) Means: (P0 AND NOT P1); that is: LOW mixer is switched on if (P0 = 1 and P1 = 0).
1) ADC function is only available in TUA 6039F-2.
Data Sheet
50
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference Table 17 Name Write Data Address Byte Divider byte 1 Divider byte 2 Control byte Bandswitch byte Auxiliary byte
1) x = don‘t care.
Defaults at power-on reset Byte MSB ADB DB1 DB2 CB BB AB 1 0 x 1 0 0 bit6 1 x
1)
Bits bit5 0 x x 0 0 1 bit4 0 x x 0 0 0 bit3 0 x x 1 0 0 bit2 MA1 x x 0 0 0 bit1 MA0 x x 0 0 0 LSB R/W=0 x x 1 0 0
x 1 0 0
Table 18 Mode normal
Description of modes Description Reference divider ratios 24, 64, 80, 128 selectable. Charge pump currents 50, 250 µA selectable. Auxiliary byte to follow Control byte (T2 = 0, T1 = 1, T0 = 1), otherwise Bandswitch byte to follow Control byte. Reference divider ratios 24, 28, 32, 64 selectable. Charge pump currents 50, 125, 250, 650 µA selectable. Auxiliary byte to follow Control byte (T2 = 0, T1 = 1, T0 = 1), otherwise Bandswitch byte to follow Control byte.
extended
Data Sheet
51
Revision 2.0, 2007-07-20
5.3
Figure 11
Data Sheet
Start Stop Addressing 1 1 MA MA R/W Ack. 1st Ack. 2nd Ack. 3rd Ack. 4th Ack.
I2C Bus Timing Diagram
I2C Bus Timing Diagram Note: SDA: SCL:
Telegram examples: Abbreviations:
Start= start condition ADB= address byte
52
Start-ADB-DB1-DB2-CB-BB-Stop
Start-ADB-DB1-DB2-CB-AB-Stop
Start-ADB-CB-BB-DB1-DB2-Stop
DB1= programmable divider byte 1 DB2= pardonable divider byte 2 CB= Control byte BB= Bandswitch byte AB= Auxiliary byte Reference Stop= stop condition
Start-ADB-CB-AB-DB1-DB2-Stop
Start-ADB-DB1-DB2-Stop
Start-ADB-CB-BB-Stop
Start-ADB-CB-AB-Stop
TUA 6039F-2, TUA 6037F
Revision 2.0, 2007-07-20
Start-ADB-DB1-DB2-CB-BB-CB-AB-Stop
TUA 6039F-2, TUA 6037F
Reference
5.4 5.4.1
Electrical Diagrams Input admittance (S11) of the LOW band mixer (30 to 200 MHz)
1
0.9
Y0 = 20 mA/V
0.8
1.5
0.7
0.6
0.5
0.4
2 3
1.5 1 0.9 0.8 0.7 0.6 0.5 0.4
0.3
0.3
0.2
0.1
20
10
5
4
3
2
30 MHz
20
0.1 10
200 MHz
0.2 5
4
3
0.4
1.5
5.4.2
Z0 = 5 0 Ω
Input impedance (S11) of the MID band mixer (130 to 500 MHz)
0.8
0.9
0.7
1
1
0.9
0.8
0.6
1.5
0.7
0.6
0.5
2
0.5
2
3
4
5
10
500 MHz
20
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.5 10 20
0
130 MHz
2
3
4
5
0.3
0.4
0.5
0.6
0.7
0.8
0.9
Data Sheet
53
1
1.5
2
5
0.2
4
10
0.1
Revision 2.0, 2007-07-20
0
20
0.3
3
0.4
0.3
4
0.2
0.2
5
0.1
0.1
10
20
TUA 6039F-2, TUA 6037F
Reference
5.4.3
Z0 = 5 0 Ω
Input impedance (S11) of the HIGH band mixer (400 to 1000 MHz)
0.8
0.9
0.7
1
0.6
1.5
0.5
2
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8 0.9 1
1.5
10
0
20
0.2
2
3
4
5
0.3
0.4
0.5
0.6
0.7
0.8
0.9
5.4.4
Output admittance (S22) of the of the mixers (30 to 60 MHz)
1
0.9
Y0 = 20 mA/V
0.8
1
1.5
0.7
1.5
0.6
0.5
2
2
0.4
0.3
1.5
1 0.9 0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
20
10
5
4
3
2
20
10
36 MHz
4
3
0.4
1.5
Data Sheet
54
1
0.9
0.8
0.7
0.6
0.5
2
0.2
5
Revision 2.0, 2007-07-20
0
0.1
5
0.2
4
0.1
10
0.1
20
0.3
3
0.4
3
3
0.3
4
4
5
0.2
1000 MHz
0.1
5
10
400 MHz
20
10
20
TUA 6039F-2, TUA 6037F
Reference
5.4.5
Input admittance (S11) of the SAW filter driver (30 to 60 MHz)
1
0.9
Y0 = 20 mA/V
0.8
1.5
0.7
0.6
0.5
0.4
2 3
1.5 1 0.9 0.8 0.7 0.6 0.5 0.4
0.3
0.3
0.2
0.1
20
10
5
4
3
2
20
10
36 MHz
4
3
0.4
1.5
5.4.6
Z0 = 5 0 Ω
Output impedance (S22) of the SAW filter driver (30 to 60 MHz)
0.8
0.9
0.7
1
1
0.9
0.8
0.6
1.5
0.7
0.6
0.5
2
0.5
2
3
4
36 MHz
10 0.1
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8 0.9 1
1.5
10
0
20
2
3
4
5
0.3
0.4
0.5
0.6
0.7
0.8
0.9
Data Sheet
55
1
1.5
2
5
0.2
4
10
0.1
Revision 2.0, 2007-07-20
20
0.2
5
5
20
0
0.1
0.3
3
0.4
0.3
4
0.2
0.2
5
0.1
10
20
TUA 6039F-2, TUA 6037F
Reference
5.4.7
Input admittance (S11) of the IF AGC amplifier (30 to 60 MHz)
1
0.9
Y0 = 20 mA/V
0.8
1.5
0.7
0.6
0.5
0.4
2 3
1.5 1 0.9 0.8 0.7 0.6 0.5 0.4
0.3
0.3
0.2
0.1
20
10
5
4
3
2
20
10
36 MHz
0.1
4
3
0.4
1.5
5.4.8
Z0 = 5 0 Ω
Output impedance (S22) of the IF AGC amplifier (30 to 60 MHz)
0.8
0.9
0.7
1
1
0.9
0.8
0.6
1.5
0.7
0.6
0.5
2
0.5
2
3
4
36 MHz
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8 0.9 1
1.5
10
0
20
2
3
4
5
0.3
0.4
0.5
0.6
0.7
0.8
0.9
Data Sheet
56
1
1.5
2
5
0.2
4
10
0.1
Revision 2.0, 2007-07-20
20
0.2
5
5
10
20
0
0.3
3
0.4
0.3
4
0.2
0.2
5
0.1
0.1
10
20
TUA 6039F-2, TUA 6037F
Reference
5.5 5.5.1
Measurement Circuits Gain (GV) measurement in LOW band
LOWIN SAWOUT
50 Ω Vmeas RMS Voltmeter
Transformer N1 V0 C N2 V'meas 50 Ω spectrum analyser
V
50 Ω
Vi
Device under Test
SAWOUT
N1 : N2 = 10 : 2 turns
Figure 12 • • • •
Gain (GV) measurement in LOW band
Zi >> 50 Ω => Vi = 2 x Vmeas = 80 dBµV Vi = Vmeas + 6dB = 80 dBµV V0 = V’meas + 17 dB (transformer ratio N1:N2 and transformer loss) Gv = 20 log(V0 / Vi)
5.5.2
Gain (GV) measurement in MID and HIGH bands
50 Ω Vmeas RMS Voltmeter
MIDIN SAWOUT HIGHIN
Transformer N1 V0 C V'meas N2 50 Ω spectrum analyser
V
50 Ω
Vi
Balun 1:1
Device under Test
MIDIN SAWOUT HIGHIN
N1 : N2 = 10 : 2 turns
Figure 13 • • •
Gain (GV) measurement in MID and HIGH bands
Vi = Vmeas = 70 dBµV V0 = V’meas + 17 dB (transformer ratio N1:N2 and transformer loss Gv = 20 log(V0 / Vi) + 1 dB (1 dB = insertion loss of balun)
Data Sheet
57
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference
5.5.3
Matching circuit for optimum noise figure in LOW band
15p 22p In 22p 1n In Out 7 turns wire Ε 0.5 mm coil Ε 5.5 mm
1n Out
50 Ω semi rigid cable 300 mm long 96 pF/m 33dB/100m
22p
For fRF = 50 MHz loss = 0 dB image suppression = 16 dB Figure 14
For fRF = 150 MHz loss = 1.3 dB image suppression = 13 dB
Matching circuit for optimum noise figure in LOW band
5.5.4
Noise figure (NF) measurement in LOW band
Noise Source
IN
OUT
LOWIN SAWOUT
Transformer N1 C N2
Matching Circuit
Device under Test
SAWOUT
Noise Figure Meter
N1 : N2 = 10 : 2 turns NF = NFmeas - loss of matching circuit (dB)
Figure 15
Noise figure (NF) measurement in LOW band
Data Sheet
58
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference
5.5.5
Noise figure (NF) measurement in MID and HIGH bands
Noise Source
MIDIN SAWOUT HIGHIN
Transformer N1 C N2
Balun 1:1
Device under Test
MIDIN SAWOUT HIGHIN
Noise Figure Meter
N1 : N2 = 10 : 2 turns loss of balun = 1 dB NF = NFmeas - loss of balun (dB)
Figure 16
Noise figure (NF) measurement in MID and HIGH bands
5.5.6
Cross modulation measurement in LOW band
V' meas RMS Voltmeter
V
50 Ω
unwanted signal source AM = 80%, 1 kHz 50 Ω A C
LOWIN SAWOUT
Transformer Vo N1 C N2 IF filter 50 Ω modulation analyser
Hybrid
50 Ω wanted signal source B D 50 Ω
Device under Test
SAWOUT
N1 : N2 = 10 : 2 turns
Figure 17 • • •
Cross modulation measurement in LOW band
V’meas = V0 - 17 dB (transformer ratio N1:N2 and transformer loss) wanted output signal at fpix, Vo = 100 dBµV unwanted output signal at fsnd
Data Sheet
59
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Reference
5.5.7
Cross modulation measurement in MID and HIGH bands
V' meas RMS Voltmeter
V
50 Ω
unwanted signal source AM = 80%, 1 kHz 50 Ω A C
MIDIN SAWOUT HIGHIN
Transformer N1 Vo C N2 IF filter 50 Ω modulation analyser
Hybrid
50 Ω wanted signal source B D 50 Ω
Balun 1:1
Device under Test
MIDIN SAWOUT HIGHIN
N1 : N2 = 10 : 2 turns
Figure 18 • • •
Cross modulation measurement in MID and HIGH bands
V’meas = V0 - 17 dB (transformer ratio N1:N2 and transformer loss) wanted output signal at fpix, Vo = 100 dBµV unwanted output signal at fsnd
5.5.8
Ripple susceptibility (RSC) measurement
Stabilizer DC Supply 5k 1u
240
IC supply
1u
Ripple 50 2* 22uF
Figure 19
Ripple susceptibility measurement
Data Sheet
60
Revision 2.0, 2007-07-20
TUA 6039F-2, TUA 6037F
Package VQFN-48
6
Package VQFN-48
Figure 20
PG-VQFN-48 Vignette
Figure 21
PG-VQFN-48 Outline Drawing
You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products.
SMD = Surface Mounted Device
Dimensions in mm
61 Revision 2.0, 2007-07-20
Data Sheet
www.infineon.com
Published by Infineon Technologies AG