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UPF01012

UPF01012

  • 厂商:

    INFINEON

  • 封装:

  • 描述:

    UPF01012 - 10 Gigabit/s Transceiver with XAUI Interface - Infineon Technologies AG

  • 数据手册
  • 价格&库存
UPF01012 数据手册
PRODUCT BRIEF 10 Gigabit/s Transceiver with XAUI Interface The TenGiPHY-L is a single chip transceiver IC for 10 Gbit/s Ethernet and Fibre Channel connectivity. It offers a serial, full duplex 10 Gbit/s, XFI compliant interface to optical components or to a serial fiber-optic module (XFP). The integrated CDR and CMU operate at a data rate of 10.3125 or 10.51875 Gbit/s. The TenGiPHY-L provides the XGXS, PCS and PMA sublayers of the 10 Gbit/s Ethernet and Fibre Channel standards. At the system side, a quad serial XAUI interface connects the TenGiPHY-L to the upper layers. The networking system can control the chip via a narrow-width MDIO interface by writing and reading its control and status registers. Applications ■ ■ ■ ■ ■ Fiber optic modules according to the XENPAK multi-source agreement 10 Gbit/s Ethernet line cards 10 Gbit/s Fibre Channel line and NIC cards Terabit Routers ■ ■ Features ■ ■ ■ ■ ■ ■ Complete 10 Gbit/s Ethernet and Fibre Channel PHY device supporting LAN applications Complies with IEEE 802.3ae Complies with ANSI 1413-D Compliant to XENPAK multisource agreement Embedded µController allows for control and tuning of the PMDs via analog interfaces ■ ■ ■ Clock & data recovery and clock multiplying unit without external loop filter components Supports various clocking modes based on external reference clocks, loop- and external timing Integrated bit error rate tester (BERT) usable for multiple atspeed diagnostic scenarios Includes the XGXS, PCS, and PMA sublayers of the OSI protocol stack Synchronization and de-skewing of XAUI lanes Performs 8B/10B (de-)coding required for the XGXS sublayer Various loop back modes for system debugging UPF 01012 ■ ■ Provides access to E²PROM via I²C interface according to XENPAK requirements; automatic E²PROM download on power-up Power-efficient design:
UPF01012 价格&库存

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