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5962F9683001VPC

5962F9683001VPC

  • 厂商:

    INTERSIL(Intersil)

  • 封装:

  • 描述:

    5962F9683001VPC - Radiation Hardened, High Speed, Low Power, Current Feedback Video Operational Ampl...

  • 数据手册
  • 价格&库存
5962F9683001VPC 数据手册
HS-1145RH Data Sheet August 1999 File Number 4227.1 Radiation Hardened, High Speed, Low Power, Current Feedback Video Operational Amplifier with Output Disable The HS-1145RH is a high speed, low power current feedback amplifier built with Intersil’s proprietary complementary bipolar UHF-1 (DI bonded wafer) process. These devices are QML approved and are processed and screened in full compliance with MIL-PRF-38535. This amplifier features a TTL/CMOS compatible disable control, pin 8, which when pulled low, reduces the supply current and forces the output into a high impedance state. This allows easy implementation of simple, low power video switching and routing systems. Component and composite video systems also benefit from this op amp’s excellent gain flatness, and good differential gain and phase specifications. Multiplexed A/D applications will also find the HS-1145RH useful as the A/D driver/multiplexer. Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed here must be used when ordering. Detailed Electrical Specifications for these devices are contained in SMD 5962-96830. A “hot-link” is provided on our homepage for downloading. http://www.intersil.com/spacedefense/space.htm Features • Electrically Screened to SMD # 5962-96830 • QML Qualified per MIL-PRF-38535 Requirements • Low Supply Current . . . . . . . . . . . . . . . . . . . . 5.9mA (Typ) • Wide -3dB Bandwidth. . . . . . . . . . . . . . . . . .360MHz (Typ) • High Slew Rate. . . . . . . . . . . . . . . . . . . . . .1000V/µs (Typ) • Excellent Gain Flatness (to 50MHz). . . . . . ±0.07dB (Typ) • Excellent Differential Gain . . . . . . . . . . . . . . . 0.02% (Typ) • Excellent Differential Phase . . . . . . . . 0.03 Degrees (Typ) • High Output Current . . . . . . . . . . . . . . . . . . . .60mA (Typ) • Output Enable/Disable Time . . . . . . . . . 180ns/35ns (Typ) • Total Gamma Dose. . . . . . . . . . . . . . . . . . . . 300kRAD(Si) • Latch Up . . . . . . . . . . . . . . . . . . . . . None (DI Technology) Applications • Multiplexed Flash A/D Driver • RGB Multiplexers/Preamps • Video Switching and Routing • Pulse and Video Amplifiers • Wideband Amplifiers • RF/IF Signal Processing Ordering Information ORDERING NUMBER 5962F9683001VPA 5962F9683001VPC INTERNAL MKT. NUMBER HS7-1145RH-Q HS7B-1145RH-Q TEMP. RANGE (oC) -55 to 125 -55 to 125 • Imaging Systems Pinout HS-1145RH GDIP1-T8 (CERDIP) OR CDIP2-T8 (SBDIP) TOP VIEW NC -IN +IN V- 1 2 3 4 8 DISABLE V+ OUT NC + 7 6 5 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 HS-1145RH Application Information Optimum Feedback Resistor Although a current feedback amplifier’s bandwidth dependency on closed loop gain isn’t as severe as that of a voltage feedback amplifier, there can be an appreciable decrease in bandwidth at higher gains. This decrease may be minimized by taking advantage of the current feedback amplifier’s unique relationship between bandwidth and RF. All current feedback amplifiers require a feedback resistor, even for unity gain applications, and RF, in conjunction with the internal compensation capacitor, sets the dominant pole of the frequency response. Thus, the amplifier’s bandwidth is inversely proportional to RF. The HS-1145RH design is optimized for RF = 510Ω at a gain of +2. Decreasing RF decreases stability, resulting in excessive peaking and overshoot (Note: Capacitive feedback will cause the same problems due to the feedback impedance decrease at higher frequencies). At higher gains, however, the amplifier is more stable so RF can be decreased in a trade-off of stability for bandwidth. The table below lists recommended RF values for various gains, and the expected bandwidth. For a gain of +1, a resistor (+RS) in series with +IN is required to reduce gain peaking and increase stability. GAIN (ACL) -1 +1 +2 +5 +10 RF (Ω) 425 510 (+RS = 510Ω) 510 200 180 BANDWIDTH (MHz) 300 270 330 300 130 Optional GND Pad (Die Use Only) for TTL Compatibility The die version of the HS-1145RH provides the user with a GND pad for setting the disable circuitry GND reference. With symmetrical supplies the GND pad may be left unconnected, or tied directly to GND. If asymmetrical supplies (e.g., +10V, 0V) are utilized, and TTL compatibility is desired, die users must connect the GND pad to GND. With an external GND, the DISABLE input is TTL compatible regardless of supply voltage utilized. Pulse Undershoot and Asymmetrical Slew Rates The HS-1145RH utilizes a quasi-complementary output stage to achieve high output current while minimizing quiescent supply current. In this approach, a composite device replaces the traditional PNP pulldown transistor. The composite device switches modes after crossing 0V, resulting in added distortion for signals swinging below ground, and an increased undershoot on the negative portion of the output waveform (See Figures 5, 8, and 11). This undershoot isn’t present for small bipolar signals, or large positive signals. Another artifact of the composite device is asymmetrical slew rates for output signals with a negative voltage component. The slew rate degrades as the output signal crosses through 0V (See Figures 5, 8, and 11), resulting in a slower overall negative slew rate. Positive only signals have symmetrical slew rates as illustrated in the large signal positive pulse response graphs (See Figures 4, 7, and 10). PC Board Layout This amplifier’s frequency response depends greatly on the care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended, while a solid ground plane is a must! Attention should be given to decoupling the power supplies. A large value (10µF) tantalum in parallel with a small value (0.1µF) chip capacitor works well in most cases. Terminated microstrip signal lines are recommended at the device’s input and output connections. Capacitance, parasitic or planned, connected to the output must be minimized, or isolated as discussed in the next section. Care must also be taken to minimize the capacitance to ground at the amplifier’s inverting input (-IN), as this capacitance causes gain peaking, pulse overshoot, and if large enough, instability. To reduce this capacitance, the designer should remove the ground plane under traces connected to -IN, and keep connections to -IN as short as possible. An example of a good high frequency layout is the Evaluation Board shown in Figure 2. Non-Inverting Input Source Impedance For best operation, the DC source impedance seen by the non-inverting input should be ≥50Ω. This is especially important in inverting gain configurations where the noninverting input would normally be connected directly to GND. DISABLE Input TTL Compatibility The HS-1145RH derives an internal GND reference for the digital circuitry as long as the power supplies are symmetrical about GND. With symmetrical supplies the digital switching threshold (VTH = (VIH + VIL)/2 = (2.0 + 0.8)/2) is 1.4V, which ensures the TTL compatibility of the DISABLE input. If asymmetrical supplies (e.g., +10V, 0V) are utilized, the switching threshold becomes: V+ + VV TH = ------------------- + 1.4V 2 and the VIH and VIL levels will be VTH ± 0.6V, respectively. 2 HS-1145RH Driving Capacitive Loads Capacitive loads, such as an A/D input, or an improperly terminated transmission line will degrade the amplifier’s phase margin resulting in frequency response peaking and possible oscillations. In most cases, the oscillation can be avoided by placing a resistor (RS) in series with the output prior to the capacitance. Figure 1 details starting points for the selection of this resistor. The points on the curve indicate the RS and CL combinations for the optimum bandwidth, stability, and settling time, but experimental fine tuning is recommended. Picking a point above or to the right of the curve yields an overdamped response, while points below or left of the curve indicate areas of underdamped performance. RS and CL form a low pass network at the output, thus limiting system bandwidth well below the amplifier bandwidth of 270MHz (for AV = +1). By decreasing RS as CL increases (as illustrated in the curves), the maximum bandwidth is obtained without sacrificing stability. In spite of this, the bandwidth decreases as the load capacitance increases. For example, at AV = +1, RS = 62Ω, CL = 40pF, the overall bandwidth is limited to 180MHz, and bandwidth drops to 75MHz at AV = +1, RS = 8Ω, CL = 400pF. 50 SERIES OUTPUT RESISTANCE (Ω) VH 1 +IN OUT VL VGND V+ FIGURE 2A. TOP LAYOUT 40 FIGURE 2B. BOTTOM LAYOUT 30 20 AV = +2 10 AV = +1 510 R1 1 50Ω 2 3 0.1µF 4 -5V 510 VH 8 7 6 5 0.1µF 50Ω OUT GND VL 10µF +5V 0 0 50 100 150 200 250 300 350 400 LOAD CAPACITANCE (pF) IN 10µF GND FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs LOAD CAPACITANCE FIGURE 2C. SCHEMATIC FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT Evaluation Board The performance of the HS-1145RH may be evaluated using the HFA11XX Evaluation Board. The layout and schematic of the board are shown in Figure 2. The VH connection may be used to exercise the DISABLE pin, but note that this connection has no 50Ω termination. To order evaluation boards (part number HFA11XXEVAL), please contact your local sales office. 3 HS-1145RH Typical Performance Curves 200 150 OUTPUT VOLTAGE (mV) 100 50 0 -50 -100 -150 -200 5ns/DIV. AV = +1 +RS = 510Ω VSUPPLY = ±5V, RF = 510Ω, TA = 25oC, RL = 100Ω, Unless Otherwise Specified 3.0 2.5 OUTPUT VOLTAGE (V) 2.0 1.5 1.0 0.5 0 -0.5 -1.0 5ns/DIV. AV = +1 +RS = 510Ω FIGURE 3. SMALL SIGNAL PULSE RESPONSE FIGURE 4. LARGE SIGNAL POSITIVE PULSE RESPONSE 2.0 1.5 OUTPUT VOLTAGE (V) 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 AV = +1 +RS = 510Ω OUTPUT VOLTAGE (mV) 200 AV = +2 150 100 50 0 -50 -100 -150 -200 5ns/DIV. 5ns/DIV. FIGURE 5. LARGE SIGNAL BIPOLAR PULSE RESPONSE FIGURE 6. SMALL SIGNAL PULSE RESPONSE 3.0 AV = +2 2.5 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 2.0 1.5 1.0 0.5 0 -0.5 -1.0 5ns/DIV. 2.0 AV = +2 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 5ns/DIV. FIGURE 7. LARGE SIGNAL POSITIVE PULSE RESPONSE FIGURE 8. LARGE SIGNAL BIPOLAR PULSE RESPONSE 4 HS-1145RH Typical Performance Curves 200 150 OUTPUT VOLTAGE (mV) 100 50 0 -50 -100 -150 -200 5ns/DIV. AV = +10 RF = 180Ω OUTPUT VOLTAGE (V) VSUPPLY = ±5V, RF = 510Ω, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued) 3.0 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0 5ns/DIV. AV = +10 RF = 180Ω FIGURE 9. SMALL SIGNAL PULSE RESPONSE FIGURE 10. LARGE SIGNAL POSITIVE PULSE RESPONSE 2.0 1.5 OUTPUT VOLTAGE (V) 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 5ns/DIV. 0V AV = +1, VIN = 1V 50ns/DIV. OUT 400mV/DIV. AV = +10 RF = 180Ω DISABLE 800mV/DIV. (0.4V to 2.4V) FIGURE 11. LARGE SIGNAL BIPOLAR PULSE RESPONSE FIGURE 12. OUTPUT ENABLE AND DISABLE RESPONSE GAIN (dB) 3 0 -3 VOUT = 200mVP-P +RS = 510Ω (+1) +RS = 0Ω (-1) NORMALIZED GAIN (dB) AV = +1 3 0 -3 AV = +10 AV = +5 AV = +2 NORMALIZED PHASE (DEGREES) AV = -1 AV = +2 AV = -1 0 90 180 AV = +1 0.3 1 10 FREQUENCY (MHz) 100 500 270 VOUT = 200mVP-P RF = 510Ω (+2) RF = 200Ω (+5) RF = 180Ω (+10) 0.3 1 AV = +5 AV = +10 90 180 270 500 10 FREQUENCY (MHz) 100 FIGURE 13. FREQUENCY RESPONSE FIGURE 14. FREQUENCY RESPONSE 5 PHASE (DEGREES) 0 HS-1145RH Typical Performance Curves AV = +2 GAIN (dB) 3 0 -3 VOUT = 1.5VP-P VOUT = 5VP-P VOUT = 200mVP-P PHASE (DEGREES) VSUPPLY = ±5V, RF = 510Ω, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued) GAIN (dB) VOUT = 200mVP-P 3 0 -3 VOUT = 4VP-P (+1) VOUT = 5VP-P (-1, +2) +RS = 510Ω (+1) AV = +1 AV = +2 AV = -1 0 90 VOUT = 1.5VP-P VOUT = 5VP-P 0.3 1 10 FREQUENCY (MHz) 100 500 180 270 1 10 FREQUENCY (MHz) 100 200 FIGURE 15. FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES FIGURE 16. FULL POWER BANDWIDTH GAIN (dB) 3 0 VOUT = 200mVP-P AV = +2 RL = 500Ω RL = 1kΩ 500 AV = +2 400 BANDWIDTH (MHz) AV = +1 VOUT = 200mVP-P RF = 180Ω (+10) +RS = 510Ω (+1) -3 RL = 50Ω RL = 100Ω 300 PHASE (DEGREES) RL = 50Ω RL = 100Ω RL = 1kΩ RL = 500Ω 0 90 180 270 200 AV = +10 100 0.3 1 10 FREQUENCY (MHz) 100 500 0 -100 -50 0 50 100 150 TEMPERATURE (oC) FIGURE 17. FREQUENCY RESPONSE FOR VARIOUS LOAD RESISTORS FIGURE 18. -3dB BANDWIDTH vs TEMPERATURE OFF ISOLATION (dB) VOUT = 200mVP-P +RS = 510Ω (+1) 0.25 0.20 GAIN (dB) 0.15 0.10 0.05 0 -0.05 -0.10 1 10 FREQUENCY (MHz) 75 AV = +1 AV = +2 -30 -40 -50 -60 -70 -80 -90 AV = +2 VIN = 1VP-P 0.3 1 10 FREQUENCY (MHz) 100 FIGURE 19. GAIN FLATNESS FIGURE 20. OFF ISOLATION 6 HS-1145RH Typical Performance Curves -40 -50 REVERSE ISOLATION (dB) -60 -70 -80 -90 AV = -1 VOUT = 2VP-P OUTPUT IMPEDANCE (Ω) AV = +1, +2 VSUPPLY = ±5V, RF = 510Ω, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued) AV = +2 1K 100 10 1 0.1 0.01 0.3 1 10 FREQUENCY (MHz) 100 0.3 1 10 100 FREQUENCY (MHz) 1000 FIGURE 21. REVERSE ISOLATION FIGURE 22. ENABLED OUTPUT IMPEDANCE AV = +2 0.8 0.6 SETTLING ERROR (%) VOUT = 2V -30 AV = +2 -40 0.4 0.2 0.1 0 -0.2 -0.4 -0.6 -0.8 DISTORTION (dBc) 20MHz -50 10MHz -60 -70 3 8 13 18 23 28 TIME (ns) 33 38 43 48 -5 0 5 OUTPUT POWER (dBm) 10 15 FIGURE 23. SETTLING RESPONSE FIGURE 24. SECOND HARMONIC DISTORTION vs POUT -30 AV = +2 -40 DISTORTION (dBc) 20MHz 3.6 3.5 OUTPUT VOLTAGE (V) 3.4 3.3 3.2 3.1 3.0 2.9 2.8 2.7 AV = -1 |-VOUT| (RL= 100Ω) +VOUT (RL = 100Ω) -50 +VOUT (RL = 50Ω) 10MHz -60 |-VOUT| (RL = 50Ω) -70 -5 0 5 OUTPUT POWER (dBm) 10 15 2.6 -50 -25 0 25 50 75 100 125 TEMPERATURE (oC) FIGURE 25. THIRD HARMONIC DISTORTION vs POUT FIGURE 26. OUTPUT VOLTAGE vs TEMPERATURE 7 HS-1145RH Typical Performance Curves 100 VSUPPLY = ±5V, RF = 510Ω, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued) 6.1 POWER SUPPLY CURRENT (mA) 100 INI- NOISE CURRENT (pA/√Hz) NOISE VOLTAGE (nV/√Hz) 6.0 5.9 10 ENI INI+ 1 0.1 10 5.8 5.7 5.6 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 1 10 FREQUENCY (kHz) 1 100 POWER SUPPLY VOLTAGE (±V) FIGURE 27. INPUT NOISE CHARACTERISTICS FIGURE 28. SUPPLY CURRENT vs SUPPLY VOLTAGE Burn-In Circuit HS-1145RH CERDIP R2 Irradiation Circuit HS-1145RH CERDIP R2 R1 R1 D2 VD1 C1 1 2 3 4 8 D2 V+ C1 D1 V- R1 R1 1 2 3 4 C2 8 + - 7 6 5 + - 7 6 5 C1 V+ NOTES: 1. R1 = 1kΩ, ±5% (Per Socket) 2. R2 = 10kΩ, ±5% (Per Socket) 3. C1 = 0.01µF (Per Socket) or 0.1µF (Per Row) Minimum 4. D1 = 1N4002 or Equivalent (Per Board) 5. D2 = 1N4002 or Equivalent (Per Socket) 6. V+ = +5.5V ± 0.5V 7. V- = -5.5V ± 0.5V NOTES: 8. R1 = 1kΩ, ±5% 9. R2 = 10kΩ, ±5% 10. C1 = C2 = 0.01µF 11. V+ = +5.0V ± 0.5V 12. V- = -5.0V ± 0.5V 8 HS-1145RH Die Characteristics DIE DIMENSIONS: 59 mils x 59 mils x 19 mils ±1 mil (1500µm x 1500µm x 483µm ± 25.4µm) INTERFACE MATERIALS: Glassivation: Type: Nitride Thickness: 4kÅ ±0.5kÅ Top Metallization: Type: Metal 1: AICu(2%)/TiW Thickness: Metal 1: 8kÅ ±0.4kÅ Type: Metal 2: AICu(2%) Thickness: Metal 2: 16kÅ ±0.8kÅ Substrate: UHF-1, Bonded Wafer, DI ASSEMBLY RELATED INFORMATION: Substrate Potential: Floating (Recommend Connection to V-) ADDITIONAL INFORMATION: Transistor Count: 75 Metallization Mask Layout HS-1145RH -IN DISABLE V+ OUT +IN V- OPTIONAL GND (NOTE) NOTE: This pad is not bonded out on packaged units. Die users may set a GND reference, via this pad, to ensure the TTL compatibility of the DIS input when using asymmetrical supplies (e.g. V+ = 10V, V- = 0V). See the “Application Information” section for details. All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 9
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