5962R9666301TEC

HS-26C31RH-T TM Data Sheet July 1999 FN4591.1 Radiation Hardened Quad Differential Line Driver Intersil’s Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of reliability. The Intersil HS-26C31RH-T is a Quad Differential Line Driver designed for digital data transmission over balanced lines and meets the requirements of EIA Standard RS-422. Radiation Hardened CMOS processing assures low power consumption, high speed, and reliable operation in the most severe radiation environments. The HS-26C31RH-T accepts CMOS inputs and converts them to RS-422 compatible outputs. This circuit uses special outputs that enable the drivers to power down without loading down the bus. Enable and disable pins allow several devices to be connected to the same data source and addressed independently. Features • QML Class T, Per MIL-PRF-38535 • Radiation Performance - Gamma Dose . . . . . . . . . . . . . . . . . . . . 1 x 105 RAD(Si) - SEU and SEL . . . . . . . . . . Immune to 100MeV/mg/cm2 • EIA RS-422 Compatible Outputs (Except for IOS) • CMOS Compatible Inputs • High Impedance Outputs when Disabled or Powered Down • Low Power Dissipation 2.75mW Standby (Max) • Single 5V Supply • Low Output Impedance 10Ω or Less • Full -55oC to +125oC Military Temperature Range Pinouts HS1-26C31RH-T (SBDIP), CDIP-T16 TOP VIEW Specifications Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed below must be used when ordering. Detailed Electrical Specifications for the HS-1840ARH-T are contained in SMD 5962-96663. A “hot-link” is provided from our website for downloading . www.intersil.com/spacedefense/newsafclasst.asp Intersil’s Quality Management Plan (QM Plan), listing all Class T screening operations, is also available on our website. www.intersil.com/quality/manuals.asp AIN AIN 1 AO 2 AO 3 ENABLE 4 BO 5 BO 6 BIN 7 GND 8 16 VDD 15 DIN 14 DO 13 DO 12 ENABLE 11 CO 10 CO 9 CIN HS9-26C31RH-T (FLATPACK), CDFP4-F16 TOP VIEW 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD DIN DO DO ENABLE CO CO CIN Ordering Information ORDERING NUMBER 5962R9666301TEC HS1-26C31RH/Proto 5962R9666301TXC HS9-26C31RH/Proto PART NUMBER HS1-26C31RH-T HS1-26C31RH/Proto HS9-26C31RH-T HS9-26C31RH/Proto TEMP. RANGE (oC) -55 to 125 -55 to 125 -55 to 125 -55 to 125 AO AO ENABLE BO BO BIN GND NOTE: Minimum order quantity for -T is 150 units through distribution, or 450 units direct. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002. All Rights Reserved HS-26C31RH-T Functional Diagram ENABLE ENABLE DIN CIN BIN AIN DO DO CO CO BO BO AO AO TRUTH TABLE DEVICE POWER ON/OFF ON ON ON ON ON OFF (0V) INPUTS ENABLE 0 1 X 1 X X ENABLE 1 X 0 X 0 X IN X 0 0 1 1 X OUTPUT OUT HI-Z 0 0 1 1 HI-Z OUT HI-Z 1 1 0 0 HI-Z 2 HS-26C31RH-T Die Characteristics DIE DIMENSIONS: 2450µm x 4950µm x 533µm ±25.4µm (97 x 195 x 21mils ±1mil) METALLIZATION: M1: Mo/Tiw Thickness: 5800Å M2: Al/Si/Cu Thickness: 10kÅ ±1kÅ SUBSTRATE POTENTIAL: Internally connected to VDD. May be left floating. BACKSIDE FINISH: Silicon PASSIVATION: Type: SiO2 Thickness: 8kÅ ±1kÅ WORST CASE CURRENT DENSITY: < 2.0e5 A/cm 2 TRANSISTOR COUNT: 285 PROCESS: Radiation Hardened CMOS, AVLSI Metallization Mask Layout HS-26C31RH (16) VDD (16) VDD (15) DIN (14) DO (13) DO (12) ENABLE (11) CO (10) CO CIN (9) (1) AIN AO (2) AO (3) ENABLE (4) BO (5) BO (6) BIN (7) GND (8) All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 3 GND (8)