0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
ACS541MS

ACS541MS

  • 厂商:

    INTERSIL(Intersil)

  • 封装:

  • 描述:

    ACS541MS - Radiation Hardened Octal Buffer/ Line Driver Three-State - Intersil Corporation

  • 详情介绍
  • 数据手册
  • 价格&库存
ACS541MS 数据手册
ACS541MS January 1996 Radiation Hardened Octal Buffer/ Line Driver Three-State Pinouts 20 LEAD CERAMIC DUAL-IN-LINE MIL-STD-1835 DESIGNATOR, CDIP2-T20, LEAD FINISH C TOP VIEW OE1 A0 A1 A2 A3 A4 A5 A6 A7 1 2 3 4 5 6 7 8 9 20 VCC 19 OE2 18 Y0 17 Y1 16 Y2 15 Y3 14 Y4 13 Y5 12 Y6 11 Y7 Features • Devices QML Qualified in Accordance with MIL-PRF-38535 • Detailed Electrical and Screening Requirements are Contained in SMD# 5962-96710 and Intersil’s QM Plan • 1.25 Micron Radiation Hardened SOS CMOS • Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si) • Single Event Upset (SEU) Immunity: 100 MEV-cm /mg • Dose Rate Upset . . . . . . . . . . . . . . . . >1011 RAD (Si)/s, 20ns Pulse • Dose Rate Survivability . . . . . . . . . . . >10 • Latch-Up Free Under Any Conditions • Military Temperature Range . . . . . . . . . . . . . . . . . . -55oC to +125oC • Significant Power Reduction Compared to ALSTTL Logic • DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V • Input Logic Levels - VIL = 30% of VCC Max - VIH = 70% of VCC Min • Input Current ≤ 1µA at VOL, VOH • Fast Propagation Delay . . . . . . . . . . . . . . . . 17ns (Max), 12ns (Typ) 12 2 RAD (Si)/s, 20ns Pulse GND 10 20 LEAD CERAMIC FLATPACK MIL-STD-1835 DESIGNATOR, CDFP4-F20, LEAD FINISH C TOP VIEW OE1 A0 A1 A2 A3 A4 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC OE2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Description The Intersil ACS541MS is a Radiation Hardened Octal Buffer/Line Driver, with three-state outputs. The output enable pins OE1, OE2 control the Three-State outputs. If either enable is high the output will be in a high impedance state. For data output both enables must be low. The ACS541MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of a radiation hardened, high-speed, CMOS/SOS Logic family. The ACS541MS is supplied in a 20 lead Ceramic Flatpack (K suffix) or a Ceramic Dual-In-Line package (D suffix). A5 A6 A7 GND Ordering Information PART NUMBER 5962F9671001VRC 5962F9671001VXC ACS541D/Sample ACS541K/Sample ACS541HMSR TEMPERATURE RANGE -55oC to +125oC -55oC to +125oC 25oC 25oC 25oC SCREENING LEVEL MIL-PRF-38535 Class V MIL-PRF-38535 Class V Sample Sample Die PACKAGE 20 Lead SBDIP 20 Lead Ceramic Flatpack 20 Lead SBDIP 20 Lead Ceramic Flatpack Die CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 Spec Number 1 518856 File Number 4085 ACS541MS Functional Diagram 2 A0 OE1 OE2 19 3 A1 1 GND VCC 17 Y1 GND VCC 4 A2 16 Y2 GND VCC 15 Y3 GND VCC 6 A4 14 Y4 GND VCC 7 A5 13 Y5 GND VCC 12 Y6 GND VCC 11 Y7 10 20 GND VCC 18 Y0 5 A3 8 A6 9 GND VCC A7 TRUTH TABLE INPUTS OE1 L L H X OE2 L L X H An H L X X OUTPUTS Yn H L Z Z NOTE: L = Low Logic Level, H = High Logic Level, Z = High Impedance All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Spec Number 2 518856 ACS541MS Die Characteristics DIE DIMENSIONS: 102 mils x 102 mils 2,600mm x 2,600mm METALLIZATION: Type: AlSi Metal 1 Thickness: 7.125kÅ ±1.125kÅ Metal 2 Thickness: 9kÅ ±1kÅ GLASSIVATION: Type: SiO2 Thickness: 8kÅ ±1kÅ WORST CASE CURRENT DENSITY: 4.3 mils x 4.3 mils > 110µm x 110µm Metallization Mask Layout ACS541MS (20) VCC (19) OE2 (1) OE1 (18) YO (3) A1 (2) A0 A2 (4) (17) Y1 A3 (5) (16) Y2 NC NC NC NC (15) Y3 A4 (6) A5 (7) (14) Y4 GND (10) Y7 (11) A6 (8) A7 (9) Y6 (12) Y5 (13) Spec Number 3 518856
ACS541MS
1. 物料型号: - 5962F9671001VRC:军用温度范围(-55°C至+125°C),MIL-PRF-38535 Class V等级,20引脚SBDIP封装。 - 5962F9671001VXC:军用温度范围(-55°C至+125°C),MIL-PRF-38535 Class V等级,20引脚陶瓷平封装。 - ACS541D/Sample:25°C,样本,20引脚SBDIP封装。 - ACS541K/Sample:25°C,样本,20引脚陶瓷平封装。 - ACS541HMSR:25°C,裸片。

2. 器件简介: - ACS541MS是Intersil公司生产的抗辐射八缓冲器/线驱动器,具有三态输出。该器件利用先进的CMOS/SOS技术实现高速运行,属于抗辐射、高速CMOS/SOS逻辑系列。

3. 引脚分配: - 20引脚陶瓷双列直插军用标准封装(CDIP2-T20)和20引脚陶瓷平封装(CDFP4-F20)。

4. 参数特性: - 军用产品,符合MIL-PRF-38535标准,具有详细的电气和筛选要求。 - 采用1.25微米抗辐射SOS CMOS技术。 - 总剂量抗辐射能力大于300K RAD(Si)。 - 单事件翻转(SEU)免疫:小于1 x 10^-10错误/比特/天(典型值)。 - SEU LET阈值大于100 MEV-cm2/mg。 - 剂量率抗扰动能力大于10^11 RAD(Si)/s,20ns脉冲。 - 剂量率抗生存能力大于10^12 RAD(Si)/s,20ns脉冲。 - 在任何条件下均无锁存。 - 军事温度范围:-55°C至+125°C。 - 与ALSTTL逻辑相比,显著降低功耗。 - 直流工作电压范围:4.5V至5.5V。 - 输入逻辑电平:VIL = VCC最大值的30%,VIH = VCC最小值的70%。 - 输入电流:在VOL、VOH时小于1µA。 - 快速传播延迟:最大17ns,典型12ns。

5. 功能详解: - ACS541MS具有三态输出,输出使能引脚OE1、OE2控制三态输出。如果任一使能为高,则输出处于高阻抗状态。若要进行数据输出,两个使能都必须为低。

6. 应用信息: - 适用于需要高速、抗辐射的军事和航天应用。

7. 封装信息: - 提供20引脚陶瓷平封装(K后缀)或陶瓷双列直插封装(D后缀)。
ACS541MS 价格&库存

很抱歉,暂时无法提供与“ACS541MS”相匹配的价格&库存,您可以联系我们找货

免费人工找货