CA3096AE

CA3096AE

  • 厂商:

    INTERSIL(Intersil)

  • 封装:

  • 描述:

    CA3096AE - NPN/PNP Transistor Arrays - Intersil Corporation

  • 详情介绍
  • 数据手册
  • 价格&库存
CA3096AE 数据手册
® January 2004 CT RO D U T LETE P TE PRODUC OBSO TITU BS L E S U A3 0 9 6 HF POSSIB CA3096, CA3096A, CA3096C NPN/PNP Transistor Arrays Description The CA3096C, CA3096, and CA3096A are general purpose high voltage silicon transistor arrays. Each array consists of five independent transistors (two PNP and three NPN types) on a common substrate, which has a separate connection. Independent connections for each transistor permit maximum flexibility in circuit design. Types CA3096A, CA3096, and CA3096C are identical, except that the CA3096A specifications include parameter matching and greater stringency in ICBO , ICEO , and VCE(SAT). The CA3096C is a relaxed version of the CA3096. Applications • Five-Independent Transistors - Three NPN and - Two PNP • Differential Amplifiers • DC Amplifiers • Sense Amplifiers • Level Shifters • Timers • Lamp and Relay Drivers • Thyristor Firing Circuits • Temperature Compensated Amplifiers • Operational Amplifiers CA3096, CA3096A, CA3096C Essential Differences CHARACTERISTIC V(BR)CEO (V) (Min) CA3096A CA3096 CA3096C Part Number Information PART NUMBER (BRAND) CA3096AE CA3096AM (3096A) CA3096AM96 (3096A) CA3096CE CA3096E CA3096M (3096) CA3096M96 (3096) TEMP. RANGE (oC) -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 PACKAGE 16 Ld PDIP 16 Ld SOIC 16 Ld SOIC Tape and Reel 16 Ld PDIP 16 Ld PDIP 16 Ld SOIC 16 Ld SOIC Tape and Reel PKG. NO. E16.3 M16.15 M16.15 E16.3 E16.3 M16.15 M16.15 NPN PNP V(BR)CBO (V) (Min) NPN PNP hFE at 1mA NPN PNP hFE at 100µA PNP ICBO (nA) (Max) NPN PNP 35 -40 35 -40 24 -24 45 -40 45 -40 30 -24 150-500 20-200 150-500 20-200 100-670 15-200 40-250 40-250 30-300 Pinout CA3096, CA3096A, CA3096C (PDIP, SOIC) TOP VIEW 1 2 Q1 3 4 5 6 7 8 Q3 Q2 Q4 Q5 14 13 12 11 10 9 16 15 SUBSTRATE 40 -40 100 -100 100 -100 ICEO (nA) (Max) NPN PNP VCE SAT (V) (Max) NPN |VIO| (mV) (Max) NPN PNP |IIO| (µA) (Max) NPN PNP 0.6 0.25 5 5 0.5 0.7 0.7 100 -100 1000 -1000 1000 -1000 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2004. All Rights Reserved 1 All other trademarks mentioned are the property of their respective owners. FN595.5 CA3096, CA3096A, CA3096C Absolute Maximum Ratings NPN PNP Collector-to-Emitter Voltage, VCEO CA3096, CA3096A . . . . . . . . . . . . . . . . . . . . . 35V -40V CA3096C . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24V -24V Collector-to-Base Voltage, VCBO CA3096, CA3096A . . . . . . . . . . . . . . . . . . . . . 45V -40V CA3096C . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V -24V Collector-to-Substrate Voltage, VCIO (Note 1) CA3096, CA3096A . . . . . . . . . . . . . . . . . . . . . 45V CA3096C . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V Emitter-to-Substrate Voltage, VEIO CA3096, CA3096A . . . . . . . . . . . . . . . . . . . . . . -40V CA3096C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -24V Emitter-to-Base Voltage, VEBO CA3096, CA3096A . . . . . . . . . . . . . . . . . . . . . . 6V -40V CA3096C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V -24V -10mA Collector Current, IC (All Types). . . . . . . . . . . . 50mA Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Operating Conditions Thermal Information Thermal Resistance (Typical, Note 2) θJA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 Maximum Power Dissipation (Each Transistor, Note 3) . . . . . 200mW Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. The collector of each transistor of the CA3096 is isolated from the substrate by an integral diode. The substrate (Terminal 16) must be connected to the most negative point in the external circuit to maintain isolation between transistors and to provide for normal transistor action. 2. θJA is measured with the component mounted on an evaluation PC board in free air. 3. Care must be taken to avoid exceeding the maximum junction temperature. Use the total power dissipation (all transistors) and thermal resistances to calculate the junction temperature. Electrical Specifications For Equipment Design, At TA = 25oC CA3096 MIN TYP MAX MIN CA3096A TYP MAX MIN CA3096C TYP MAX UNITS PARAMETER TEST CONDITIONS DC CHARACTERISTICS FOR EACH NPN TRANSISTOR ICBO ICEO V(BR)CEO V(BR)CBO V(BR)CIO V(BR)EBO VZ VCE SAT VBE (Note 4) hFE (Note 4) |∆VBE/∆T| (Note 4) VCB = 10V, IE = 0 VCE = 10V, IB = 0 IC = 1mA, IB = 0 IC = 10µA, IE = 0 ICI = 10µA, IB = IE = 0 IE = 10µA, IC = 0 IZ = 1 0 µ A lC = 10mA, IB = 1mA IC = 1mA, VCE = 5V IC = 1mA, VCE = 5V 35 45 45 6 6 0.6 150 0.001 0.006 50 100 100 8 7.9 0.24 0.69 390 1.9 100 1000 9.8 0.7 0.78 500 35 45 45 6 6 0.6 150 0.001 0.006 50 100 100 8 7.9 0.24 0.69 390 1.9 40 100 9.8 0.5 0.78 500 24 30 30 6 6 0.6 100 0.001 0.006 35 80 80 8 7.9 0.24 0.69 390 1.9 100 1000 9.8 0.7 0.78 670 mV/oC nA nA V V V V V V V DC CHARACTERISTICS FOR EACH PNP TRANSISTOR ICBO VCB = -10V, IE = 0 -0.06 -100 -0.006 -40 -0.06 -100 nA 2 CA3096, CA3096A, CA3096C Electrical Specifications For Equipment Design, At TA = 25oC (Continued) CA3096 MIN -40 -40 -40 40 -0.5 40 20 TYP -0.12 -75 -80 -100 100 -0.16 -0.6 85 47 2.2 MAX -1000 -0.4 -0.7 250 200 MIN -40 -40 -40 40 -0.5 40 20 VZ VCE SAT VBE hFE CA3096A TYP -0.12 -75 -80 -100 100 -0.16 -0.6 85 47 2.2 MAX -100 -0.4 -0.7 250 200 MIN -24 -24 -24 24 -0.5 30 15 CA3096C TYP -0.12 -30 -60 -80 80 -0.16 -0.6 85 47 2.2 MAX -1000 -0.4 -0.7 300 200 mV/oC UNITS nA V V V V V V PARAMETER ICEO V(BR)CEO V(BR)CBO V(BR)EBO V(BR)ElO VCE SAT VBE (Note 4) hFE (Note 4) TEST CONDITIONS VCE = -10V, IB = 0 IC = -100µA, IB = 0 IC = -10µA, IE = 0 IE = -10µA, IC = 0 IEI = 10µA, IB = I C = 0 IC = -1mA, IB = -100µA IC = -100µA, VCE = -5V IC = -100µA, VCE = -5V IC = -1mA, VCE = -5V |∆VBE/∆T| (Note 4) ICBO ICEO IC = -100µA, VCE = -5V Collector-Cutoff Current Collector-Cutoff Current Emitter-to-Base Zener Voltage Collector-to-Emitter Saturation Voltage Base-to-Emitter Voltage DC Forward-Current Transfer Ratio V(BR)CEO Collector-to-Emitter Breakdown Voltage V(BR)CBO Collector-to-Base Breakdown Voltage V(BR)CIO Collector-to-Substrate Breakdown Voltage V(BR)EBO Emitter-to-Base Breakdown Voltage NOTE: 4. Actual forcing current is via the emitter for this test. |∆VBE/∆T| Magnitude of Temperature Coefficient: (for each transistor) Electrical Specifications For Equipment Design At TA = 25oC (CA3096A Only) CA3096A PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS FOR TRANSISTORS Q1 AND Q2 (AS A DIFFERENTIAL AMPLIFIER) Absolute Input Offset Voltage Absolute Input Offset Current Absolute Input Offset Voltage Temperature Coefficient |VIO| |IIO| ∆ V IO ----------------∆T VCE = 5V, IC = 1mA 0.3 0.07 1.1 5 0.6 mV µA µV/oC FOR TRANSISTORS Q4 AND Q5 (AS A DIFFERENTIAL AMPLIFIER) Absolute Input Offset Voltage Absolute Input Offset Current Absolute Input Offset Voltage Temperature Coefficient |VIO| |IIO| ∆ V IO ----------------∆T VCE = -5V, IC = -100µA RS = 0 0.15 2 0.54 5 250 mV nA µV/oC 3 CA3096, CA3096A, CA3096C Electrical Specifications PARAMETER Typical Values Intended Only for Design Guidance At TA = 25oC TYPICAL VALUES SYMBOL TEST CONDITIONS UNITS DYNAMIC CHARACTERISTICS FOR EACH NPN TRANSISTOR Noise Figure (Low Frequency) Low-Frequency, Input Resistance Low-Frequency Output Resistance Admittance Characteristics Forward Transfer Admittance yFE Input Admittance yIE Output Admittance yOE Gain-Bandwidth Product fT gFE bFE gIE bIE gOE bOE f = 1MHz, VCE = 5V, IC = 1mA f = 1MHz, VCE = 5V, IC = 1mA f = 1MHz, VCE = 5V, IC = 1mA f = 1MHz, VCE = 5V, IC = 1mA f = 1MHz, VCE = 5V, IC = 1mA f = 1MHz, VCE = 5V, IC = 1mA VCE = 5V, IC = 1.0mA VCE = 5V, IC = 5mA Emitter-To-Base Capacitance Collector-To-Base Capacitance Collector-To-Substrate Capacitance CEB CCB CCI VEB = 3V VCB = 3V VCI = 3V 7.5 -j13 2.2 j3.1 0.76 j2.4 280 335 0.75 0.46 3.2 mS mS mS mS mS mS MHz MHz pF pF pF NF RI RO f = 1kHz, VCE = 5V, IC = 1mA, RS = 1kΩ f = 1.0kHz, VCE = 5V IC = 1 mA f = 1.0kHz, VCE = 5V IC = 1 mA 2.2 10 80 dB kΩ kΩ DYNAMIC CHARACTERISTICS FOR EACH PNP TRANSISTOR Noise Figure (Low Frequency) Low-Frequency Input Resistance Low-Frequency Output Resistance Gain-Bandwidth Product Emitter-To-Base Capacitance Collector-To-Base Capacitance Base-To-Substrate Capacitance NF RI RO fT CEB CCB CBI f = 1kHz, IC = 100µA, RS = 1kΩ f = 1kHz, VCE = 5V, IC = 100µA f = 1kHz, VCE = 5V, IC = 100µA VCE = 5V, IC = 100µA VEB = -3V VCB = -3V VBI = 3V 3 27 680 6.8 0.85 2.25 3.05 dB kΩ kΩ MHz pF pF pF Typical Applications (SUBSTRATE) f1 500Ω 1 3 1kΩ V+ = 10V 13 1kΩ f2 500Ω 5 4 NOTE: F1 OR F2 < 10kHz 6 Q2 0.1µF 7 44003 8 0 -20 -10 f2 - f1 > 0 0 f1 = f 2 10 f1 - f2 > 0 20 9 OUTPUT 1 2 0.1µF 15 14 Q5 11 3kΩ 10 3kΩ Q4 12 16 OUTPUT VOLTAGE (V) 1 µF 9 CENTER FREQUENCY: 1kHz 8 7 6 5 4 3 2 FREQUENCY DEVIATION (kHz) FIGURE 1. FREQUENCY COMPARATOR USING CA3096 FIGURE 2. FREQUENCY COMPARATOR CHARACTERISTICS 4 CA3096, CA3096A, CA3096C Typical Applications (Continued) 3 NTC SENSOR 2 120VAC 1 RP 6.8kΩ 2W 7 Q3 8 9 16 5.1kΩ Q1 100µF 12V + 11 10 10kΩ 13 14 6 5 10kΩ Q2 4 10kΩ 5.1kΩ 1kΩ G MT1 T2300B MT2 Q4 Q5 12 15 LOAD FIGURE 3. LINE-OPERATED LEVEL SWITCH USING CA3096A OR CA3096 +6V 13 Q5 14 40841 MOSFET 20kΩ 5kΩ 5kΩ OUTPUT 15 11 10 Q4 12 1kΩ 1 3 Q1 Q2 2 50MΩ 5 µF 1kΩ 4 3.9kΩ 10kΩ 6 5 20kΩ 8 7 9 Q3 TIME DELAY CHANGES ±7% FOR SUPPLY VOLTAGE CHANGE OF ±10% 16 FIGURE 4. ONE-MINUTE TIMER USING CA3096A AND A MOSFET 5 CA3096, CA3096A, CA3096C Typical Applications (Continued) V+ 36 -------------T=±I R OL IF IO = 1mA AND RL = 1kΩ VT = ± 36mV V 1kΩ 12 10 Q4 11 15 14 3 VIN 100Ω 1 Q1 2 1kΩ 8 9 Q3 7 VIO 1kΩ 4 Q5 13 6 Q2 5 100Ω EO 0 t 2kΩ RL 1kΩ EO +VT VIN -VT t FIGURE 5. CA3096A SMALL-SIGNAL ZERO VOLTAGE DETECTOR HAVING NOISE IMMUNITY 1.5V 13 Q5 14 15 11 Q4 12 1.5MΩ 1 3 6 7 Q1 Q2 2 500kΩ 5 µF 4 2kΩ 1kΩ 5 8 Q3 10 10kΩ 2kΩ 9 LAMP GE 2158D OR EQUIVALENT 16 (SUBSTRATE) FIGURE 6. TEN-SECOND TIMER OPERATED FROM 1.5V SUPPLY USING CA3096 6 CA3096, CA3096A, CA3096C Typical Applications (Continued) +6V 100kΩ 1% 10 INPUT 100kΩ 1% 11 13 14 100kΩ 1% 6.2kΩ 1% 6 5 3 6.2kΩ 1% OUTPUT NOTES: Q4 Q5 12 15 Q2 Q1 4 9 Q3 51kΩ 1% 51kΩ 1% 300Ω 1% 7 1kΩ 1% 16 -6V 8 5kΩ 1% 2 1 5. Can be operated with either dual supply or single supply. 6. Wide-input common mode range +5V to -5V. 7. Low bias current:
CA3096AE
1. 物料型号: - CA3096AE:-55到125°C,16引脚PDIP封装,封装编号E16.3。 - CA3096AM (3096A):-55到125°C,16引脚SOIC封装,封装编号M16.15。 - CA3096AM96 (3096A):-55到125°C,16引脚SOIC封装,胶带和卷轴,封装编号M16.15。 - CA3096CE:-55到125°C,16引脚PDIP封装,封装编号E16.3。 - CA3096E:-55到125°C,16引脚PDIP封装,封装编号E16.3。 - CA3096M (3096):-55到125°C,16引脚SOIC封装,封装编号M16.15。 - CA3096M96 (3096):-55到125°C,16引脚SOIC封装,胶带和卷轴,封装编号M16.15。

2. 器件简介: - CA3096C、CA3096和CA3096A是通用的高电压硅晶体管阵列。每个阵列由五个独立的晶体管组成(两个PNP和三个NPN类型),它们位于一个共同的基底上,基底有单独的连接。每个晶体管的独立连接允许在电路设计中具有最大的灵活性。

3. 引脚分配: - CA3096、CA3096A、CA3096C的引脚图示如PDF中的图fig_84597所示,提供了PDIP和SOIC两种封装的顶视图。

4. 参数特性: - 包括但不限于集电极-发射极击穿电压、集电极-基极击穿电压、电流增益hFE、集电极截止电流ICBO、集电极-基极饱和电压VCE SAT等参数,具体数值根据不同型号和条件有所差异。

5. 功能详解: - 这些晶体管阵列可用于差分放大器、直流放大器、感应放大器、电平转换器、计时器、灯和继电器驱动器、晶闸管触发电路、温度补偿放大器和运算放大器等多种应用。

6. 应用信息: - 提供了多个应用示例,包括使用CA3096的频率比较器、使用CA3096A或CA3096的线操作水平开关、使用CA3096A和MOSFET的一分钟计时器等。

7. 封装信息: - 提供了PDIP和SOIC两种封装的详细尺寸和规格,包括英寸和毫米单位的最小和最大尺寸,以及相关注释。
CA3096AE 价格&库存

很抱歉,暂时无法提供与“CA3096AE”相匹配的价格&库存,您可以联系我们找货

免费人工找货