CA3160

® CA3160 Data Sheet June 2004 FN976.5 4MHz, BiMOS Operational Amplifier with MOSFET Input/CMOS Output The CA3160 is an operational amplifier that combines the advantages of both CMOS and bipolar transistors on a monolithic chip. The CA3160 series are frequency compensated versions of the popular CA3130 series. Gate protected P-Channel MOSFET (PMOS) transistors are used in the input circuit to provide very high input impedance, very low input current, and exceptional speed performance. The use of PMOS field effect transistors in the input stage results in common-mode input voltage capability down to 0.5V below the negative supply terminal, an important attribute in single supply applications. A complementary symmetry MOS (CMOS) transistor-pair, capable of swinging the output voltage to within 10mV of either supply voltage terminal (at very high values of load impedance), is employed as the output circuit. The CA3160 Series circuits operate at supply voltages ranging from 5V to 16V, or ±2.5V to ±8V when using split supplies, and have terminals for adjustment of offset voltage for applications requiring offset null capability. Terminal provisions are also made to permit strobing of the output stage. Features • MOSFET Input Stage Provides: - Very High ZI . . . . . . . . . . . . . 1.5TΩ (1.5 x 1012Ω) (Typ) - Very Low II . . . . . . . . . . . . . 5pA (Typ) at 15V Operation . . . . . . . . . . . . . . . . . . . . . . . 2pA (Typ) at 5V Operation • Common-Mode Input Voltage Range Includes Negative Supply Rail; Input Terminals Can Be Swung 0.5V Below Negative Supply Rail • CMOS Output Stage Permits Signal Swing to Either (or Both) Supply Rails Applications • Ground Referenced Single Supply Amplifiers • Fast Sample Hold Amplifiers • Long Duration Timers/Monostables • High Input Impedance Wideband Amplifiers • Voltage Followers (e.g., Follower for Single Supply D/A Converter) • Wien-Bridge Oscillators • Voltage Controlled Oscillators • Photo Diode Sensor Amplifiers Ordering Information PART NUMBER CA3160E TEMP. RANGE (oC) -55 to 125 PACKAGE 8 Ld PDIP PKG. NO. E8.3 Pinout CA3160 (PDIP) TOP VIEW OFFSET NULL INV. INPUT NON-INV. INPUT V- 1 2 3 4 8 STROBE V+ OUTPUT OFFSET NULL + 7 6 5 NOTE: CA3160 Series devices have an on-chip frequency compensation network. Supplementary phase compensation or frequency roll-off (if desired) can be connected externally between Terminals 1 and 8. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002, 2004. All Rights Reserved CA3160 Absolute Maximum Ratings Supply Voltage (Between V+ and V- Terminals) . . . . . . . . . . . .+16V Differential Mode Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . .8V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . (V+ +8V) to (V- -0.5V) Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1mA Output Short Circuit Duration (Note 2). . . . . . . . . . . . . . . . Indefinite Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Thermal Information Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . 115 N/A Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC NOTES: 1. θJA is measured with the component mounted on an evaluation PC board in free air. 2. Short Circuit may be applied to ground or to either supply. Electrical Specifications TA = 25oC, V+ = 15V, V- = 0V, Unless Otherwise Specified CA3160 PARAMETER Input Offset Voltage Input Offset Current Input Current Large-Signal Voltage Gain SYMBOL |VIO| |IIO| II AOL VS = ±7.5V VS = ±7.5V VS = ±7.5V VO = 10VP-P, RL = 2kΩ TEST CONDITIONS MIN 50 94 Common-Mode Rejection Ratio Common-Mode Input-Voltage Range Power-Supply Rejection Ratio Maximum Output Voltage CMRR VlCR PSRR VOM+ VOMVOM+ VOMMaximum Output Current IOM+ IOMSupply Current (Note 3) I+ VO = 0V (Source) VO = 15V (Sink) VO = 7.5V, R L = ∞ VO = 0V, R L = ∞ Input Offset Voltage Temperature Drift ∆VIO/∆T RL = ∞ ∆VIO/∆VS, VS = ±7.5V R L = 2k Ω 70 0 12 14.99 12 12 TYP 6 0.5 5 320 110 90 -0.5 to 12 32 13.3 0.002 15 0 22 20 10 2 8 MAX 15 30 50 10 320 0.01 0.01 45 45 15 3 UNITS mV pA pA kV/V dB dB V µV/V V V V V mA mA mA mA µV/oC Electrical Specifications PARAMETER For Design Guidance, VSUPPLY = ±7.5V, TA = 25oC, Unless Otherwise Specified SYMBOL TEST CONDITIONS 10kΩ Across Terminals 4 and 5 or Terminals 4 and 1 RI CI eN f = 1MHz BW = 0.2MHz RS = 1MΩ RS = 10MΩ TYP ±22 1.5 4.3 40 50 72 30 4 10 UNITS mV TΩ pF µV µV nV/√Hz nV/√Hz MHz V/µs Input Offset Voltage Adjustment Range Input Resistance Input Capacitance Equivalent Input Noise Voltage Equivalent Input Noise Voltage eN RS = 100Ω 1kHz 10kHz Unity Gain Crossover Frequency Slew Rate fT SR 2 CA3160 Electrical Specifications PARAMETER Transient Response Rise and Fall Time Overshoot Settling Time For Design Guidance, VSUPPLY = ±7.5V, TA = 25oC, Unless Otherwise Specified (Continued) SYMBOL tr OS tS CL = 25pF, RL = 2kΩ, (Voltage Follower) To