®
CA5420A
Data Sheet December 21, 2005 FN1925.5
0.5MHz, Low Supply Voltage, Low Input Current BiMOS Operational Amplifiers
The CA5420A is an integrated circuit operational amplifier that combines PMOS transistors and bipolar transistors on a single monolithic chip. It is designed and guaranteed to operate in microprocessor logic systems that use V+ = 5V, V- = GND, since it can operate down to ±1V supplies. It will also be suitable for 3.3V logic systems. The CA5420A BiMOS operational amplifier features gateprotected PMOS transistors in the input circuit to provide very high input impedance, very low input currents (less than 1pA). The internal bootstrapping network features a unique guardbanding technique for reducing the doubling of leakage current for every 10°C increase in temperature. The CA5420A operates at total supply voltages from 2V to 20V either single or dual supply. This operational amplifier is internally phase compensated to achieve stable operation in the unity gain follower configuration. Additionally, it has access terminals for a supplementary external capacitor if additional frequency roll-off is desired. Terminals are also provided for use in applications requiring input offset voltage nulling. The use of PMOS in the input stage results in common-mode input voltage capability down to 0.45V below the negative supply terminal, an important attribute for single supply application. The output stage uses a feedback OTA type amplifier that can swing essentially from rail-to-rail. The output driving current of 1.0mA (Min) is provided by using nonlinear current mirrors. This device has guaranteed specifications for 5V operation over the full military temperature range of -55°C to 125°C. The CA5420A has the same 8 lead pinout used for the industry standard 741.
Features
• CA5420A at 5V Supply Voltage with Full Military Temperature Range Guaranteed Specifications • CA5420A Guaranteed to Operate from ±1V to ±10V Supplies • 2V Supply at 300µA Supply Current • 1pA (Typ) Input Current (Essentially Constant to 85°C) • Rail-to-Rail Output Swing (Drive ±2mA Into 1kΩ Load) • Pin Compatible with 741 Op Amp • Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• pH Probe Amplifiers • Picoammeters • Electrometer (High Z) Instruments • Portable Equipment • Inaccessible Field Equipment • Battery Dependent Equipment (Medical and Military) • 5V Logic Systems • Microprocessor Interface
Ordering Information
PART TEMP. PART NUMBER MARKING RANGE (°C) PACKAGE CA5420AM CA5420AMZ* (Note) 5420A 5420AMZ -55 to 125 -55 to 125 8 Ld SOIC 8 Ld SOIC (Pb-free) PKG. DWG. # M8.15 M8.15
Functional Diagram
X1
*Add “96” suffix for Tape and Reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
MOS BIPOLAR
MOS BIPOLAR +
Pinout
CA5420A (SOIC) TOP VIEW
OFFSET 1 NULL INV. 2 INPUT NON-INV. 3 INPUT V- 4 8 STROBE
X1
BUFFER AMPS; BOOTSTRAPPED INPUT PROTECTION NETWORK
HIGH GAIN (50K)
OTA BUFFER (X2)
+
7 V+ 6 OUTPUT 5 OFFSET NULL
NOTE: Pin is connected to Case.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 1998, 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
CA5420A
Absolute Maximun Ratings
Supply Voltage (Between V+ and V- Terminals) . . . . . . . . . . . . 22V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . (V+ + 8V) to (V- -0.5V) Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1mA Output Short Circuit Duration (Note 1). . . . . . . . . . . . . . . . Indefinite Operating Conditions Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . -55°C to 125°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Thermal Information
Thermal Resistance (Typical, Note 2) θJA (°C/W) θJC (°C/W) SOIC Package . . . . . . . . . . . . . . . . . . . 157 N/A Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C Maximum Storage Temperature Range (All Types) . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C (SOIC - Lead Tips Only)
NOTES: 1. Short circuit may be applied to ground or to either supply. 2. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER Input Resistance Input Capacitance Output Resistance Equivalent Input Noise Voltage Short-Circuit Current To Opposite Supply Gain Bandwidth Product Slew Rate Transient Response
Typical Values Intended Only for Design Guidance. V+ = +5V; V- = GND, TA = 25°C SYMBOL RI CI RO eN f = 1kHz f = 10kHz Source Sink IOM+ IOMfT SR Rise Time Overshoot tr OS I8 + I80.01% 0.10% AV = 1 AV = 1 2VP-P Input 2VP-P Input RL = 2kΩ, CL = 100pF RS = 100Ω TEST CONDITIONS CA5420A 150 4.9 300 62 38 2.6 2.4 0.5 0.5 0.7 15 20 2 8 4.5 UNITS TΩ pF Ω nV/√Hz nV/√Hz mA mA MHz V/µs µs % µA mA µs µs
Current from Terminal 8 To VCurrent from Terminal 8 To V+ Settling Time
Electrical Specifications
PARAMETER Input Offset Voltage Input Offset Current Input Current Common Mode Rejection Ratio
TA = 25°C, V+ = 5V, V- = 0, Unless Otherwise Specified TEST CONDITIONS VO = 2.5V VO = 2.5V VO = 2.5V VCM = 0 to 3.7V, VO = 2.5V VO = 2.5V ∆V+ = 1V; ∆V- = 1V RL = ∞ RL = 10kΩ RL = 2kΩ CA5420A MIN 75 3.7 75 85 85 80 TYP 1 0.02 0.02 83 4 -0.3 83 87 87 85 MAX 5 0.5 1 0 UNITS mV pA pA dB V V dB dB dB dB
SYMBOL VIO IIO II CMRR VlCR+ VlCR-
Common Mode Input Voltage Range
Power Supply Rejection Ratio Large Signal Voltage Gain VO = 0.5 to 4V VO = 0.5 to 4V VO = 0.7 to 3V
PSRR AOL
2
FN1925.5 December 21, 2005
CA5420A
Electrical Specifications
PARAMETER Source Current Sink Current Output Voltage TA = 25°C, V+ = 5V, V- = 0, Unless Otherwise Specified (Continued) TEST CONDITIONS V O = 0V V O = 5V RL = ∞ RL = 10kΩ RL = 2kΩ CA5420A MIN 1.2 1.2 4.9 4.7 3.5 V O = 0V VO = 2.5V TYP 2.7 2.1 4.94 0.13 4.9 0.12 4.6 0.1 400 430 MAX 0.15 0.15 0.15 500 550 UNITS mA mA V V V V V V µA µA
SYMBOL ISOURCE ISINK VOM+ VOMVOM+ VOMVOM+ VOM-
Supply Current
ISUPPLY
Electrical Specifications
PARAMETER Input Offset Voltage Input Offset Current Up to TA = 85°C Input Current Up to TA = 85°C Common Mode Rejection Ratio
TA = -55°C to 125°C, V+ = 5V, V- = 0, Unless Otherwise Specified TEST CONDITIONS VO = 2.5V VO = 2.5V CA5420A MIN |II| VO = 2.5V CMRR VlCR+ VlCRVCM = 0 to 3.7V, VO = 2.5V VO = 2.5V ∆V+ = 1V; ∆V- = 1V RL = ∞ RL = 10kΩ R L = 2k Ω ISOURCE ISINK VOM+ VOMVOM+ VOMVOM+ VOMR L = 2k Ω RL = 10kΩ V O = 0V V O = 5V RL = ∞ 70 3.7 70 TYP 2 1.5 2 2 10 80 4 -0.3 83 MAX 10 3 10 5 15 0 UNITS mV nA pA nA pA dB V V dB
SYMBOL VIO IIO
Common Mode Input Voltage Range
Power Supply Rejection Ratio Large Signal Voltage Gain VO = 0.5 to 4V VO = 0.7 to 4V VO = 0.7 to 2.5V Source Current Sink Current Output Voltage
PSRR AOL
85 80 75 1 1 4.8 4.7 3 -
87 87 80 2.7 2.1 4.9 0.16 4.9 0.15 4 0.14 430 480
0.2 0.2 0.2 550 600
dB dB dB mA mA V V V V V V µA µA
Supply Current
ISUPPLY
V O = 0V VO = 2.5V
-
3
FN1925.5 December 21, 2005
CA5420A
Electrical Specifications
PARAMETER Input Offset Voltage Input Offset Current Input Current Large Signal Voltage Gain For Equipment Design at VSUPPLY = ±1V, TA = 25°C, Unless Otherwise Specified TEST CONDITIONS CA5420A MIN RL = 10kΩ 20 86 Common Mode Rejection Ratio CMRR 60 Common Mode Input Voltage Range VlCR+ VlCRPower Supply Rejection Ratio PSRR RL = ∞ 0.2 -1 70 Maximum Output Voltage VOM+ VOMSupply Current Device Dissipation Input Offset Voltage Temp. Drift ISUPPLY PD ∆VIO/∆T 0.9 -0.85 TYP 2 0.01 0.02 100 100 560 65 0.5 -1.3 32 90 0.95 -0.91 350 0.7 4 MAX 5 4 (Note 3) 5 (Note 3) 1000 320 650 1.1 UNITS mV pA pA kV/V dB µV/V dB V V µV/V dB V V µA mW µV/°C
SYMBOL VIO |IIO| |II| AOL
Electrical Specifications
PARAMETER Input Offset Voltage Input Offset Current Input Current Large Signal Voltage Gain
For Equipment Design at VSUPPLY = ±10V, TA = 25°C, Unless Otherwise Specified TEST CONDITIONS CA5420A MIN RL = 10kΩ 20 86 TYP 2 0.03 0.05 100 100 100 80 9.3 -10.3 32 90 9.9 -9.85 450 9 4 MAX 5 4 (Note 3) 5 (Note 3) 320 320 1000 14 UNITS mV pA pA kV/V dB µV/V dB V V µV/V dB V V µA mW µV/°C
SYMBOL VIO |IIO| |II| AOL
Common Mode Rejection Ratio
CMRR
70
Common Mode Input Voltage Range
VlCR+ VlCR-
9 -10 70 RL = ∞
Power Supply Rejection Ratio
PSRR
Maximum Output Voltage
VOM+ VOM-
9.7 -9.7 -
Supply Current Device Dissipation Input Offset Voltage Temperature Drift NOTE:
ISUPPLY PD ∆VIO/∆T
3. The maximum limit represents the levels obtainable on high-speed automatic test equipment. Typical values are obtained under laboratory conditions.
4
FN1925.5 December 21, 2005
CA5420A Typical Applications
Picoammeter Circuit
The exceptionally low input current (typically 0.2pA) makes the CA5420A highly suited for use in a picoammeter circuit. With only a single 10GΩ resistor, this circuit covers the range from ±1.5pA. Higher current ranges are possible with suitable switching techniques and current scaling resistors. Input transient protection is provided by the 1MΩ resistor in series with the input. Higher current ranges require that this resistor be reduced. The 10MΩ resistor connected to pin 2 of the CA5420A decouples the potentially high input capacitance often associated with lower current circuits and reduces the tendency for the circuit to oscillate under these conditions.
10GΩ +1.5V 7 6 500-0-500 µA M ±50pA BATTERY RETURNS 1.5kΩ 1.5kΩ 1% 1kΩ 430Ω 1% -1.5V 150Ω 1% ±15mV 150Ω 1% 68Ω 1% 3 +
High Input Resistance Voltmeter
Advantage is taken of the high input impedance of the CA5420A in a high input resistance DC voltmeter. Only two 1.5V “AA” type penlite batteries power this exceedingly highinput resistance (>1,000,000MΩ) DC voltmeter. Full-scale deflection is ±500mV, ±150mV, and ±15mV. Higher voltage ranges are easily added with external input voltage attenuator networks. The meter is placed in series with the gain network, thus eliminating the meter temperature coefficient error term. Supply current in the standby position with the meter undeflected is 300µA. At full-scale deflection this current rises to 800µA. Carbon-zinc battery life should be in excess of 1,000 hours.
+1.5V 7 6 500-0-500 µA M ±500mV BATTERY RETURNS 1.5kΩ 1.5kΩ 1% 1kΩ 430Ω 1%
10pF 2
1MΩ
10MΩ
+ 1 5
22MΩ
10MΩ 100pF
CA5420A 3 4
CA5420A 2
5 1
4
10kΩ
±15pA
10kΩ
±150mV
±5pA -1.5V ±1.5pA
±50mV
11kΩ
68Ω 1%
1.1kΩ
FIGURE 1. PICOAMMETER CIRCUIT
FIGURE 2. HIGH INPUT RESISTANCE VOLTMETER
Typical Performance Curves
INPUT & OUTPUT VOLTAGE EXCURSIONS FROM THE POSITIVE AND NEGATIVE SUPPLY VOLTAGE (V) 1.0 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 1 5 10 SUPPLY VOLTAGE (V) 15 VO+ VICRVICR+ VOOUTPUT STAGE TRANSISTOR SATURATION VOLTAGE, Q19 (mV) 10 TA = 25°C V- = 0V
TA = 25°C RL = 100kΩ
V+ = 2V V+ = 5V V+ = 10V 100 V+ = 20V
1000 0.001
0.1 1 LOAD (SOURCING) CURRENT (mA)
10
FIGURE 3. OUTPUT VOLTAGE SWING AND COMMON MODE INPUT VOLTAGE RANGE vs SUPPLY VOLTAGE
FIGURE 4. OUTPUT VOLTAGE vs LOAD SOURCING CURRENT
5
FN1925.5 December 21, 2005
CA5420A Typical Performance Curves
OUTPUT STAGE TRANSISTOR SATURATION VOLTAGE, Q17 (mV) 1000 TA = 25°C V+ = 0V SUPPLY CURRENT (µA) 2400 2000 1600 1200 800 400 10 0.01 0.1 1 LOAD (SINKING) CURRENT (mA) 10 0 1 2 3 OUTPUT VOLTAGE (V) 4 5
(Continued)
V+ = 5V V- = GND
100
V- = -20V V- = -10V V- = -5V V- = -2V
FIGURE 5. OUTPUT VOLTAGE vs LOAD SINKING CURRENT
5.00 OUTPUT VOLTAGE SWING (V) TA = 25°C V+ = 5V V- = GND RL TO GND
FIGURE 6. SUPPLY CURRENT vs OUTPUT VOLTAGE
800 700 INPUT BIAS CURRENT (pA) 600 500 400 300 200 100 V+ = 5V V- = GND
3.75
2.50
1.25
0 0 1 10 100 LOAD RESISTANCE (kΩ) 1000
0 25
35
45
55
65 75 85 95 TEMPERATURE (°C)
105
115
125
FIGURE 7. OUTPUT VOLTAGE SWING vs LOAD RESISTANCE
FIGURE 8. INPUT BIAS CURRENT DRIFT (∆IB/∆T)
EQUIVALENT INPUT NOISE VOLTAGE (nV√Hz)
1000 VS = ±10V VS = ±5V VS = ±1V 100
TA = 25°C OPEN LOOP VOLTAGE GAIN (dB) 100 80 60 40 20 0
0 -45 -90 -135 -180
101
1 101
102
103
104
105
106
1
101
102
103
104
105
106
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 9. INPUT NOISE VOLTAGE vs FREQUENCY
FIGURE 10. OPEN LOOP GAIN AND PHASE SHIFT RESPONSE
6
FN1925.5 December 21, 2005
OPEN LOOP PHASE (DEGREES)
TA = 25°C V+ = +10V, V- = 10V RL = 10kΩ CL = 0pF
CA5420A
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 7
FN1925.5 December 21, 2005