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CD4001

CD4001

  • 厂商:

    INTERSIL(Intersil)

  • 封装:

  • 描述:

    CD4001 - CMOS NOR Gate - Intersil Corporation

  • 数据手册
  • 价格&库存
CD4001 数据手册
CD4000BMS, CD4001BMS CD4002BMS, CD4025BMS November 1994 CMOS NOR Gate Pinouts CD4000BMS TOP VIEW NC 1 NC 2 A3 B4 C5 H=A+B+C 6 VSS 7 14 VDD 13 F 12 E 11 D 10 K = D + E + F 9 L=G 8G NC = NO CONNECTION Features • High-Voltage Types (20V Rating) • Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V • Buffered Inputs and Outputs • Standard Symmetrical Output Characteristics • 100% Tested for Maximum Quiescent Current at 20V • 5V, 10V and 15V Parametric Ratings • Maximum Input Current of 1µA at 18V Over Full Package-Temperature Range; 100nA at 18V and +25oC • Noise Margin (Over Full Package Temperature Range): - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V • Meets All Requirements of JEDEC Tentative Standards No. 13B, “Standard Specifications for Description of “B” Series CMOS Device’s CD4001BMS TOP VIEW A1 B2 J=A+B 3 K=C+D 4 C5 D6 VSS 7 14 VDD 13 H 12 G 11 M = G + H 10 L = E + F 9F 8E NC = NO CONNECTION Description CD4000BMS CD4001BMS CD4002BMS CD4025BMS - Dual 3 Plus Inverter - Quad 2 Input - Dual 4 Input - Triple 3 Input CD4002BMS TOP VIEW J=A+B+C+D 1 A2 B3 C4 D5 NC 6 VSS 7 14 VDD 13 K = E + F + G + H 12 H 11 G 10 F 9E 8 NC NC = NO CONNECTION CD4000BMS, CD4001BMS, CD4002BMS, and CD4025BMS NOR gates provide the system designer with direct implementation of the NOR function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. The CD4000BMS, CD4001BMS, CD4002BMS and the CD4025BMS is supplied in these 14 lead outline packages: CD4000B CD4001B CD4002B CD4025B Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4X H1B H3W H4Q H1B H3W H4Q H1B H3W H4Q H1B H3W A1 B2 D3 E4 F5 K=D+E+F 6 VSS 7 CD4025BMS TOP VIEW 14 VDD 13 G 12 H 11 I 10 L = G + H + I 9 J=A+B+C 8C NC = NO CONNECTION CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 File Number 3289 7-649 CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS Functional Diagrams J=A+B M=G+H NC NC A B C H VSS 1 K=D+E+F 14 VDD F E D K L G A 1 2 3 14 13 12 VDD 2 13 B H 3 12 J G K=C+D 4 11 K 4 5 6 11 M 5 H=A+B+C 10 9 C 10 9 8 L=E+F L 6 D F 7 L=G 8 VSS 7 E CD4000BMS CD4001BMS J A B C D NC VSS 1 J=A+B+C+D 14 13 12 11 10 9 K=E+F+G+H VDD K H G F E NC A 1 14 VDD 2 3 4 5 6 7 B 2 L=G+H+I 13 G D 3 12 H E 4 11 I F 5 10 9 K=D+E+F L J K 6 8 VSS 7 J=A+B+C 8 C CD4002BMS CD4025BMS 7-650 Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS Absolute Maximum Ratings DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . ±10mA Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum Reliability Information Thermal Resistance . . . . . . . . . . . . . . . . θja θjc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W o Maximum Package Power Dissipation (PD) at +125 C For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2 VDD = 18V, VIN = VDD or GND Input Leakage IIL VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Input Leakage IIH VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) N Threshold Voltage P Threshold Voltage Functional VOL15 VOH15 IOL5 IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VNTH VPTH F VDD = 15V, No Load VDD = 15V, No Load (Note 3) VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD = 15V, VOUT = 13.5V VDD = 10V, ISS = -10µA VSS = 0V, IDD = 10µA VDD = 2.8V, VIN = VDD or GND VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Input Voltage Low (Note 2) Input Voltage High (Note 2) Input Voltage Low (Note 2) Input Voltage High (Note 2) VIL VIH VIL VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V 3 1, 2, 3 1, 2, 3 1 1 1 1 1 1 1 1 1 7 7 8A 8B 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 LIMITS TEMPERATURE +25 oC PARAMETER Supply Current SYMBOL IDD CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND MIN -100 -1000 -100 - MAX 0.5 50 0.5 100 1000 100 50 -0.53 -1.8 -1.4 -3.5 -0.7 2.8 UNITS µA µA µA nA nA nA nA nA nA mV V mA mA mA mA mA mA mA V V V +125oC -55oC +25o C +125oC -55oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC 14.95 +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC 3.5 11 0.53 1.4 3.5 -2.8 0.7 VOH > VOL < VDD/2 VDD/2 1.5 4 - V V V V NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs 3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max. 7-651 Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS TEMPERATURE 9 10, 11 VDD = 5V, VIN = VDD or GND 9 10, 11 +25oC +125oC, -55oC LIMITS MIN MAX 250 338 200 270 UNITS ns ns ns ns PARAMETER Propagation Delay SYMBOL TPHL TPLH TTHL TTLH CONDITIONS (NOTE 1, 2) VDD = 5V, VIN = VDD or GND Transition Time +25oC +125oC, -55oC NOTES: 1. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 5V, VIN = VDD or GND NOTES 1, 2 TEMPERATURE -55 C, +25 C +125 C VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC +125oC VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC +125oC Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) VOL VOL VOH VOH IOL5 VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, VOUT = 0.4V 1, 2 1, 2 1, 2 1, 2 1, 2 +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +125oC -55oC Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125 C -55oC Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC -55oC Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC -55oC Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC -55oC Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC -55oC Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC -55oC Input Voltage Low Input Voltage High Propagation Delay VIL VIH TPHL TPLH TTHL TTLH VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V VDD = 15V VDD = 10V VDD = 15V 1, 2 1, 2 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC +25oC +25oC +25oC 7 120 90 100 80 V ns ns ns ns o o o o MIN 4.95 9.95 0.36 0.64 0.9 1.6 2.4 4.2 - MAX 0.25 7.5 0.5 1.5 0.5 3.0 50 50 -0.36 -0.64 -1.15 -2.0 -0.9 -1.6 -2.4 -4.2 3 UNITS µA µA µA µA µA µA mV mV V V mA mA mA mA mA mA mA mA mA mA mA mA mA mA V Transition Time 7-652 Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Input Capacitance NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current N Threshold Voltage N Threshold Voltage Delta P Threshold Voltage P Threshold Voltage Delta Functional SYMBOL IDD VNTH ∆VNTH VPTH ∆VPTH F CONDITIONS VDD = 20V, VIN = VDD or GND VDD = 10V, ISS = -10µA VDD = 10V, ISS = -10µA VSS = 0V, IDD = 10µA VSS = 0V, IDD = 10µA VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V 1, 2, 3, 4 +25oC NOTES 1, 4 1, 4 1, 4 1, 4 1, 4 1 TEMPERATURE +25oC +25oC +25o C MIN -2.8 0.2 VOH > VDD/2 MAX 2.5 -0.2 ±1 2.8 ±1 VOL < VDD/2 1.35 x +25oC Limit UNITS µA V V V V V SYMBOL CIN CONDITIONS Any Input NOTES 1, 2 TEMPERATURE +25oC MIN MAX 7.5 UNITS pF +25oC +25oC +25oC ns NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 3. See Table 2 for +25oC limit. 4. Read and Record TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC PARAMETER Supply Current - SSI Output Current (Sink) Output Current (Source) SYMBOL IDD IOL5 IOH5A ±0.1µA ± 20% x Pre-Test Reading ± 20% x Pre-Test Reading DELTA LIMIT TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test (Pre Burn-In) Interim Test 1 (Post Burn-In) Interim Test 2 (Post Burn-In) PDA (Note 1) Interim Test 3 (Post Burn-In) PDA (Note 1) Final Test Group A Group B Subgroup B-5 Subgroup B-6 Group D MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3 Subgroups 1, 2, 3, 9, 10, 11 IDD, IOL5, IOH5A READ AND RECORD IDD, IOL5 IDD, IOL5 IDD, IOL5 NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2. 7-653 Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-883 METHOD 5005 TEST PRE-IRRAD 1, 7, 9 POST-IRRAD Table 4 READ AND RECORD PRE-IRRAD 1, 9 POST-IRRAD Table 4 CONFORMANCE GROUPS Group E Subgroup 2 TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION Static Burn-In 1 Note 1 Static Burn-In 2 Note 1 Dynamic BurnIn Note 1 Irradiation Note 2 Static Burn-In 1 Note 1 Static Burn-In 2 Note 1 Dynamic BurnIn Note 1 Irradiation Note 2 Static Burn-In 1 Note 1 Static Burn-In 2 Note 1 Dynamic BurnIn Note 1 Irradiation Note 2 Static Burn-In 1 Note 1 Static Burn-In 2 Note 1 Dynamic BurnIn Note 1 Irradiation Note 2 NOTE: 1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V OPEN 1, 2, 6, 9, 10 1, 2, 6, 9, 10 1, 2 1, 2, 6, 9, 10 GROUND 3 - 5, 7, 8, 11 - 13 7 7 7 VDD 14 3 - 5, 8, 11 - 14 14 3 - 5, 8, 11 - 14 6, 9, 10 3 - 5, 8, 11 - 13 9V ± -0.5V 50kHz 25kHz PART NUMBER CD4000BMS PART NUMBER CD4001BMS 3, 4, 10, 11 3, 4, 10, 11 3, 4, 10, 11 1, 2, 5 - 9, 12, 13 7 7 7 14 1, 2, 5, 6, 8, 9, 12 - 14 14 1, 2, 5, 6, 8, 9, 12 - 14 14 2 - 5, 9 - 12, 14 14 2 - 5, 9 - 12, 14 1, 13 2 - 5, 9 - 12 3, 4, 10, 11 1, 2, 5, 6, 8, 9, 12, 13 PART NUMBER CD4002BMS 1, 6, 8, 13 1, 6, 8, 13 6, 8 1, 6, 8, 13 2 - 5, 7, 9 - 12 7 7 7 PART NUMBER CD4025BMS 6, 9, 10 6, 9, 10 6, 9, 10 1 - 5, 7, 8, 11 - 13 7 7 7 14 1 - 5, 8, 11 - 14 14 1 - 5, 8, 11 - 14 6, 9, 10 1 - 5, 8, 11 - 13 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 654 Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS Schematic and Logic Diagrams 14 p p VDD p p p n 5* n (12) 3* (11) 4* (13) n n p n INVERTER AND 1 OF 2 GATES (NUMBERS IN PARENTHESES ARE TERMINAL NUMBERS FOR SECOND GATE) 1* (8, 6, 13) n n p n 2* 7 5(12) 6 (10) 4(13) LOGIC DIAGRAM 1 OF 4 GATES (NUMBERS IN PARANTHESES ARE TERMINAL NUMBERS FOR OTHER GATES) 1(8, 6,13) 3 8 9 2(9, 5, 12) (10, 4, 11) LOGIC DIAGRAM VSS n (9, 5, 12) 7 3(11) VSS n (10, 4, 11) p n n 8* n n n p 14 p VDD p p 3 VSS 6(10) p p p 9 *ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK VDD CD4000BMS CD4001BMS 14 p p VDD p p p 14 1 n n p (13) p n 3* n n (1, 11) 4* n (2, 12) 5* (8, 13) n n p n p n n p p p 6 (9, 10) VDD p 2* n (12) 3* (11) 4* (10) 5* (9) n n p n p p n 1 OF 2 GATES (NUMBERS IN PARENTHESES ARE TERMINAL 7 NUMBERS FOR SECOND GATE) 2(12) VSS 1 OF 3 GATES (NUMBERS IN PARENTHESES ARE TERMINAL NUMBERS FOR OTHER GATES) 7 VSS 3(11) 3(1, 11) 1 (13) 4(2, 12) LOGIC DIAGRAM 6 (9, 10) LOGIC DIAGRAM 5(8, 13) 4(10) 5(9) CD4002BMS CD4025BMS 7-655 CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS Typical Performance Characteristics POWER DISSIPATION PER GATE (PD) (µW) AMBIENT TEMPERATURE (TA) = +25oC 105 8 6 4 2 AMBIENT TEMPERATURE (TA) = +25oC SUPPLY VOLTAGE (VDD) = 15V 10V 10V 5V OUTPUT VOLTAGE (VO) (V) SUPPLY VOLTAGE (VDD) = 15V 15 104 8 6 4 10V 10 103 2 8 6 4 2 5V 5 102 8 6 4 2 CL = 50pF CL = 15pF 10 2 4 68 2 4 68 2 4 68 2 4 68 0 5 10 15 INPUT VOLTAGE (VI) (V) 20 25 1 103 10 102 INPUT FREQUENCY (fI) (kHz) 104 FIGURE 1. TYPICAL VOLTAGE TRANSFER CHARACTERISTICS AMBIENT TEMPERATURE (TA) = +25oC FIGURE 2. TYPICAL POWER DISSIPATION vs FREQUENCY OUTPUT LOW (SINK) CURRENT (IOL) (mA) 30 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 25 20 15 10 5 5V 10V OUTPUT LOW (SINK) CURRENT (IOL) (mA) AMBIENT TEMPERATURE (TA) = +25oC 15 12.5 10 7.5 5 2.5 10V GATE-TO-SOURCE VOLTAGE (VGS) = 15V 5V 0 5 10 15 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 3. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 0 OUTPUT HIGH (SINK) CURRENT (IOH) (mA) AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V -5 -10 -15 -20 -25 -30 FIGURE 4. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 +25oC -5 0 OUTPUT HIGH (SINK) CURRENT (IOH) (mA) AMBIENT TEMPERATURE (TA) = GATE-TO-SOURCE VOLTAGE (VGS) = -5V -5 -10V -10V -10 -15V -15V -15 FIGURE 5. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS FIGURE 6. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS 7-656 CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS Typical Performance Characteristics (Continued) AMBIENT TEMPERATURE (TA) = +25oC PROPAGATION DELAY TIME PER GATE (tPHL, tPLH) (ns) TRANSITION TIME (tTHL, tTLH) (ns) 200 175 150 125 100 10V 75 50 25 0 10 15V SUPPLY VOLTAGE (VDD) = 5V AMBIENT TEMPERATURE (TA) = +25oC 200 SUPPLY VOLTAGE (VDD) = 5V 150 100 10V 15V 50 0 20 40 60 80 100 LOAD CAPACITANCE (CL) (pF) 20 30 40 50 60 70 80 90 100 LOAD CAPACITANCE (CL) (pF) FIGURE 7. TYPICAL TRANSITION TIME vs LOAD CAPACITANCE FIGURE 8. TYPICAL PROPAGATION DELAY TIME vs LOAD CAPACITANCE Chip Dimensions and Pad Layouts CD4000BMS CD4001BMS CD4002BMS CD4025BMS Dimensions in parentheses are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch) 7-657
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