CD4018

CD40181BMS December 1992 CMOS 4 Bit Arithmetic Logic Unit Description The CD40181BMS is a low power four bit parallel arithmetic logic unit (ALU) capable of providing 16 binary arithmetic operations on two four-bit words and 16 logical functions of two Boolean variables. The mode control input M selects logical (M = High) or arithmetic (M = Low) operation. The four select inputs (S0, S1, S2, and S3) select the desired logical or arithmetic functions, which include AND, OR, NAND, NOR and exclusive-OR and-NOR in the logic mode, and addition, subtraction, decrement, left-shift and straight transfer in the arithmetic mode, according to the truth table. The CD40181BMS operation may be interpreted with either active-low or active-high data at the A and B word inputs and the function outputs F, by using the appropriate truth table. The CD40181BMS contains logic for full look ahead carry operation for fast carry generation using the carry-generate and carry-propagate outputs G and P for the four bits of the CD40181BMS. Use of the CD40182BMS look-ahead carry generator in conjunction with multiple CD40181BMS’s permits high speed arithmetic operations on long words. A ripple carry output Cn+4 is available for use in systems where speed is not of primary importance. Also included in the CD40181BMS is a comparator output A = B, which assumes a high level whenever the two four-bit input words A and B are equal and the device is in the subtract mode. In addition, relative magnitude information may be derived from the carry-in input Cn and ripple carryout output Cn+4 by placing the unit in the subtract mode and externally decoding using the information in Table B. The CD40181BMS is similar to industry types MC14581 and 74181. CD40181BMS ACTIVE-LOW DATA TOP VIEW Features • High Voltage Type (20V Rating) • Full Look Ahead Carry for Speed Operations on Long Words • Generates 16 Logic Functions of Two Boolean Variables • Generates 16 Arithmetic Functions of Two 4 Bit Binary Words • A = B comparator Output Available • Ripple Carry Input and Output Available • Typical Addition Time 200ns at VDD = 10V • 100% Tested for Quiescent Current at 20V • 5V, 10V and 15V Parametric Ratings • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC • Noise Margin (Over Full Package/Temperature Range) - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V • Standardized Symmetrical Output Characteristics • Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices” Applications • Parallel Arithmetic Units • Process Controllers • Low Power Minicomputers Pinout The CD40181BMS is supplied in these 24-lead outline packages: Braze Seal DIP Ceramic Flatpack HNZ H4P B0 A0 S3 S2 S1 S0 Cn M F0 1 2 3 4 5 6 7 8 9 24 VDD 23 A1 22 B1 21 A2 20 B2 19 A3 18 B3 17 G 16 Cn+4 15 P 14 A = B 13 F3 F1 10 F2 11 VSS 12 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 File Number 3361 7-1400 CD40181BMS Functional Diagrams FUNCTION SELECT INPUTS S0 S1 S2 S3 6 A0 WORD A A1 A2 A3 B0 WORD B B1 B2 B3 Cn CARRY IN MODE M CONTROL 2 23 21 19 1 22 20 18 7 8 5 4 3 9 10 11 13 F0 F1 F2 F3 OUTPUT FUNCTION 14 A = B COMPARE OUT 16 Cn+4 RIPPLE CARRY OUT 17 15 G P LOOK AHEAD CARRY OUTPUTS VDD = 24 VSS = 12 ACTIVE-LOW DATA FUNCTION SELECT INPUTS S0 S1 S2 S3 6 A0 WORD A A1 A2 A3 B0 WORD B B1 B2 B3 Cn CARRY IN MODE M CONTROL 2 23 21 19 1 22 20 18 7 8 5 4 3 9 10 11 13 F0 F1 F2 F3 OUTPUT FUNCTION 14 A = B COMPARE OUT 16 Cn+4 RIPPLE CARRY OUT 17 15 G P LOOK AHEAD CARRY OUTPUTS VDD = 24 VSS = 12 ACTIVE-HIGH DATA 7-1401 Specifications CD40181BMS Absolute Maximum Ratings DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . ±10mA Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum Reliability Information Thermal Resistance θja θjc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W Maximum Package Power Dissipation (PD) at +125oC For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K). . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2 VDD = 18V, VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) N Threshold Voltage P Threshold Voltage Functional VOL15 VOH15 IOL5 IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VNTH VPTH F VDD = 15V, No Load VDD = 15V, No Load (Note 3) VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD = 15V, VOUT = 13.5V VDD = 10V, ISS = -10µA VSS = 0V, IDD = 10µA VDD = 2.8V, VIN = VDD or GND VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Input Voltage Low (Note 2) Input Voltage High (Note 2) Input Voltage Low (Note 2) Input Voltage High (Note 2) VIL VIH VIL VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V 3 1, 2, 3 1, 2, 3 1 1 1 1 1 1 1 1 1 7 7 8A 8B 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 +25oC, +25oC, LIMITS TEMPERATURE +25oC +125oC -55oC +25oC +125oC -55oC +25oC +125oC -55oC +125oC, +125oC, +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC 3.5 11 1.5 4 V V V V -55oC -55oC MIN -100 -1000 -100 14.95 0.53 1.4 3.5 -2.8 0.7 MAX 10 1000 10 100 1000 100 50 -0.53 -1.8 -1.4 -3.5 -0.7 2.8 UNITS µA µA µA nA nA nA nA nA nA mV V mA mA mA mA mA mA mA V V V PARAMETER Supply Current SYMBOL IDD CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND VOH > VOL < VDD/2 VDD/2 NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs. 3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max. 7-1402 Specifications CD40181BMS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS TEMPERATURE 9 10, 11 VDD = 5V, VIN = VDD or GND 9 10, 11 VDD = 5V, VIN = VDD or GND 9 10, 11 VDD = 5V, VIN = VDD or GND 9 10, 11 VDD = 5V, VIN = VDD or GND 9 10, 11 +25oC +125oC, -55oC LIMITS MIN o PARAMETER Propagation Delay A or B to F (Logic Mode), A or B to G or P Propagation Delay A or B to F, Cn+4, or A = B Propagation Delay Cn to F Propagation Delay Cn to Cn+4 Transition Time SYMBOL TPHL1 TPLH1 TPHL2 TPLH2 TPHL3 TPLH3 TPHL4 TPLH4 TTHL TTLH CONDITIONS (NOTE 1, 2) VDD = 5V, VIN = VDD or GND MAX 800 1080 1000 1350 640 864 400 540 200 270 UNITS ns ns ns ns ns ns ns ns ns ns +25oC +125 C, -55 C +25oC +125oC, -55oC o - +25oC +125oC, -55oC +25oC +125oC, -55oC NOTES: 1. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 5V, VIN = VDD or GND VDD = 10V, VIN = VDD or GND VDD = 15V, VIN = VDD or GND Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) VOL VOL VOH VOH IOL5 IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD =15V, VOUT = 13.5V NOTES 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 TEMPERATURE -55oC, +25oC +125 C -55oC, +25oC +125oC -55oC, +25oC +125oC +25 C, +125 C, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +125oC -55oC +125oC -55oC +125oC -55oC +125oC -55oC +125oC -55oC +125oC -55oC +125oC -55oC o o o MIN 4.95 9.95 0.36 0.64 0.9 1.6 2.4 4.2 - MAX 5 150 10 300 10 600 50 50 -0.36 -0.64 -1.15 -2.0 -0.9 -1.6 -2.4 -4.2 UNITS µA µA µA µA µA µA mV mV V V mA mA mA mA mA mA mA mA mA mA mA mA mA mA 7-1403 Specifications CD40181BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Input Voltage Low Input Voltage High Propagation Delay A or B to F (Logic Mode) A or B to G or P Propagation Delay A or B to F, Cn+4 or A = B Propagation Delay Cn to F Propagation Delay Cn to Cn+4 Transition Time Input Capacitance NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. SYMBOL VIL VIH TPHL1 TPLH1 TPHL2 TPLH2 TPHL3 TPLH3 TPHL4 TPLH4 TTHL TTLH CIN CONDITIONS VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V VDD = 15V VDD = 10V VDD = 15V VDD = 10V VDD = 15V VDD = 10V VDD = 15V VDD = 10V VDD = 15V Any Input NOTES 1, 2 1, 2 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2 TEMPERATURE +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC +25 C +25oC +25oC +25oC +25 C +25oC +25oC +25 C +25oC +25 C o o o o MIN +7 - MAX 3 320 240 400 280 270 200 200 140 100 80 7.5 UNITS V V ns ns ns ns ns ns ns ns ns ns pF TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current N Threshold Voltage N Threshold Voltage Delta P Threshold Voltage P Threshold Voltage Delta Functional SYMBOL IDD VNTH ∆VTND VTP ∆VTPD F CONDITIONS VDD = 20V, VIN = VDD or GND VDD = 10V, ISS = -10µA VDD = 10V, ISS = -10µA VSS = 0V, IDD = 10µA VSS = 0V, IDD = 10µA VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V 1, 2, 3, 4 +25oC NOTES 1, 4 1, 4 1, 4 1, 4 1, 4 1 TEMPERATURE +25 C +25oC +25 C +25oC +25 C +25oC o o o MIN -2.8 0.2 VOH > VDD/2 - MAX 25 -0.2 ±1 2.8 ±1 VOL < VDD/2 1.35 x +25oC Limit UNITS µA V V V V V ns NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 3. See Table 2 for +25oC limit. 4. Read and Record TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25oC PARAMETER Supply Current - MSI-2 Output Current (Sink) Output Current (Source) SYMBOL IDD IOL5 IOH5A ± 1.0µA ± 20% x Pre-Test Reading ± 20% x Pre-Test Reading DELTA LIMIT 7-1404 Specifications CD40181BMS TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test (Pre Burn-In) Interim Test 1 (Post Burn-In) Interim Test 2 (Post Burn-In) PDA (Note 1) Interim Test 3 (Post Burn-In) PDA (Note 1) Final Test Group A Group B Subgroup B-5 Subgroup B-6 Group D MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3 Subgroups 1, 2, 3, 9, 10, 11 IDD, IOL5, IOH5A READ AND RECORD IDD, IOL5, IOH5A IDD, IOL5, IOH5A IDD, IOL5, IOH5A NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2. TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-883 METHOD 5005 TEST PRE-IRRAD 1, 7, 9 POST-IRRAD Table 4 READ AND RECORD PRE-IRRAD 1, 9 POST-IRRAD Table 4 CONFORMANCE GROUPS Group E Subgroup 2 TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION Static Burn-In 1 (Note 1) Static Burn-In 2 (Note 1) Dynamic BurnIn (Note 1) Irradiation (Note 2) NOTES: 1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V OPEN 9-11, 13-17 9-11, 13-17 9-11, 13-17 GROUND 1-8, 12, 18-23 12 4-6, 8, 12 12 VDD 24 1-8, 18-24 3, 24 1-8, 18-24 9-11, 13-17 1, 2, 18-23 7 9V ± -0.5V 50kHz 25kHz 7-1405 CD40181BMS Logic Diagram S3 3* S2 4* S1 5* S0 6* 17 18* 16 Cn+4 G B3 15 P A3 19* 13 F3 B2 20* A2 21* 11 22* F2 B1 14 A=B A1 23* 10 F1 B0 1* 9 A0 2* VDD F0 M 8* * ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK n 7* VSS FIGURE 1. ACTIVE LOW DATA 7-1406 CD40181BMS TRUTH TABLE INPUTS/OUTPUTS ACTIVE LOW FUNCTION SELECT S3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 S2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 S1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 S0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 LOGIC FUNCTION M=H A AB A+B Logic 1 A+B B A⊕B A+B AB A⊕B B A+B Logic 0 AB AB A ARITHMETIC* FUNCTION M = L Cn = L A minus 1 AB minus 1 AB minus 1 minus 1 A plus (A + B) AB plus (A + B) A minus B minus 1 A+B A plus (A + B) A plus B AB plus (A + B) A+B A plus A AB plus A AB plus A A Cn = H A AB AB Zero A plus (A + B) plus 1 AB plus (A + B) plus 1 A minus B (A + B) plus 1 A plus (A + B) plus 1 A plus B plus 1 AB plus (A + B) plus 1 A + B plus 1 A plus A plus 1 AB plus A plus 1 AB plus A plus 1 A plus 1 S3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 FUNCTION SELECT S2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 S1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 S0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 LOGIC FUNCTION M=H A A+B AB Logic 0 AB B A⊕B AB A+B A⊕B B AB Logic 1 A+B A+B A INPUTS/OUTPUTS ACTIVE HIGH ARITHMETIC* FUNCTION M = L Cn = H A A+B A+B minus 1 A plus AB (A + B) plus AB A minus B minus 1 AB minus 1 A plus AB A plus B (A + B) plus AB AB minus 1 A plus A (A + B) plus A (A+ B) plus A A minus 1 Cn = L A plus 1 (A + B) plus 1 (A + B) plus 1 Zero A plus AB plus 1 (A + B) plus AB plus 1 A minus B AB A plus AB plus 1 A plus B plus 1 (A + B) plus AB plus 1 AB A plus A plus 1 (A + B) plus A plus 1 (A + B) plus A plus 1 A * Expressed as two’s complement 1 = High level 0 = Low level Typical Performance Characteristics AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC OUTPUT LOW (SINK) CURRENT (IOL) (mA) OUTPUT LOW (SINK) CURRENT (IOL) (mA) 30 25 20 15 10 5 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 15.0 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 12.5 10.0 7.5 5.0 2.5 10V 10V 5V 0 5 10 15 5V 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 2. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 1407 CD40181BMS Typical Performance Characteristics DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V 0 (Continued) DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V -5 0 -5 -10 -15 0 0 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) -10V -20 -25 -10V -10 -15V -30 -15V -15 FIGURE 4. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS 800 AMBIENT TEMPERATURE (TA) = +25oC FIGURE 5. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS PROPAGATION DELAY TIME (tPHL, tPLH) (ns) AMBIENT TEMPERATURE (TA) = +25oC TRANSITION TIME (tTHL, tTLH) (ns) 600 200 SUPPLY VOLTAGE (VDD) = 5V SUPPLY VOLTAGE (VDD) = 5V 400 150 100 10V 50 15V 200 10V 15V 0 0 20 60 80 40 LOAD CAPACITANCE (CL) (pF) 100 0 0 20 40 60 80 100 LOAD CAPACITANCE (CL) (pF) FIGURE 6. TYPICAL PROPAGATION DELAY TIME AS A FUNCTION OF LOAD CAPACITANCE (FOR A OR B TO F, LOGIC MODE 106 POWER DISSIPATION PER (PD) (µW) 8 6 4 2 FIGURE 7. TYPICAL TRANSITION TIME AS A FUNCTION OF LOAD CAPACITANCE AMBIENT TEMPERATURE (TA) = +25oC 105 SUPPLY VOLTAGE (VDD) = 15V 8 6 4 2 5V 10V 104 8 6 4 2 103 8 6 4 2 LOAD CAPACITANCE CL = 50pF CL = 15pF 2 4 68 102 1 10 102 103 104 INPUT FREQUENCY (fIN) (kHz) 2 4 68 2 4 68 2 4 68 2 4 68 105 FIGURE 8. TYPICAL DYNAMIC DISSIPATION AS A FUNCTION OF INPUT FREQUENCY 7-1408 CD40181BMS TABLE A. AC TEST SETUP REFERENCE (ACTIVE LOW DATA) AC PATHS TEST DELAY TIMES SUMIN to SUMOUT SUMIN to P SUMIN to G SUMIN to Cn+4 Cn to SUMOUT Cn to Cn+4 SUMIN to A = B SUMIN to SUMOUT (Logic Mode) B0 A0 B0 B0 Cn Cn B0 All B’s INPUTS OUTPUTS Any F P G Cn+4 Any F Cn+4 A=B Any F DC DATA INPUTS TO VSS B1, B2, B3, M, Cn A1, A2, A3, M, Cn All A’s, M, Cn All A’s, M, Cn All A’s, M All A’s, M All A’s, B1, B2, B3, M All A’s, Cn TO VDD All A’s All B’s B1, B2, B3 B1, B2, B3 All B’s All B’s Cn M Add Add Add Add Add Add Subtract Exclusive OR MODE* * Add Mode: S0, S3 = VDD; S1, S2 = VSS. Subtract Mode: S0, S3 = VSS; S1, S2 = VDD. TABLE B. MAGNITUDE COMPARISON ACTIVE HIGH DATA INPUT Cn 1 0 1 0 1 = High level OUTPUT Cn+4 1 1 0 0 0 = Low level MAGNITUDE A≤B AB A≥B INPUT Cn 0 1 0 1 ACTIVE LOW DATA OUTPUT Cn+4 0 0 1 1 MAGNITUDE A≤B AB A≥B Chip Dimensions and Pad Layout Dimensions in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch). METALLIZATION: Thickness: 11kÅ − 14kÅ, PASSIVATION: BOND PADS: 10.4kÅ - 15.6kÅ, Silane AL. 0.004 inches X 0.004 inches MIN 0.0198 inches - 0.0218 inches DIE THICKNESS: 7-1409