CD4028BMS

CD4028BMS December 1992 CMOS BCD-To-Decimal Decoder Pinout CD4028BMS TOP VIEW Features • High Voltage Type (20V Rating) • BCD-to-Decimal Decoding or Binary-to-Octal Decoding • High Decoded Output Drive Capability • “Positive Logic” Inputs and Outputs - Decoded Outputs Go High On Selection • Medium-Speed Operation - tPHL, tPLH = 80ns (typ) at VDD = 10V • Standardized Symmetrical Output Characteristics • 100% Tested For Quiescent Current at 20V • Maximum Input Current of 1µA at 18V Over Full Package-Temperature Range; - 100nA at 18V and +25oC • Noise Margin (Over Full Package Temperature Range): - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V • 5V, 10V and 15V Parametric Ratings • Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices” 41 22 03 74 95 56 67 VSS 8 16 VDD 15 3 14 1 13 B 12 C 11 D 10 A 98 Functional Diagram VDD 3-BIT BINARY INPUTS 16 0 10 13 BCD INPUTS 12 11 A B C D 1 2 3 4 5 6 7 8 9 8 VSS 3 14 2 15 1 6 7 4 9 5 BUFFERED DECIMAL DECODED OUTPUTS (1 OF 10) BUFFERED OCTAL DECODED OUTPUTS (1 OF 8) Applications • Code Conversion • Indication-Tube Decoder • Address Decoding - Memory Selection Control Description CD4028BMS types are BCD-to-decimal or binary-to-octal decoders consisting of buffering on all 4 inputs, decoding logic gates, and 10 output buffers. A BCD code applied to the four inputs, A to D, results in a high level at the selected one of 10 decimal decoded outputs. Similarly, a 3-bit binary code applied to inputs A through C is decoded in octal code at output 0 to 7 if D = “0”. High drive capability is provided at all outputs to enhance dc and dynamic performance in high fan-out applications. The CD4028BMS is supplied in these 16-lead outline packages: Braze Seal DIP H4S Frit Seal DIP H1E Ceramic Flatpack H3X CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 File Number 3303 7-788 Specifications CD4028BMS Absolute Maximum Ratings DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . ±10mA Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum Reliability Information Thermal Resistance . . . . . . . . . . . . . . . . θja θjc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W o Maximum Package Power Dissipation (PD) at +125 C For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2 VDD = 18V, VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) N Threshold Voltage P Threshold Voltage Functional VOL15 VOH15 IOL5 IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VNTH VPTH F VDD = 15V, No Load VDD = 15V, No Load (Note 3) VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD = 15V, VOUT = 13.5V VDD = 10V, ISS = -10µA VSS = 0V, IDD = 10µA VDD = 2.8V, VIN = VDD or GND VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Input Voltage Low (Note 2) Input Voltage High (Note 2) Input Voltage Low (Note 2) Input Voltage High (Note 2) VIL VIH VIL VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V 3 1, 2, 3 1, 2, 3 1 1 1 1 1 1 1 1 1 7 7 8A 8B 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 LIMITS TEMPERATURE +25 oC PARAMETER Supply Current SYMBOL IDD CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND MIN -100 -1000 -100 - MAX 10 1000 10 100 1000 100 50 -0.53 -1.8 -1.4 -3.5 -0.7 2.8 UNITS µA µA µA nA nA nA nA nA nA mV V mA mA mA mA mA mA mA V V V +125oC -55oC +25o C +125oC -55oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC 14.95 +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC 3.5 11 0.53 1.4 3.5 -2.8 0.7 VOH > VOL < VDD/2 VDD/2 1.5 4 - V V V V NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs. 3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max. 7-789 Specifications CD4028BMS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS TEMPERATURE 9 10, 11 VDD = 5V, VIN = VDD or GND 9 10, 11 +25oC +125oC, -55oC LIMITS MIN MAX 350 473 200 270 UNITS ns ns ns ns PARAMETER Propagation Delay SYMBOL TPHL TPLH TTHL TTLH CONDITIONS (NOTE 1, 2) VDD = 5V, VIN = VDD or GND Transition Time +25oC +125oC, -55oC NOTES: 1. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 5V, VIN = VDD or GND NOTES 1, 2 TEMPERATURE -55 C, +25 C +125oC VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC +125oC VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC +125oC Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) VOL VOL VOH VOH IOL5 VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, VOUT = 0.4V 1, 2 1, 2 1, 2 1, 2 1, 2 +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +125oC -55oC Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125 C -55oC Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC -55oC Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC -55oC Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC -55oC Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC -55oC Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC -55oC Input Voltage Low Input Voltage High VIL VIH VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V, VOH > 9V, VOL < 1V 1, 2 1, 2 +25oC, +125oC, -55oC +25oC, +125oC, -55oC 7 V o o o MIN 4.95 9.95 0.36 0.64 0.9 1.6 2.4 4.2 - MAX 5 150 10 300 10 600 50 50 -0.36 -0.64 -1.15 -2.0 -0.9 -1.6 -2.4 -4.2 3 UNITS µA µA µA µA µA µA mV mV V V mA mA mA mA mA mA mA mA mA mA mA mA mA mA V 7-790 Specifications CD4028BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Propagation Delay SYMBOL TPHL TPLH TTHL TTLH CIN CONDITIONS VDD = 10V VDD = 15V VDD = 10V VDD = 15V NOTES 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2 TEMPERATURE +25oC +25 C +25oC +25 oC o MIN - MAX 160 120 100 80 7.5 UNITS ns ns ns ns pF Transition Time Input Capacitance NOTES: +25oC 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current N Threshold Voltage N Threshold Voltage Delta P Threshold Voltage P Threshold Voltage Delta Functional SYMBOL IDD VNTH ∆VTN VTP ∆VTP F CONDITIONS VDD = 20V, VIN = VDD or GND VDD = 10V, ISS = -10µA VDD = 10V, ISS = -10µA VSS = 0V, IDD = 10µA VSS = 0V, IDD = 10µA VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V 1, 2, 3, 4 +25oC NOTES 1, 4 1, 4 1, 4 1, 4 1, 4 1 TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC MIN -2.8 0.2 VOH > VDD/2 MAX 25 -0.2 ±1 2.8 ±1 VOL < VDD/2 1.35 x +25oC Limit UNITS µA V V V V V ns NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 3. See Table 2 for +25oC limit. 4. Read and Record TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC PARAMETER Supply Current - MSI-2 Output Current (Sink) Output Current (Source) SYMBOL IDD IOL5 IOH5A ± 1.0µA ± 20% x Pre-Test Reading ± 20% x Pre-Test Reading DELTA LIMIT TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test (Pre Burn-In) Interim Test 1 (Post Burn-In) Interim Test 2 (Post Burn-In) PDA (Note 1) Interim Test 3 (Post Burn-In) PDA (Note 1) MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas IDD, IOL5, IOH5A READ AND RECORD IDD, IOL5, IOH5A IDD, IOL5, IOH5A IDD, IOL5, IOH5A 7-791 Specifications CD4028BMS TABLE 6. APPLICABLE SUBGROUPS (Continued) CONFORMANCE GROUP Final Test Group A Group B Subgroup B-5 Subgroup B-6 Group D MIL-STD-883 METHOD 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP A SUBGROUPS 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3 Subgroups 1, 2, 3, 9, 10, 11 READ AND RECORD NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2. TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-883 METHOD 5005 TEST PRE-IRRAD 1, 7, 9 POST-IRRAD Table 4 READ AND RECORD PRE-IRRAD 1, 9 POST-IRRAD Table 4 CONFORMANCE GROUPS Group E Subgroup 2 TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION Static Burn-In 1 Note 1 Static Burn-In 2 Note 1 Dynamic BurnIn Note 1 Irradiation Note 2 NOTE: 1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V OPEN 1 - 7, 9, 14, 15 1 - 7, 9, 14, 15 1 - 7, 9, 14, 15 GROUND 8, 10 - 13 8 8 8 VDD 16 10 - 13, 16 16 10 - 13, 16 1 - 7, 9, 14, 15 10, 12, 13 11 9V ± -0.5V 50kHz 25kHz 7-792 CD4028BMS Logic Diagram 3 0 * A 10 14 1 2 2 * B 13 15 3 1 4 * C 12 6 5 7 6 4 7 * D 11 9 VDD 8 5 9 *ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK VSS TABLE 1. TRUTH TABLE D 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 C 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 A 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 4 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 5 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 6 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 7 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 8 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 9 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 = HIGH LEVEL 0 = LOW LEVEL 7-793 CD4028BMS Typical Performance Characteristics AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC OUTPUT LOW (SINK) CURRENT (IOL) (mA) OUTPUT LOW (SINK) CURRENT (IOL) (mA) 30 25 20 15 10 5 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 15.0 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 12.5 10.0 7.5 5.0 2.5 10V 10V 5V 0 5 10 15 5V 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 1. TYPICAL OUTPUT LOW (SINK) CURRENT CAPACITANCE PROPAGATION DELAY TIME (tPHL, tPLH) (ns) AMBIENT TEMPERATURE (TA) = +25oC FIGURE 2. MINIMUM OUTPUT LOW (SINK) CURRENT CAPACITANCE DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V 0 0 -5 -10 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) 105 300 250 200 150 100 50 10V SUPPLY VOLTAGE (VDD) = 5V -15 -10V -20 -25 -15V -30 15V 0 10 20 30 40 50 60 70 80 90 100 LOAD CAPACITANCE (CL) (pF) FIGURE 3. TYPICAL PROPAGATION DELAY TIME AS A FUNCTION OF LOAD CAPACITANCE DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V -5 FIGURE 4. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS 105 8 6 4 AMBIENT TEMPERATURE (TA) = +25oC SUPPLY VOLTAGE (VDD) = 15V 0 0 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) POWER DISSIPATION (PD) (µW) 104 2 8 6 4 10V 10V 5V 103 2 8 6 4 2 -10V -10 102 -15V -15 8 6 4 2 CL = 50pF CL = 15pF 10 1 10 102 103 104 INPUT FREQUENCY (fI) (kHz) FIGURE 5. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS FIGURE 6. TYPICAL DYNAMIC POWER DISSIPATION AS A FUNCTION OF INPUT FREQUENCY 7-794 CD4028BMS Typical Performance Characteristics (Continued) AMBIENT TEMPERATURE (TA) = +25oC TRANSITION TIME (tTHL, tTLH) (ns) 200 SUPPLY VOLTAGE (VDD) = 5V 150 100 10V 50 15V 0 0 20 40 60 80 100 LOAD CAPACITANCE (CL) (pF) FIGURE 7. TYPICAL TRANSITION TIME AS A FUNCTION OF LOAD CAPACITANCE Typical Applications The circuit shown in Figure 8 converts any 4-bit code to a decimal or hexadecimal code. Table 2 shows a number of codes and the decimal or hexadecimal number in these codes which must be applied to the input terminals of the CD4028BMS to select a particular output. For example: in order to get a high on output number 8 the input must be either an 8 expressed in 4-bit Binary code, a 15 expressed in 4-Bit Gray code, or a 5 expressed in Excess-3 code. INPUTS 1/6 CD4069B B C D CD4028BMS 0123456789 01234567 A A B C D CD4028BMS 0123456789 01234567 16 OUTPUTS FIGURE 8. CODE CONVERSION CIRCUIT TABLE 2. CODE CONVERSION CHART INPUT CODES INPUTS HEXADECIMAL EXCESS-3 4-BIT BINARY 4-BIT GRAY DECIMAL EXCESS-3 GRAY 4-2-2-1 AIKEN OUTPUT NUMBER D 0 0 0 0 0 0 0 0 1 1 1 C 0 0 0 0 1 1 1 1 0 0 0 B 0 0 1 1 0 0 1 1 0 0 1 A 0 1 0 1 0 1 0 1 0 1 0 0 1 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 2 0 0 1 0 0 0 0 0 0 0 0 3 0 0 0 1 0 0 0 0 0 0 0 4 0 0 0 0 1 0 0 0 0 0 0 5 0 0 0 0 0 1 0 0 0 0 0 6 0 0 0 0 0 0 1 0 0 0 0 7 0 0 0 0 0 0 0 1 0 0 0 8 0 0 0 0 0 0 0 0 1 0 0 9 0 0 0 0 0 0 0 0 0 1 0 10 0 0 0 0 0 0 0 0 0 0 1 11 0 0 0 0 0 0 0 0 0 0 0 12 0 0 0 0 0 0 0 0 0 0 0 13 0 0 0 0 0 0 0 0 0 0 0 14 0 0 0 0 0 0 0 0 0 0 0 15 0 0 0 0 0 0 0 0 0 0 0 0 1 2 3 4 5 6 7 8 9 10 0 1 3 2 7 6 4 5 15 14 12 0 1 2 3 4 5 6 7 9 1 2 0 3 4 0 1 2 3 4 0 1 2 3 4 0 0 0 0 5 6 0 0 7-795 CD4028BMS TABLE 2. CODE CONVERSION CHART (Continued) INPUT CODES INPUTS HEXADECIMAL EXCESS-3 4-BIT BINARY 4-BIT GRAY DECIMAL EXCESS-3 GRAY 4-2-2-1 AIKEN OUTPUT NUMBER D 1 1 1 1 1 C 0 1 1 1 1 B 1 0 0 1 1 A 1 0 1 0 1 0 0 0 1 0 0 0 0 0 2 0 0 0 0 0 3 0 0 0 0 0 4 0 0 0 0 0 5 0 0 0 0 0 6 0 0 0 0 0 7 0 0 0 0 0 8 0 0 0 0 0 9 0 0 0 0 0 10 0 0 0 0 0 11 1 0 0 0 0 12 0 1 0 0 0 13 0 0 1 0 0 14 0 0 0 1 0 15 0 0 0 0 1 11 12 13 14 15 13 8 9 11 10 8 9 5 6 8 7 5 6 7 8 9 7 8 9 0 0 0 TUBE REQUIREMENTS 9 8 7 6 5 4 3 2 1 0 VT 1 OF 10 NUMERALS TYPE BURROUGHS B4081 B4336/ 718 B4032 B4021 TRANSISTOR CHARACTERISTICS VT(Vdc) 170 170 170 120 NUMERAL mA/ 14 2 14 14 D C BCD INPUTS B A CD4028BMS Leakage with transistor cutoff ≤ 0.05mA *(TRADEMARK) BURROUGHS CORP. V(BR)CEO ≥ 70V FIGURE 9. NEON READOUT (NIXIE TUBE*) DISPLAY APPLICATION INPUTS INHIBIT (NO SELECTION) ABC D ABC EF D CD4028BMS 012 3456789 * * * * * * * * ABC D ABC D ABC D ABC D ABC D ABC D ABC D ABC D CD4028BMS 0123456789 0 12 3456 7 CD4028BMS 0123456789 8 - - - - - - 15 CD4028BMS 0123456789 16 - - - - - - 23 CD4028BMS 0123456789 24 - - - - - - 31 CD4028BMS 0123456789 32 - - - - - - 39 CD4028BMS 0123456789 40 - - - - - - 47 CD4028BMS 0123456789 48 - - - - - - 55 CD4028BMS 0123456789 56 - - - - - - 63 *1/6 CD4069B 64 OUTPUTS (SELECTED OUTPUT IS HIGH) FIGURE 10. 6-BIT BINARY TO 1-OF-64 ADDRESS DECODER 7-796 CD4028BMS Chip Dimensions and Pad Layout Dimensions in parentheses are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch) METALLIZATION: Thickness: 11kÅ − 14kÅ, PASSIVATION: 10.4kÅ - 15.6kÅ, Silane AL. BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. 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