CD4060

CD4060BMS December 1992 CMOS 14 Stage Ripple-Carry Binary Counter/Divider and Oscillator Pinout Q12 1 Q13 2 16 VDD 15 Q10 14 Q8 13 Q9 12 RESET 11 øI 10 ø0 9 ø0 Features • High Voltage Type (20V Rating) • Common Reset • 12MHz Clock Rate at 15V • Fully Static Operation • Buffered Inputs and Outputs • Schmitt Trigger Input Pulse Line • Standardized, Symmetrical Output Characteristics • 100% Tested for Quiescent Current at 20V • 5V, 10V and 15V Parametric Ratings • Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices” Q14 3 Q6 4 Q5 5 Q7 6 Q4 7 VSS 8 Functional Diagram Q4 Q5 Q6 R 12 14 STAGE RIPPLE COUNTER AND OSCILLATOR øI 11 Q7 Q8 Q9 Q10 Q12 Oscillator Features • All Active Components on Chip • RC or Crystal Oscillator Configuration • RC Oscillator Frequency of 690kHz Min. at 15V 7 5 4 6 14 13 15 1 2 3 Applications • Control counters • Timers • Frequency Dividers • Time Delay Circuits VSS = 8 VDD = 16 Q13 Q14 Description CD4060BMS consists of an oscillator section and 14 ripple carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A RESET input is provided which resets the counter to the all O’s state and disables the oscillator. A high level on the RESET line accomplishes the reset function. All counter stages are master slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition of øI (and ø0). All inputs and outputs are fully buffered. Schmitt trigger action on the input pulse line permits unlimited input pulse rise and fall times. The CD4060BMS is supplied in these 16 lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4W H1F H6W ø0 9 ø0 10 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 File Number 3317 7-949 Specifications CD4060BMS Absolute Maximum Ratings DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . ±10mA Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum Reliability Information Thermal Resistance . . . . . . . . . . . . . . . . θja θjc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W o Maximum Package Power Dissipation (PD) at +125 C For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2 VDD = 18V, VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Output Voltage Output Voltage Output Current (Sink) (Excluding pins 9 & 10) VOL15 VOH15 IOL5 IOL10 IOL15 Output Current (Source) (Excluding pins 9 & 10) IOH5A IOH5B IOH10 IOH15 N Threshold Voltage P Threshold Voltage Functional VNTH VPTH F VDD = 15V, No Load VDD = 15V, No Load (Note 3) VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD = 15V, VOUT = 13.5V VDD = 10V, ISS = -10µA VSS = 0V, IDD = 10µA VDD = 2.8V, VIN = VDD or GND VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Input Voltage Low (Note 2) Input Voltage High (Note 2) Input Voltage Low (Note 2) Input Voltage High (Note 2) VIL VIH VIL VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V 3 1, 2, 3 1, 2, 3 1 1 1 1 1 1 1 1 1 7 7 8A 8B 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 LIMITS TEMPERATURE +25 oC PARAMETER Supply Current SYMBOL IDD CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND MIN -100 -1000 -100 - MAX 10 1000 10 100 1000 100 50 -0.53 -1.8 -1.4 -3.5 -0.7 2.8 UNITS µA µA µA nA nA nA nA nA nA mV V mA mA mA mA mA mA mA V V V +125oC -55oC +25o C +125oC -55oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC 14.95 +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC 3.5 11 0.53 1.4 3.5 -2.8 0.7 VOH > VOL < VDD/2 VDD/2 1.5 4 - V V V V NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs. 3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max. 7-950 Specifications CD4060BMS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS TEMPERATURE 9 10, 11 VDD = 5V, VIN = VDD or GND 9 10, 11 VDD = 5V, VIN = VDD or GND 9 10, 11 TTHL TTLH FØI VDD = 5V, VIN = VDD or GND 9 10, 11 VDD = 5V VIN = VDD or GND 9 10, 11 +25oC +125oC, -55oC LIMITS MIN o PARAMETER Propagation Delay Input Pulse Operation øI to Q4 Propagation Delay QN to QN + 1 Propagation Delay RESET Transition Time SYMBOL TPHL1 TPLH1 TPHL2 TPLH2 TPHL3 CONDITIONS (NOTES 1, 2) VDD = 5V, VIN = VDD or GND MAX 740 999 200 270 360 486 200 270 - UNITS ns ns ns ns ns ns ns ns MHz MHz +25oC +125 C, -55 C +25 C +125oC, -55oC +25 C +125 C, -55 C +25 C +125oC, -55oC o o o o o o 3.5 2.59 Maximum Input Pulse Frequency NOTES: 1. VDD = 5V, CL = 50pF, RL = 200K 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 5V, VIN = VDD or GND NOTES 1, 2 TEMPERATURE -55oC, +25oC o MIN 4.95 9.95 0.36 0.64 0.9 1.6 2.4 4.2 - MAX 5 150 10 300 10 600 50 50 -0.36 -0.64 -1.15 -2.0 -0.9 -1.6 UNITS µA µA µA µA µA µA mV mV V V mA mA mA mA mA mA mA mA mA mA mA mA +125 C VDD = 10V, VIN = VDD or GND 1, 2 -55 oC, +25oC o +125 C VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC +125oC Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) (Excluding pins 9 & 10) Output Current (Sink) (Excluding pins 9 & 10) Output Current (Sink) (Excluding pins 9 & 10) Output Current (Source) (Excluding pins 9 & 10) Output Current (Source) (Excluding pins 9 & 10) Output Current (Source) (Excluding pins 9 & 10) VOL VOL VOH VOH IOL5 VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, VOUT = 0.4V 1, 2 1, 2 1, 2 1, 2 1, 2 +25 oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +125oC -55 IOL10 VDD = 10V, VOUT = 0.5V 1, 2 oC oC +125 -55 oC oC IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125 -55oC IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC -55 IOH5B VDD = 5V, VOUT = 2.5V 1, 2 oC +125oC -55 oC IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC -55 oC 7-951 Specifications CD4060BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Output Current (Source) (Excluding pins 9 & 10) Input Voltage Low Input Voltage High Drive Current at Pin 9 Oscillator Design SYMBOL IOH15 CONDITIONS VDD =15V, VOUT = 13.5V NOTES 1, 2 TEMPERATURE +125oC -55 C VIL VIH IOL VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V, VOH > 9V, VOL < 1V VDD = 5V, VO = .4V VDD = 10V, VO = .5V VDD = 15V, VO = 1.5V Drive Current at Pin 9 Oscillator Design IOH VDD = 5V VDD = 10V VDD = 15V Propagation Delay Input Pulse øI to Q4 Propagation Delay QN to QN + 1 Propagation Delay RESET Transition Time TPHL1 TPLH1 TPHL2 TPLH2 TPHL3 VDD = 10V VDD = 15V VDD = 10V VDD = 15V VDD = 10V VDD = 15V TTHL TTLH FØI VDD = 10V VDD = 15V VDD = 10V VDD = 15V TW VDD = 5V VDD = 10V VDD = 15V Minimum Input Pulse Width F = 100kHz RC Operation RX Max TW VDD = 5V VDD = 10V VDD = 15V RX VDD = 5V, CX = 10µF VDD = 10V, CX = 50µF VDD = 15V, CX = 10µF RC Operation CX Max CX VDD = 5V, RX = 500kΩ VDD = 10V, RX = 300kΩ VDD = 15V, RX = 300kΩ Maximum Oscillator Frequency (Note 4) RC Operation Variation of Frequency (Unit-to-Unit) Variation of Frequency with Voltage Change (Same Unit) RX = 5kΩ CX = 15pF CX = 200pF RS = 560K RX = 50k VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V CX = 200pF 5V to 10V RS = 560K 10V to 15V RX = 50k 1, 2 1, 2 3 3 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 2, 3 2, 3 2, 3 2, 3 2, 3 2, 3 2, 3 2, 3 2, 3 2, 3 2, 3 2, 3 2, 3 +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC +25oC +25 C +25oC +25o o o o MIN +7 0.16 0.42 -1.0 8 12 530 690 18 20 21.1 - MAX -2.4 -4.2 3 -.16 -.42 1.0 300 200 100 80 160 100 100 80 120 60 40 100 40 30 20 20 10 1000 50 50 810 940 25 26 27 2 1 UNITS mA mA V V mA mA mA mA mA mA ns ns ns ns ns ns ns ns MHz MHz ns ns ns ns ns ns MΩ MΩ MΩ µF µF µF ns ns kHz kHz kHz kHz kHz C +25 C +25o +25 C oC +25oC +25oC +25 C +25 oC o +25o C +25oC +25 C +25 oC o Maximum Input Pulse Frequency Minimum RESET Pulse Width +25o +25 C oC +25o C +25oC +25oC +25 oC +25oC +25 oC +25oC +25 +25 +25 oC oC oC +25oC +25oC +25 +25 oC oC +25oC +25 +25 oC oC 7-952 Specifications CD4060BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Input Capacitance NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 4. RC Oscillator applications are not recommended at supply voltages below 7V for RX < 50kΩ. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current N Threshold Voltage N Threshold Voltage Delta P Threshold Voltage P Threshold Voltage Delta Functional SYMBOL IDD VNTH ∆VTN VPTH ∆VTP F CONDITIONS VDD = 20V, VIN = VDD or GND VDD = 10V, ISS = -10µA VDD = 10V, ISS = -10µA VSS = 0V, IDD = 10µA VSS = 0V, IDD = 10µA VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V 1, 2, 3, 4 +25oC NOTES 1, 4 1, 4 1, 4 1, 4 1, 4 1 TEMPERATURE +25oC +25 C +25 C +25oC +25 C +25oC o o o SYMBOL CIN CONDITIONS Any Input NOTES 1, 2 TEMPERATURE +25oC MIN - MAX 7.5 UNITS pF MIN -2.8 0.2 VOH > VDD/2 - MAX 25 -0.2 ±1 2.8 ±1 VOL < VDD/2 1.35 x +25oC Limit UNITS µA V V V V V ns NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 3. See Table 2 for +25oC limit. 4. Read and Record TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC PARAMETER Supply Current - MSI-2 Output Current (Sink) Output Current (Source) SYMBOL IDD IOL5 IOH5A ± 1.0µA ± 20% x Pre-Test Reading ± 20% x Pre-Test Reading DELTA LIMIT TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test (Pre Burn-In) Interim Test 1 (Post Burn-In) Interim Test 2 (Post Burn-In) PDA (Note 1) Interim Test 3 (Post Burn-In) PDA (Note 1) Final Test Group A Group B Subgroup B-5 Subgroup B-6 Group D MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3 Subgroups 1, 2, 3, 9, 10, 11 IDD, IOL5, IOH5A READ AND RECORD IDD, IOL5, IOH5A IDD, IOL5, IOH5A IDD, IOL5, IOH5A 7-953 Specifications CD4060BMS TABLE 6. APPLICABLE SUBGROUPS (Continued) CONFORMANCE GROUP MIL-STD-883 METHOD GROUP A SUBGROUPS READ AND RECORD NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2. TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-883 METHOD 5005 TEST PRE-IRRAD 1, 7, 9 POST-IRRAD Table 4 READ AND RECORD PRE-IRRAD 1, 9 POST-IRRAD Table 4 CONFORMANCE GROUPS Group E Subgroup 2 TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION Static Burn-In 1 Note 1 Static Burn-In 2 Note 1 Dynamic Burn-In Note 1 Irradiation Note 2 NOTES: 1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V OPEN 1 - 7, 9, 10, 13 - 15 1 - 7, 9, 10, 13 - 15 1 - 7, 9, 10, 13 - 15 GROUND 8, 11, 12 8 8, 12 8 VDD 16 11, 12, 16 16 11, 12, 16 1 - 7, 9, 10, 13 - 15 11 9V ± -0.5V 50kHz 25kHz Logic Diagram ø0 9 * * * ø1 Q1 FF1 ø1 Q1 ø2 ø2 Q13 FF2-FF13 Q13 ø14 Q14 FF14 ø14 Q14 ø 0 10 *** ø I 11 Q14 * ** RESET 12 Q4 - Q10 Q12, Q13 VDD ***COUNTER ADVANCES ONE BINARY COUNT ON EACH NEGATIVE - GOING TRANSITION OF øI (AND øO) VSS *ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK **R = HIGH DOMINATES (RESETS ALL STAGES) DETAIL OF TYPICAL FLIP-FLOP STAGE ø p n ø ø p n ø R ø p n ø ø p n ø Q R Q 7-954 CD4060BMS Typical Performance Curves OUTPUT LOW (SINK) CURRENT (IOL) (mA) OUTPUT LOW (SINK) CURRENT (IOL) (mA) AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC 30 25 20 15 10 5 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 15.0 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 12.5 10.0 7.5 5.0 2.5 10V 10V 5V 0 5 10 15 5V 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 1. TYPICAL N-CHANNEL OUTPUT LOW SINK CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V FIGURE 2. MINIMUM N-CHANNEL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V -5 0 0 -5 -10 -15 0 0 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) 100 -10V -20 -25 -10V -10 -15V -30 -15V -15 FIGURE 3. TYPICAL P-CHANNEL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS FIGURE 4. MINIMUM P-CHANNEL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS PROPAGATION DELAY TIME (tPLH, tPHL) (ns) AMBIENT TEMPERATURE (TA) = +25oC PROPAGATION DELAY TIME (tPLH, tPHL) (ns) AMBIENT TEMPERATURE (TA) = +25oC 700 600 500 SUPPLY VOLTAGE (VDD) = 5V 400 300 200 100 0 10V 150 SUPPLY VOLTAGE (VDD) = 5V 100 10V 50 15V 15V 0 20 40 60 80 LOAD CAPACITANCE (CL) (pF) 0 0 20 40 60 80 100 LOAD CAPACITANCE (CL) (pF) FIGURE 5. TYPICAL PROPAGATION DELAY TIME (QN TO QN+1) AS A FUNCTION OF LOAD CAPACITANCE FIGURE 6. TYPICAL PROPAGATION DELAY TIME (Ø1 TO Q4 OUTPUT) AS A FUNCTION OF LOAD CAPACITANCE 7-955 CD4060BMS Typical Performance Curves (Continued) 105 DYNAMIC POWER DISSIPATION (PD) (µW) AMBIENT TEMPERATURE (TA) = +25oC TRANSITION TIME (tTHL, tTLH) (ns) 8 6 4 2 AMBIENT TEMPERATURE (TA) = +25oC 104 SUPPLY VOLTAGE (VDD) = 15V 10V 10V 5V 200 SUPPLY VOLTAGE (VDD) = 5V 8 6 4 2 150 103 100 10V 50 15V 8 6 4 2 102 LOAD CAPACITANCE CL = 50pF CL = 15pF 2 4 68 2 4 68 2 4 68 2 4 68 2 4 68 8 6 4 2 0 0 20 40 60 80 100 LOAD CAPACITANCE (CL) (pF) 10 0.1 1 10 102 103 104 INPUT FREQUENCY (føI) (kHz) FIGURE 7. TYPICAL TRANSITION TIME AS A FUNCTION OF LOAD CAPACITANCE FIGURE 8. TYPICAL DYNAMIC POWER DISSIPATION AS A FUNCTION OF INPUT FREQUENCY Test Circuits VDD 500µF CL CL CL CL CL CL 6 CL 7 8 10 9 11 1 2 3 4 5 16 15 14 13 12 ID CL CX CL CL RS RX 11 10 9 PULSE GENERATOR 12 NOTE: RS IS 2RX TO 10RX T = 2.2 RXCX FIGURE 9. DYNAMIC POWER DISSIPATION TEST CIRCUIT FIGURE 10. TYPICAL RC CIRCUIT 7-956 CD4060BMS Test Circuits (Continued) 11 C1 RC RS C2 10 9 NOTE: CXTAL = C1 + C2 + CSTRAY RC = Broader frequency response RS = Current limiting FIGURE 11. TYPICAL CRYSTAL CIRCUIT Chip Dimensions and Pad Layout Dimension in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch). METALLIZATION: PASSIVATION: Thickness: 11kÅ − 14kÅ, AL. 10.4kÅ - 15.6kÅ, Silane BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 957