CD4532BMS

CD4532BMS December 1992 CMOS 8-Bit Priority Encoder Pinout CD4532BMS TOP VIEW D4 D5 D6 D7 EI Q2 Q1 VSS 1 2 3 4 5 6 7 8 16 VDD 15 E0 14 GS 13 D3 12 D2 11 D1 10 D0 9 Q0 Features • High Voltage Type (20V Rating) • Converts From 1 of 8 to Binary • Provides Cascading Feature to Handle Any Number of Inputs • Group Select Indicates One or More Priority Inputs • Standardized Symmetrical Output Characteristics • 100% Tested for Quiescent Current at 20V • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC • Noise Margin (Over Full Package/Temperature Range) - 0.5V at VDD = 5V - 1.5V at VDD = 10V - 1.5V at VDD = 15V • 5V, 10V and 15V Parametric Ratings • Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices” Functional Diagram D7 PRIORITY SELECT ENCODER Q2 Q1 Q0 Applications • Priority Encoder • Binary or BCD Encoder (Keyboard Encoding) • Floating Point Arithmetic E1 GS D0 E0 Description CD4532BMS consists of combinational logic that encodes the highest priority input (D7 - D0) to a 3-bit binary code. The eight inputs, D7 through D0, each have an assigned priority; D7 is the highest priority and D0 is the lowest. The priority encoder is inhibited when the chip-enable input E1 is low. When E1 is high, the binary representation of the highestpriority input appears on output lines Q2 - Q0, and the group select line GS is high to indicate that priority inputs are present. The enable-out (EO) is high when no priority inputs are present. If any one input is high, EO is low and all cascaded lower-order stages are disabled. The CD4532BMS is supplied in these 16-lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4T H1E H6W CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 File Number 3344 7-1227 Specifications CD4532BMS Absolute Maximum Ratings DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . ±10mA Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum Reliability Information Thermal Resistance . . . . . . . . . . . . . . . . θja θjc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W Maximum Package Power Dissipation (PD) at +125oC For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K). . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2 VDD = 18V, VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) N Threshold Voltage P Threshold Voltage Functional VOL15 VOH15 IOL5 IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VNTH VPTH F VDD = 15V, No Load VDD = 15V, No Load (Note 3) VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD = 15V, VOUT = 13.5V VDD = 10V, ISS = -10µA VSS = 0V, IDD = 10µA VDD = 2.8V, VIN = VDD or GND VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Input Voltage Low (Note 2) Input Voltage High (Note 2) Input Voltage Low (Note 2) Input Voltage High (Note 2) VIL VIH VIL VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V 3 1, 2, 3 1, 2, 3 1 1 1 1 1 1 1 1 1 7 7 8A 8B 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 +25oC, +25oC, LIMITS TEMPERATURE +25oC +125oC -55oC +25oC +125oC -55oC +25oC +125oC -55oC +125oC, +125oC, +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC 3.5 11 1.5 4 V V V V -55oC -55oC MIN -100 -1000 -100 14.95 0.53 1.4 3.5 -2.8 0.7 MAX 10 1000 10 100 1000 100 50 -0.53 -1.8 -1.4 -3.5 -0.7 2.8 UNITS µA µA µA nA nA nA nA nA nA mV V mA mA mA mA mA mA mA V V V PARAMETER Supply Current SYMBOL IDD CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND VOH > VOL < VDD/2 VDD/2 NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs. 3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max. 7-1228 Specifications CD4532BMS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS TEMPERATURE 9 10, 11 VDD = 5V, VIN = VDD or GND TPHL2 TPLH2 TPHL3 TPLH3 TTHL TTLH VDD = 5V, VIN = VDD or GND 9 10, 11 9 10, 11 VDD = 5V, VIN = VDD or GND 9 10, 11 +25oC +125oC, -55oC LIMITS MIN o PARAMETER Propagation Delay E1 to E0 E1 to GS Propagation Delay E1 to QM DN to GS Propagation Delay DN to QM Transition Time SYMBOL TPHL1 TPLH1 CONDITIONS (NOTE 1, 2) VDD = 5V, VIN = VDD or GND MAX 220 297 340 459 440 594 200 270 UNITS ns ns ns ns ns ns ns ns +25oC +125 C, -55 C +25oC +125oC, -55oC o - +25oC +125oC, -55oC NOTES: 1. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 5V, VIN = VDD or GND NOTES 1, 2 TEMPERATURE -55oC, +25oC +125oC VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC +125oC VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC +125oC Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) VOL VOL VOH VOH IOL5 VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, VOUT = 0.4V 1, 2 1, 2 1, 2 1, 2 1, 2 +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +125oC -55oC Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC -55oC Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC -55oC Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC -55oC Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC -55oC Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC -55oC Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC -55oC Input Voltage Low VIL VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC, -55oC 4.95 9.95 0.36 0.64 0.9 1.6 2.4 4.2 50 -0.36 -0.64 -1.15 -2.0 -0.9 -1.6 -2.4 -4.2 3 mV V V mA mA mA mA mA mA mA mA mA mA mA mA mA mA V MIN MAX 5 150 10 300 10 600 50 UNITS µA µA µA µA µA µA mV 7-1229 Specifications CD4532BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Input Voltage High Propagation Delay E1 to E0 E1 to GS Propagation Delay E1 to QM DN to GS Propagation Delay DN to QM Transition Time SYMBOL VIH CONDITIONS VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V TPHL1 TPLH1 TPHL2 TPLH2 TPLH3 TPHL3 TTHL TTLH CIN VDD = 15V VDD = 10V VDD = 15V VDD = 10V VDD = 15V VDD = 10V VDD = 15V Any Input NOTES 1, 2 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2 TEMPERATURE +25oC, +125oC, -55oC +25oC +25o C 110 85 170 125 220 160 100 80 7.5 ns ns ns ns ns ns ns ns pF MIN +7 MAX UNITS V +25oC +25oC +25oC +25 oC +25oC +25oC +25 C o Input Capacitance NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current N Threshold Voltage N Threshold Voltage Delta P Threshold Voltage P Threshold Voltage Delta Functional SYMBOL IDD VNTH ∆VTN VTP ∆VTP F CONDITIONS VDD = 20V, VIN = VDD or GND VDD = 10V, ISS = -10µA VDD = 10V, ISS = -10µA VSS = 0V, IDD = 10µA VSS = 0V, IDD = 10µA VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V 1, 2, 3, 4 +25oC NOTES 1, 4 1, 4 1, 4 1, 4 1, 4 1 TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC MIN -2.8 0.2 VOH > VDD/2 MAX 25 -0.2 ±1 2.8 ±1 VOL < VDD/2 1.35 x +25oC Limit UNITS µA V V V V V ns NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 3. See Table 2 for +25oC limit. 4. Read and Record TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25oC PARAMETER Supply Current - MSI-2 Output Current (Sink) Output Current (Source) SYMBOL IDD IOL5 IOH5A ± 1.0µA ± 20% x Pre-Test Reading ± 20% x Pre-Test Reading DELTA LIMIT 7-1230 Specifications CD4532BMS TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test (Pre Burn-In) Interim Test 1 (Post Burn-In) Interim Test 2 (Post Burn-In) PDA (Note 1) Interim Test 3 (Post Burn-In) PDA (Note 1) Final Test Group A Group B Subgroup B-5 Subgroup B-6 Group D MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3 Subgroups 1, 2, 3, 9, 10, 11 IDD, IOL5, IOH5A READ AND RECORD IDD, IOL5, IOH5A IDD, IOL5, IOH5A IDD, IOL5, IOH5A NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2. TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-883 METHOD 5005 TEST PRE-IRRAD 1, 7, 9 POST-IRRAD Table 4 READ AND RECORD PRE-IRRAD 1, 9 POST-IRRAD Table 4 CONFORMANCE GROUPS Group E Subgroup 2 TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION Static Burn-In 1 (Note 1) Static Burn-In 2 (Note 1) Dynamic BurnIn (Note 1) Irradiation (Note 2) NOTES: 1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V OPEN 6, 7, 9, 14, 15 6, 7, 9, 14, 15 6, 7, 9, 14, 15 GROUND 1 - 5, 8, 10 - 13 8 8 8 VDD 16 1 - 5, 10 - 13, 16 5, 16 1 - 5, 10 - 13, 16 6, 7, 9, 14, 15 1 - 4, 10 - 13 9V ± -0.5V 50kHz 25kHz All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 1231 CD4532BMS Logic Diagram D1 VDD 16 * 11 D2 Q0 9 * 12 D3 * * 13 D4 1 Q1 7 D5 * 2 Q2 D6 6 3 D7 * * 4 GS D0 14 E0 15 VSS 8 VDD * * 10 EI 5 *ALL INPUTS PROTECTED BY CMOS PROTECTION NETWORK VSS FIGURE 1. CD4532BMS LOGIC DIAGRAM TRUTH TABLE INPUT E1 0 1 1 1 1 1 1 1 1 1 D7 X 0 1 0 0 0 0 0 0 0 D6 X 0 X 1 0 0 0 0 0 0 D5 X 0 X X 1 0 0 0 0 0 D4 X 0 X X X 1 0 0 0 0 D3 X 0 X X X X 1 0 0 0 D2 X 0 X X X X X 1 0 0 D1 X 0 X X X X X X 1 0 D0 X 0 X X X X X X X 1 GS 0 0 1 1 1 1 1 1 1 1 Q2 0 0 1 1 1 1 0 0 0 0 OUTPUT Q1 0 0 1 1 0 0 1 1 0 0 Q0 0 0 1 0 1 0 1 0 1 0 E0 0 1 0 0 0 0 0 0 0 0 X = Don’t Care Logic 1 ≡ High Logic 0 ≡ Low 7-1232 CD4532BMS Typical Performance Characteristics OUTPUT LOW (SINK) CURRENT (IOL) (mA) OUTPUT LOW (SINK) CURRENT (IOL) (mA) AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC 30 25 20 15 10 5 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 15.0 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 12.5 10.0 7.5 5.0 2.5 10V 10V 5V 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) 5V 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 2. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V 0 FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V -5 0 0 -5 -10 -15 0 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) 100 -10V -20 -25 -10V -10 -15V -30 -15V -15 FIGURE 4. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS PROPAGATION DELAY TIME (tPHL, tPLH) (ns) FIGURE 5. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS PROPAGATION DELAY TIME (tPHL, tPLH) (ns) AMBIENT TEMPERATURE (TA) = +25oC 600 500 400 300 200 100 AMBIENT TEMPERATURE (TA) = +25oC LOAD CAPACITANCE (CL) = 50pF 200 SUPPLY VOLTAGE (VDD) = 5V 150 100 50 0 10 20 30 40 50 60 70 80 LOAD CAPACITANCE (CL) (pF) 90 10V 15V 0 2.5 5 7.5 10 12.5 15 17.5 20 SUPPLY VOLTAGE (VDD) (V) FIGURE 6. TYPICAL PROPAGATION DELAY (DN TO QM ) vs SUPPLY VOLTAGE FIGURE 7. TYPICAL PROPAGATION DELAY (E1 TO GS, E1 TO EQ) vs LOAD CAPACITANCE 7-1233 CD4532BMS Typical Performance Characteristics PROPAGATION DELAY TIME (tPLH, tPHL) (ns) AMBIENT TEMPERATURE (TA) = +25oC 300 250 200 150 100 15V 50 0 10 20 30 40 50 60 70 80 LOAD CAPACITANCE (CL) (pF) 90 100 0 0 20 40 60 80 100 LOAD CAPACITANCE (CL) (pF) 10V SUPPLY VOLTAGE (VDD) = 5V TRANSITION TIME (tTHL, tTLH) (ns) (Continued) AMBIENT TEMPERATURE (TA) = +25oC 200 SUPPLY VOLTAGE (VDD) = 5V 150 100 10V 50 15V FIGURE 8. TYPICAL PROPAGATION DELAY (DN TO QM) vs LOAD CAPACITANCE 105 8 DYNAMIC POWER DISSIPATION (PD) (µW) 6 4 2 FIGURE 9. TYPICAL TRANSITION TIME vs LOAD CPACITANCE AMBIENT TEMPERATURE (TA) = +25oC 104 8 6 4 2 3 10 8 6 4 2 SUPPLY VOLTAGE (VDD) = 15V LOAD CAPACITANCE (CL) = 50pF 102 8 6 4 2 6 4 2 2 4 68 2 4 68 10V 50pF 10V 15pF 5V 50pF 2 4 68 2 4 68 10 8 1 1 10 102 FREQUENCY (f) (kHz) 103 104 FIGURE 10. TYPICAL DYNAMIC POWER DISSIPATION vs FREQUENCY Applications EI CD4532BMS D15 5 EI 4 D7 3 2 1 13 12 11 10 D0 GS Q2 Q1 Q0 E0 14 6 7 9 15 CD4071BMS 1 2 5 4 EI 3 D7 2 1 13 12 11 10 D0 GS CD4532BMS Q2 Q1 Q0 E0 14 6 7 9 15 5 6 8 9 12 13 3 GS’ Q3’ D8 D7 4 Q2’ 10 Q1’ D0 11 Q0’ E0’ FIGURE 11. 16-LEVEL PRIORITY ENCODER 7-1234 CD4532BMS Applications (Continued) 1/4 CD4071BMS D9 D8 Q3’ 1/6 CD4069BMS CD4532BMS D7 EI D7 GS Q2 Q1 D0 D0 Q0 1/4 CD4071BMS Q2’ Q1’ Q0’ FIGURE 12. 0-TO-9 KEYBOARD ENCODER TRUTH TABLE INPUT D9 1 0 0 0 0 0 0 0 0 0 D8 X 1 0 0 0 0 0 0 0 0 D7 X X 1 0 0 0 0 0 0 0 D6 X X X 1 0 0 0 0 0 0 D5 X X X X 1 0 0 0 0 0 D4 X X X X X 1 0 0 0 0 D3 X X X X X X 1 0 0 0 D2 X X X X X X X 1 0 0 D1 X X X X X X X X 1 0 D0 X X X X X X X X X 1 GS 0 0 1 1 1 1 1 1 1 1 Q3’ 1 1 0 0 0 0 0 0 0 0 OUTPUT Q2’ 0 0 1 1 1 1 0 0 0 0 Q1’ 0 0 1 1 0 0 1 1 0 0 Q0’ 1 0 1 0 1 0 1 0 1 0 X = Don’t Care Logic 1 ≡ High Logic 0 ≡ Low Chip Dimensions and Pad Layout METALLIZATION: PASSIVATION: Thickness: 11kÅ − 14kÅ, AL. 10.4kÅ - 15.6kÅ, Silane BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches Dimensions in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch). 7-1235