CTS191MS

HCTS191MS September 1995 Radiation Hardened Synchronous 4-Bit Up/Down Counter Pinouts 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16 TOP VIEW P1 Q1 Q0 CE U/D Q2 Q3 GND 1 2 3 4 5 6 7 8 16 VCC 15 P0 14 CP 13 RC 12 TC 11 PL 10 P2 9 P3 Features • • • • • • • • • • • • • 3 Micron Radiation Hardened CMOS SOS Total Dose 200K RAD (Si) SEP Effective LET No Upsets: >100 MEV-cm2/mg Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/BitDay (Typ) Dose Rate Survivability: >1 x 1012 RAD (Si)/s Dose Rate Upset: >1010 RAD (Si)/s 20ns Pulse Cosmic Ray Upset Immunity 2 x 10-9 Errors/Bit Day Latch-Up Free Under Any Conditions Fanout (Over Temperature Range) - Standard Outputs - 10 LSTTL Loads Military Temperature Range: -55oC to +125oC Significant Power Reduction Compared to LSTTL ICs DC Operating Voltage Range: 4.5V to 5.5V LSTTL Input Compatibility - VIL = 0.8V Max - VIH = VCC/2 Min Input Current Levels Ii ≤ 5µA @ VOL, VOH 16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F16 TOP VIEW P1 Q1 Q0 CE U/D Q2 Q3 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC P0 CP RC TC PL P2 P3 • Description The Intersil HCTS191MS is a Radiation Hardened asynchronously presettable 4 bit binary up/down synchronous counter. Presetting the counter to the number on the preset data inputs (P0 - P3) is accomplished by a low asynchronous parallel load input (PL). Counting occurs when PL is high, Count Enable (CE) is low, and the Up/Down (U/D) input is either low for up-counting or high for down-counting. The counter is incremented or decremented synchronously with the low-to-high transition of the clock. When an overflow or underflow of the counter occurs, the Terminal Count output (TC), which is low during counting, goes high and remains high for one clock cycle. This output can be used for look-ahead carry in high speed cascading. The TC output also initiates the Ripple Clock output (RC) which, normally high, goes low and remains low for the low-level portion of the clock pulse. These counter can be cascaded using the Ripple Carry output. The HCTS191MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS191MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix). TRUTH TABLE FUNCTION Count Up Count Down Asynchronous Preset No Change PL H H L H CE L L X H U/D L H X X X X CP H = High Level, L = Low Level, X = Immaterial = Transition from low to high NOTE: U/D or CE should be changed only when CLOCK (CP) is high. Ordering Information PART NUMBER HCTS191DMSR HCTS191KMSR HCTS191D/Sample HCTS191K/Sample HCTS191HMSR TEMPERATURE RANGE -55oC to +125oC SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent Sample Sample Die PACKAGE 16 Lead SBDIP 16 Lead Ceramic Flatpack 16 Lead SBDIP DB NA 16 Lead Ceramic Flatpack Die -55oC to +125oC +25oC +25oC +25oC CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 Spec Number File Number 580 518621 2250.2 Functional Diagram 14 CP 5 U/D 11 PD 13 RC 12 TC HCTS191MS PL P T Q P T PL P Q T PL P Q T PL 581 4 CE Q CP Q FF0 CP Q FF1 CP Q FF2 CP Q FF3 Spec Number 518621 3 Q0 Q1 2 Q2 6 Q3 7 Specifications HCTS191MS Absolute Maximum Ratings Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . ±10mA DC Drain Current, Any One Output . . . . . . . . . . . . . . . . . . . . . . .±25mA (All Voltage Reference to the VSS Terminal) Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 Reliability Information Thermal Resistance θJA θJC SBDIP Package. . . . . . . . . . . . . . . . . . . . 73oC/W 24oC/W Ceramic Flatpack Package . . . . . . . . . . . 114oC/W 29oC/W Maximum Package Power Dissipation at +125oC Ambient SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.7mW/oC Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.8mW/oC CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.. Operating Conditions Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Input Rise and Fall Times at VCC = 4.5V (TR, TF) . . . . .500ns Max Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2, 3 Output Current (Sink) IOL VCC = 4.5V, VIH = 4.5V, VOUT = 0.4V, VIL = 0V 1 2, 3 Output Current (Source) IOH VCC = 4.5V, VIH = 4.5V, VOUT = VCC -0.4V, VIL = 0V VCC = 4.5V, VIH = 2.25V, IOL = 50µA, VIL = 0.8V VCC = 5.5V, VIH = 2.75V, IOL = 50µA, VIL = 0.8V Output Voltage High VOH VCC = 4.5V, VIH = 2.25V, IOH = -50µA, VIL = 0.8V VCC = 5.5V, VIH = 2.75V, IOH = -50µA, VIL = 0.8V Input Leakage Current IIN VCC = 5.5V, VIN = VCC or GND 1 2, 3 1, 2, 3 LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC, +125oC, -55oC MIN 4.8 4.0 -4.8 -4.0 MAX 40 750 0.1 UNITS µA µA mA mA mA mA V PARAMETER Quiescent Current SYMBOL ICC (NOTE 1) CONDITIONS VCC = 5.5V, VIN = VCC or GND Output Voltage Low VOL 1, 2, 3 +25oC, +125oC, -55oC - 0.1 V 1, 2, 3 +25oC, +125oC, -55oC VCC -0.1 VCC -0.1 - - V 1, 2, 3 +25oC, +125oC, -55oC - V 1 2, 3 +25oC +125oC, -55oC +25oC, +125oC, -55oC ±0.5 5.0 - µA µA - Noise Immunity Functional Test NOTES: FN VCC = 4.5V, VIH = 2.25V, VIL = 0.8V (Note 2) 7, 8A, 8B 1. All voltages reference to device GND. 2. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”. Spec Number 582 518621 Specifications HCTS191MS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 9 10, 11 TPHL VCC = 4.5V 9 10, 11 Pn to Qn TPLH VCC = 4.5V 9 10, 11 TPHL VCC = 4.5V 9 10, 11 CP to Qn TPLH VCC = 4.5V 9 10, 11 TPHL VCC = 4.5V 9 10, 11 CP to RC TPLH VCC = 4.5V 9 10, 11 TPHL VCC = 4.5V 9 10, 11 CP to TC TPLH VCC = 4.5V 9 10, 11 TPHL VCC = 4.5V 9 10, 11 U/D to RC TPLH VCC = 4.5V 9 10, 11 TPHL VCC = 4.5V 9 10, 11 U/D to TC TPLH VCC = 4.5V 9 10, 11 TPHL VCC = 4.5V 9 10, 11 CE to RC TPLH VCC = 4.5V 9 10, 11 TPHL VCC = 4.5V 9 10, 11 NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V. LIMITS TEMPERATURE +25oC +125oC, -55oC +25 C +125oC, -55oC +25 C +125oC, -55oC +25 C +125oC, -55oC +25 C +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC o o o o PARAMETER PL to Qn SYMBOL TPLH (NOTES 1, 2) CONDITIONS VCC = 4.5V MIN 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 MAX 34 37 44 49 27 31 39 45 26 30 29 33 20 23 32 34 37 42 40 46 42 45 38 43 34 38 42 45 22 25 35 38 UNITS ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Spec Number 583 518621 Specifications HCTS191MS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Capacitance Power Dissipation SYMBOL CPD CONDITIONS VCC = 5.0V, f = 1MHz NOTES 1 1 Input Capacitance CIN VCC = 5.0V, f = 1MHz 1 1 Output Transition Time TTHL TTLH VCC = 4.5V 1 1 Maximum Operating Frequency (CPU, CPD) Setup Time Pn to PL FMAX VCC = 4.5V 1 1 TSU VCC = 4.5V 1 1 Setup Time CE to CP TSU VCC = 4.5V 1 1 Setup Time U/D to CP TSU VCC = 4.5V 1 1 Hold Time Pn to PL TH VCC = 4.5V 1 1 Hold Time CE to CP TH VCC = 4.5V 1 1 Hold Time U/D to CP TH VCC = 4.5V 1 1 Recovery Time TREC VCC = 4.5V 1 1 CP Pulse Width TW VCC = 4.5V 1 1 PL Pulse Width TW VCC = 4.5V 1 1 NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics. TEMPERATURE +25oC +125oC, -55oC +25oC +125oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC MIN 12 18 12 18 18 27 2 2 2 2 0 0 12 18 16 24 20 30 MAX 54 84 10 10 15 22 30 20 UNITS pF pF pF pF ns ns MHz MHz ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Spec Number 584 518621 Specifications HCTS191MS TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS 200K RAD LIMITS TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC MIN 4.0 -4.0 VCC -0.1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 MAX 0.75 0.1 ±5 37 49 31 45 30 33 23 34 42 46 45 43 38 45 25 38 UNITS mA mA mA V V µA ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns PARAMETER Quiescent Current Output Current (Sink) Output Current (Source) Output Voltage Low Output Voltage High Input Leakage Current Noise Immunity Functional Test PL to Qn SYMBOL ICC IOL IOH VOL VOH IIN FN TPLH TPHL (NOTES 1, 2) CONDITIONS VCC = 5.5V, VIN = VCC or GND VCC = 4.5V, VIN = VCC or GND, VOUT = 0.4V VCC = 4.5V, VIN = VCC or GND, VOUT = VCC -0.4V VCC = 4.5V and 5.5V, VIH = VCC/2, VIL = 0.8V, IOL = 50µA VCC = 4.5V and 5.5V, VIH = VCC/2, VIL = 0.8V, IOH = -50µA VCC = 5.5V, VIN = VCC or GND VCC = 4.5V, VIH = 2.25V, VIL = 0.8V , (Note 3) VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V Pn to Qn TPLH TPHL CP to Qn TPLH TPHL Cp to RC TPLH TPHL CP to TC TPLH TPHL U/D to RC TPLH TPHL U/D to TC TPLH TPHL CE to RC TPLH TPHL NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V. 3. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”. TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC) GROUP B SUBGROUP 5 5 PARAMETER ICC IOL/IOH DELTA LIMIT 12µA -15% of 0 Hour Spec Number 585 518621 Specifications HCTS191MS TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test I (Postburn-In) Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Group B Subgroup B-5 Subgroup B-6 Group D NOTE: 1. Alternate Group A testing in accordance with method 5005 of MIL-STD-883 may be exercised. METHOD 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 Sample/5005 Sample/5005 Sample/5005 Sample/5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 7, 9 Subgroups 1, 2, 3, 9, 10, 11 ICC, IOL/H READ AND RECORD ICC, IOL/H ICC, IOL/H ICC, IOL/H TABLE 7. TOTAL DOSE IRRADIATION TEST CONFORMANCE GROUPS Group E Subgroup 2 NOTE: 1. Except FN test which will be performed 100% Go/No-Go. METHOD 5005 PRE RAD 1, 7, 9 POST RAD Table 4 READ AND RECORD PRE RAD 1,9 POST RAD Table 4 (Note 1) TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS OSCILLATOR OPEN GROUND 1/2 VCC = 3V ± 0.5V VCC = 6V ± 0.5V 50kHz 25kHz STATIC BURN-IN I TEST CONNECTIONS (Note 1) 2, 3, 6, 7, 12, 13 1, 4, 5, 8 - 11, 14, 15 16 - STATIC BURN-IN II TEST CONNECTIONS (Note 1) 2, 3, 6, 7, 12, 13 8 1, 4, 5, 9 - 11, 14 - 16 - DYNAMIC BURN-IN TEST CONNECTIONS (Note 2) NOTES: 1. Each pin except VCC and GND will have a resistor of 10kΩ ± 5% for static burn-in 2. Each pin except VCC and GND will have a resistor of 1kΩ ± 5% for dynamic burn-in TABLE 9. IRRADIATION TEST CONNECTIONS OPEN 2, 3, 6, 7, 12, 13 GROUND 8 VCC = 5V ± 0.5V 1, 4, 5, 9 - 11, 14 - 16 1, 4, 5, 8 - 10, 15 2, 3, 6, 7, 12, 13 11, 16 14 - NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing. Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures. Spec Number 586 518621 HCTS191MS Intersil Space Level Product Flow - ‘MS’ Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method 2011 Sample - Die Shear Monitor, Method 2019 or 2027 100% Internal Visual Inspection, Method 2010, Condition A 100% Temperature Cycle, Method 1010, Condition C, 10 Cycles 100% Constant Acceleration, Method 2001, Condition per Method 5004 100% PIND, Method 2020, Condition A 100% External Visual 100% Serialization 100% Initial Electrical Test (T0) 100% Static Burn-In 1, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Interim Electrical Test 2 (T2) 100% Delta Calculation (T0-T2) 100% PDA 1, Method 5004 (Notes 1and 2) 100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or Equivalent, Method 1015 100% Interim Electrical Test 3 (T3) 100% Delta Calculation (T0-T3) 100% PDA 2, Method 5004 (Note 2) 100% Final Electrical Test 100% Fine/Gross Leak, Method 1014 100% Radiographic, Method 2012 (Note 3) 100% External Visual, Method 2009 Sample - Group A, Method 5005 (Note 4) 100% Data Package Generation (Note 5) NOTES: 1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1. 2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the failures from subgroup 7. 3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004. 4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005. 5. Data Package Contents: • Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity). • Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage. • GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test equipment, etc. Radiation Read and Record data on file at Intersil. • X-Ray report and film. Includes penetrometer measurements. • Screening, Electrical, and Group A attributes (Screening attributes begin after package seal). • Lot Serial Number Sheet (Good units serial number and lot number). • Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. • The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative. Spec Number 587 518621 HCTS191MS AC Timing Diagrams VIH VS VIL TPLH TPHL VOH VS VOL TTLH 80% VOL 20% 80% 20% TTHL OUTPUT CL = 50pF RL = 500Ω INPUT CL RL AC Load Circuit DUT TEST POINT VOH OUTPUT AC VOLTAGE LEVELS PARAMETER VCC VIH VS VIL GND HCTS 4.50 3.00 1.30 0 0 UNITS V V V V V All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 Spec Number 588 518621 HCTS191MS Die Characteristics DIE DIMENSIONS: 104 x 86 mils METALLIZATION: Type: AlSi Metal Thickness: 11kÅ ± 1kÅ GLASSIVATION: Type: SiO2 Thickness: 13kÅ ± 2.6kÅ WORST CASE CURRENT DENSITY: < 2.0 x 105A/cm2 BOND PAD SIZE: 100µm x 100µm 4 x 4 mils Metallization Mask Layout HCTS191MS Q1 (2) P1 (1) VCC (16) (15) P0 Q0 (3) (14) CP CE (4) (13) RC U/D (5) (12) TC Q2 (6) (11) PL Q3 (7) (8) GND (9) P3 (10) P2 NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location. The mask series for the HCTS191 is TA14447A. Spec Number 589 518621