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FSPL230R

FSPL230R

  • 厂商:

    INTERSIL(Intersil)

  • 封装:

  • 描述:

    FSPL230R - Radiation Hardened, SEGR Resistant N-Channel Power MOSFETs - Intersil Corporation

  • 数据手册
  • 价格&库存
FSPL230R 数据手册
FSPL230R, FSPL230F TM Data Sheet June 2000 File Number 4865 Radiation Hardened, SEGR Resistant N-Channel Power MOSFETs Intersil Star*Power Rad Hard MOSFETs have been specifically developed for high performance applications in a commercial or military space environment. Star*Power MOSFETs offer the system designer both extremely low rDS(ON) and Gate Charge allowing the development of low loss Power Subsystems. Star*Power FETs combine this electrical capability with total dose radiation hardness up to 300K RADs while maintaining the guaranteed performance for Single Event Effects (SEE) which the Intersil FS families have always featured. TM Features • 9A, 200V, rDS(ON) = 0.170Ω • UIS Rated • Total Dose - Meets Pre-RAD Specifications to 100K RAD (Si) - Rated to 300K RAD (Si) • Single Event - Safe Operating Area Curve for Single Event Effects - SEE Immunity for LET of 36MeV/mg/cm2 with VDS up to 100% of Rated Breakdown and VGS of 10V Off-Bias • Dose Rate - Typically Survives 3E9 RAD (Si)/s at 80% BVDSS - Typically Survives 2E12 if Current Limited to IAS • Photo Current - 3.0nA Per-RAD (Si)/s Typically • Neutron - Maintain Pre-RAD Specifications for 1E13 Neutrons/cm2 - Usable to 1E14 Neutrons/cm2 The Intersil portfolio of Star*Power FETs includes a family of devices in various voltage, current and package styles. The Star*Power family consists of Star*Power and Star*Power Gold products. Star*Power FETS are optimized for total dose and rDS(ON) performance while exhibiting SEE capability at full rated voltage up to an LET of 37. Star*Power Gold FETs have been optimized for SEE and Gate Charge providing SEE performance to 80% of the rated voltage for an LET of 82 with extremely low gate charge characteristics. This MOSFET is an enhancement-mode silicon-gate power field effect transistor of the vertical DMOS (VDMOS) structure. It is specifically designed and processed to be radiation tolerant. The MOSFET is well suited for applications exposed to radiation environments such as switching regulation, switching converters, power distribution, motor drives and relay drivers as well as other power control and conditioning applications. As with conventional MOSFETs these Radiation Hardened MOSFETs offer ease of voltage control, fast switching speeds and ability to parallel switching devices. Reliability screening is available as either TXV or Space equivalent of MIL-S-19500. Formerly available as type TA45210W. Symbol D G S Packaging TO-205AF Ordering Information RAD LEVEL 10K 100K 100K 300K 300K SCREENING LEVEL PART NUMBER/BRAND Engineering samples TXV Space TXV Space FSPL230D1 FSPL230R3 FSPL230R4 FSPL230F3 FSPL230F4 D G S 4-1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000 Star*Power™ is a trademark of Intersil Corporation. FSPL230R, FSPL230F Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified FSPL230R, FSPL230F Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS Drain to Gate Voltage (RGS = 20kΩ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulsed Avalanche Current, L = 100µH (See Test Figure) . . . . . . . . . . . . . . . . . . . . . . . . . IAS Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS Pulsed Source Current (Body Diode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL (Distance >0.063in (1.6mm) from Case, 10s Max) Weight (Typical) 200 200 9 5 29 ±30 25 10 0.20 29 9 29 -55 to 150 300 1.0 (Typical) UNITS V V A A A V W W W/ oC A A A oC oC g CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications PARAMETER TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) TEST CONDITIONS ID = 1mA, VGS = 0V VGS = VDS, ID = 1mA TC = -55oC TC = 25oC TC = 125oC TC = 25oC TC = 125oC TC = 25oC TC = 125oC TC = 25oC TC = 125oC MIN 200 2.0 1.0 VGS = 0V to 12V VDD = 100V, ID = 9A VGS = 0V to 20V VGS = 0V to 2V ID = 9A, VDS = 15V VDS = 25V, VGS = 0V, f = 1MHz TYP 0.145 30 10 8 45 3 6.5 1400 230 8 MAX 5.5 4.5 25 250 100 200 1.58 0.170 0.313 20 40 35 15 33 12 10 5.0 UNITS V V V V µA µA nA nA V Ω Ω ns ns ns ns nC nC nC nC nC V pF pF pF oC/W Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current IDSS IGSS VDS(ON) rDS(ON)12 td(ON) tr td(OFF) tf Qg(12) Qgs Qgd Qg(20) Qg(TH) V(PLATEAU) CISS COSS CRSS RθJC VDS = 160V, VGS = 0V VGS = ±30V VGS = 12V, ID = 9A ID = 5A, VGS = 12V Gate to Source Leakage Current Drain to Source On-State Voltage Drain to Source On Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate Charge Source Gate Charge Drain Gate Charge at 20V Threshold Gate Charge Plateau Voltage Input Capacitance Output Capacitance Reverse Transfer Capacitance Thermal Resistance Junction to Case VDD = 100V, ID = 9A, RL = 11Ω, VGS = 12V, RGS = 7.5Ω 4-2 FSPL230R, FSPL230F Source to Drain Diode Specifications PARAMETER Forward Voltage Reverse Recovery Time Reverse Recovery Charge SYMBOL VSD trr QRR TEST CONDITIONS ISD = 9A ISD = 9A, dISD/dt = 100A/µs MIN TYP 1.2 MAX 1.5 210 UNITS V ns µC Electrical Specifications up to 300K RAD PARAMETER Drain to Source Breakdown Volts Gate to Source Threshold Volts Gate to Body Leakage Zero Gate Leakage Drain to Source On-State Volts Drain to Source On Resistance NOTES: 1. Pulse test, 300µs Max. 2. Absolute value. (Note 3) (Note 3) (Notes 2, 3) (Note 3) (Notes 1, 3) (Notes 1, 3) TC = 25oC, Unless Otherwise Specified MIN MAX 4.5 100 25 1.58 0.170 MIN 200 1.5 4.5 100 50 1.71 0.185 MAX UNITS V V nA µA V Ω TEST CONDITIONS VGS = 0, ID = 1mA VGS = VDS, ID = 1mA VGS = ±30V, VDS = 0V VGS = 0, VDS = 160V VGS = 12V, ID = 9A VGS = 12V, ID = 5A 100K RAD 200 2.0 300K RAD SYMBOL BVDSS VGS(TH) IGSS IDSS VDS(ON) rDS(ON)12 3. Insitu Gamma bias must be sampled for both VGS = 12V, VDS = 0V and VGS = 0V, VDS = 80% BVDSS . Single Event Effects (SEB, SEGR) Note 4 ENVIRONMENT (NOTE 5) TEST Single Event Effects Safe Operating Area SYMBOL SEESOA ION SPECIES Br Br I I Au Au NOTES: 4. Testing conducted at Brookhaven National Labs. 5. Fluence = 1E5 ions/cm2 (typical), T = 25oC. 6. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR). TYPICAL LET (MeV/mg/cm) 37 37 60 60 82 82 TYPICAL RANGE (µ) 36 36 32 32 28 28 APPLIED VGS BIAS (V) -10 -15 -2 -8 0 -5 (NOTE 6) MAXIMUM VDS BIAS (V) 200 160 200 160 160 120 Performance Curves Unless Otherwise Specified LET = 37MeV/mg/cm2, RANGE = 36µ LET = 60MeV/mg/cm2, RANGE = 32µ LET = 82MeV/mg/cm2, RANGE = 28µ 240 200 160 120 80 FLUENCE = 1E5 IONS/cm2 (TYPICAL) TEMP = 25oC VDS 240 LET = 37 BROMINE 200 160 120 80 LET = 82 GOLD 40 VDS (V) 40 0 0 0 -4 -8 VGS (V) -12 -16 -20 0 -5 -10 LET = 60 IODINE -15 VGS -20 -25 -30 FIGURE 1. SINGLE EVENT EFFECTS SAFE OPERATING AREA FIGURE 2. TYPICAL SEE SIGNATURE CURVE 4-3 FSPL230R, FSPL230F Performance Curves 1E-3 LIMITING INDUCTANCE (HENRY) 10 1E-4 ILM = 10A 30A 1E-5 100A 300A 1E-6 2 ID , DRAIN (A) 1000 8 Unless Otherwise Specified (Continued) 6 4 1E-7 10 30 100 DRAIN SUPPLY (V) 300 0 -50 0 50 100 150 TC , CASE TEMPERATURE (oC) FIGURE 3. TYPICAL DRAIN INDUCTANCE REQUIRED TO LIMIT GAMMA DOT CURRENT TO IAS FIGURE 4. MAXIMUM CONTINUOUS DRAIN CURRENT vs TEMPERATURE 100 TC = 25oC 12V ID , DRAIN CURRENT (A) QG 10 100µs QGS QGD 1ms 1 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 0.1 1 10 100 10ms VG 1000 CHARGE VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 5. FORWARD BIAS SAFE OPERATING AREA FIGURE 6. BASIC GATE CHARGE WAVEFORM PULSE DURATION = 250ms, VGS = 12V, ID = 5A ID , DRAIN TO SOURCE CURRENT (A) 2.5 50 VGS = 14V VGS = 12V VGS = 10V VGS = 8V VGS = 6V 2.0 NORMALIZED rDS(ON) 40 1.5 30 1.0 20 0.5 10 VGS = 6V 0.0 -80 0 -40 0 40 80 120 160 0 2 4 6 8 10 VDS , DRAIN TO SOURCE VOLTAGE (V) TJ , JUNCTION TEMPERATURE (oC) FIGURE 7. TYPICAL NORMALIZED rDS(ON) vs JUNCTION TEMPERATURE FIGURE 8. TYPICAL OUTPUT CHARACTERISTICS 4-4 FSPL230R, FSPL230F Performance Curves NORMALIZED THERMAL RESPONSE (ZθJC) 10 Unless Otherwise Specified (Continued) 1 0.5 0.2 0.1 0.05 0.02 0.01 0.01 SINGLE PULSE NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC + TC 0.001 10-5 10-4 10-3 10-2 10-1 t, RECTANGULAR PULSE DURATION (s) 100 PDM t1 0.1 t2 101 FIGURE 9. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE 100 IAS , AVALANCHE CURRENT (A) STARTING TJ = 25oC 10 STARTING TJ = 150oC 1 IF R = 0 tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD) IF R ≠ 0 tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1] 0.1 0.01 0.1 1 10 tAV, TIME IN AVALANCHE (ms) FIGURE 10. UNCLAMPED INDUCTIVE SWITCHING Test Circuits and Waveforms ELECTRONIC SWITCH OPENS WHEN IAS IS REACHED VDS L + CURRENT I TRANSFORMER AS BVDSS tP IAS 50Ω + VDD VDS VDD - VARY tP TO OBTAIN REQUIRED PEAK IAS VGS ≤ 20V DUT 50V-150V 50Ω tAV 0V tP FIGURE 11. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 12. UNCLAMPED ENERGY WAVEFORMS 4-5 FSPL230R, FSPL230F Test Circuits and Waveforms VDD tON td(ON) RL VDS VGS = 12V 10% DUT 0V RGS VGS 10% 50% PULSE WIDTH 50% 90% 10% tr VDS 90% tOFF td(OFF) tf 90% FIGURE 13. RESISTIVE SWITCHING TEST CIRCUIT FIGURE 14. RESISTIVE SWITCHING WAVEFORMS Screening Information Screening is performed in accordance with the latest revision in effect of MIL-S-19500, (Screening Information Table). Delta Tests and Limits (JANTXV Equivalent, JANS Equivalent) TC = 25oC, Unless Otherwise Specified PARAMETER Gate to Source Leakage Current Zero Gate Voltage Drain Current Drain to Source On Resistance Gate Threshold Voltage NOTES: 7. Or 100% of Initial Reading (whichever is greater). 8. Of Initial Reading. SYMBOL IGSS IDSS rDS(ON) VGS(TH) TEST CONDITIONS VGS = ±30V VDS = 80% Rated Value TC = 25oC at Rated ID ID = 1.0mA MAX ±20 (Note 7) ±25 (Note 7) ±20% (Note 8) ±20% (Note 8) UNITS nA µA Ω V Screening Information TEST Unclamped Inductive Switching Thermal Response Gate Stress Pind Pre Burn-In Tests (Note 9) Steady State Gate Bias (Gate Stress) Interim Electrical Tests (Note 9) Steady State Reverse Bias (Drain Stress) PDA Final Electrical Tests (Note 9) NOTE: 9. Test limits are identical pre and post burn-in. JANTXV EQUIVALENT VGS(PEAK) = 20V, L = 0.1mH; Limit = 29A tH = 10ms; VH = 25V; IH = 1A; LIMIT = 60mV VGS = 45V, t = 250µs Optional MIL-S-19500 Group A, Subgroup 2 (All Static Tests at 25oC) MIL-STD-750, Method 1042, Condition B VGS = 80% of Rated Value, TA = 150oC, Time = 48 hours All Delta Parameters Listed in the Delta Tests and Limits Table MIL-STD-750, Method 1042, Condition A VDS = 80% of Rated Value, TA = 150oC, Time = 160 hours 10% MIL-S-19500, Group A, Subgroup 2 JANS EQUIVALENT VGS(PEAK) = 20V, L = 0.1mH; Limit = 29A tH = 10ms; VH = 25V; IH = 1A; LIMIT = 60mV VGS = 45V, t = 250µs Required MIL-S-19500 Group A, Subgroup 2 (All Static Tests at 25oC) MIL-STD-750, Method 1042, Condition B VGS = 80% of Rated Value, TA = 150oC, Time = 48 hours All Delta Parameters Listed in the Delta Tests and Limits Table MIL-STD-750, Method 1042, Condition A VDS = 80% of Rated Value, TA = 150oC, Time = 240 hours 5% MIL-S-19500, Group A, Subgroups 2 and 3 Additional Tests PARAMETER Safe Operating Area Thermal Impedance SYMBOL SOA ∆VSD TEST CONDITIONS VDS = 160V, t = 10ms tH = 500ms; VH =25V; IH = 1A MAX 0.5 230 UNITS A mV 4-6 FSPL230R, FSPL230F Rad Hard Data Packages - Intersil Power Transistors TXV Equivalent 1. RAD HARD TXV EQUIVALENT - STANDARD DATA PACKAGE A. Certificate of Compliance B. Assembly Flow Chart C. Preconditioning - Attributes Data Sheet D. Group A E. Group B F. Group C G. Group D - Attributes Data Sheet - Attributes Data Sheet - Attributes Data Sheet - Attributes Data Sheet Class S - Equivalents 1. RAD HARD “S” EQUIVALENT - STANDARD DATA PACKAGE A. Certificate of Compliance B. Serialization Records C. Assembly Flow Chart D. SEM Photos and Report E. Preconditioning - Attributes Data Sheet - HTRB - Hi Temp Gate Stress Post Reverse Bias Data and Delta Data - HTRB - Hi Temp Drain Stress Post Reverse Bias Delta Data F. Group A G. Group B H. Group C I. Group D - Attributes Data Sheet - Attributes Data Sheet - Attributes Data Sheet - Attributes Data Sheet 2. RAD HARD TXV EQUIVALENT - OPTIONAL DATA PACKAGE A. Certificate of Compliance B. Assembly Flow Chart C. Preconditioning - Attributes Data Sheet - Pre and Post Burn-In Read and Record Data D. Group A E. Group B - Attributes Data Sheet - Attributes Data Sheet - Pre and Post Read and Record Data for Intermittent Operating Life (Subgroup B3) - Bond Strength Data (Subgroup B3) - Pre and Post High Temperature Operating Life Read and Record Data (Subgroup B6) - Attributes Data Sheet - Pre and Post Read and Record Data for Intermittent Operating Life (Subgroup C6) - Bond Strength Data (Subgroup C6) - Attributes Data Sheet - Pre and Post RAD Read and Record Data 2. RAD HARD MAX. “S” EQUIVALENT - OPTIONAL DATA PACKAGE A. Certificate of Compliance B. Serialization Records C. Assembly Flow Chart D. SEM Photos and Report E. Preconditioning - Attributes Data Sheet - HTRB - Hi Temp Gate Stress Post Reverse Bias Data and Delta Data - HTRB - Hi Temp Drain Stress Post Reverse Bias Delta Data - X-Ray and X-Ray Report F. Group A G. Group B H. Group C I. Group D - Attributes Data Sheet - Subgroups A2, A3, A4, A5 and A7 Data - Attributes Data Sheet - Subgroups B1, B3, B4, B5 and B6 Data - Attributes Data Sheet - Subgroups C1, C2, C3 and C6 Data - Attributes Data Sheet - Pre and Post Radiation Data F. Group C G. Group D 4-7 FSPL230R, FSPL230F TO-205AF 3 LEAD JEDEC TO-205AF HERMETIC METAL CAN PACKAGE ØD ØD1 A P INCHES SYMBOL A Øb MIN 0.160 0.016 0.350 0.315 0.095 0.190 0.095 0.010 0.028 0.029 0.500 0.075 MAX 0.180 0.021 0.370 0.335 0.105 0.210 0.105 0.020 0.034 0.045 0.560 - MILLIMETERS MIN 4.07 0.41 8.89 8.01 2.42 4.83 2.42 0.26 0.72 0.74 12.70 1.91 MAX 4.57 0.53 9.39 8.50 2.66 5.33 2.66 0.50 0.86 1.14 14.22 NOTES 2, 3 4 4 4 3 5 h L SEATING PLANE Øb ØD ØD1 e e1 e e1 90o 3 e2 h j k L P k 2 e2 45o j 1 NOTES: 1. These dimensions are within allowable dimensions of Rev. E of JEDEC TO-205AF outline dated 11-82. 2. Lead dimension (without solder). 3. Solder coating may vary along lead length, add typically 0.002 inches (0.05mm) for solder coating. 4. Position of lead to be measured 0.100 inches (2.54mm) from bottom of seating plane. 5. This zone controlled for automatic handling. The variation in actual diameter within this zone shall not exceed 0.010 inches (0.254mm). 6. Lead no. 3 butt welded to stem base. 7. Controlling dimension: Inch. 8. Revision 3 dated 6-94. All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil Ltd. 8F-2, 96, Sec. 1, Chien-kuo North, Taipei, Taiwan 104 Republic of China TEL: 886-2-2515-8508 FAX: 886-2-2515-8369 4-8
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