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H51019

H51019

  • 厂商:

    INTERSIL(Intersil)

  • 封装:

  • 描述:

    H51019 - 10MHz, Low Noise, Operational Amplifiers - Intersil Corporation

  • 数据手册
  • 价格&库存
H51019 数据手册
CT U CT ODU E PR E PR O D ET OL UT OBS UBSTIT -2842 S HA E 25, SIBL Data5Sheet HA-2 P OS ® HA-5101 May 2003 FN2905.5 10MHz, Low Noise, Operational Amplifiers The HA-5101 is a dielectrically isolated operational amplifier featuring low noise, (3.0nV/√Hz at 1kHz). DC characteristics of the HA-5101 assure accurate performance. The 0.5mV offset voltage is externally adjustable and offset voltage drift is just 3µV/oC. An offset current of only 30nA reduces input current errors and an open loop voltage gain of 1 x 106V/V increases loop gain for low distortion amplification. The HA-5101 is ideal for audio applications, especially lowlevel signal amplifiers such as microphone, tape head and phono cartridge preamplifiers. Additionally, it is well suited for low distortion oscillators, low noise function generators and high Q filters. Features • Low Noise . . . . . . . . . . . . . . . . . . . . . 3.0nV/√Hz at 1kHz • Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10MHz • Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V/µs • Low Offset Voltage Drift . . . . . . . . . . . . . . . . . . . . 3µV/oC • High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 x 106V/V • High CMRR/PSRR . . . . . . . . . . . . . . . . . . . . . . . . . 100dB • High Output Drive Capability . . . . . . . . . . . . . . . . . . 30mA Applications • High Quality Audio Preamplifiers • High Q Active Filters • Low Noise Function Generators Pinout HA-5101(SOIC) TOP VIEW • Low Distortion Oscillators • Low Noise Comparators • For Further Design Ideas, See Application Note AN554 8 7 6 5 COMP V+ OUT BAL -IN +IN V- 1 2 3 4 Part Number Information PART NUMBER (BRAND) HA9P5101-9 (H51019) TEMP. RANGE (oC) -40 to 85 PACKAGE 8 Ld SOIC PKG. NO. M8.15 + BAL 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003. All Rights Reserved All other trademarks mentioned are the property of their respective owners. HA-5101 Schematic -IN +IN V+ R24 Q24 R25 R23 Q23 R26 Q26 Q47 R60 R28 Q28 Q25 R35 R37 Q37 R36 Q36 R22 Q35 Q21 R20 Q20 Q19A Q11 Q19B Q41 QL41 Q45 QL1 R34 Q43 QL2 Q14 Q15 Q16 R15 Q2B OUTPUT Q2A Q42 Q17 Q1A Q1B Q29 Q44 Q33 Q46 Q38 Q31 Q32 Q30 Q13 R17A Q10 Q27 Q12 R3A Q3 Q5 Q4 Q9 Q34 R4A Q39 Q6 Q7 C1 C2 R58 Q8 Q18 Q49 Q50 Q48 Q51 R18 V- R19A R11 R10 R12 R27 R3B R4B R19B BAL BAL 2 HA-5101 Absolute Maximum Ratings Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . 40V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VSUPPLY Output Current . . . . . . . . . . . . . . . . . . . Full Short Circuit Protection Thermal Information Thermal Resistance (Typical, Note 2) θJA (oC/W) θJC (oC/W) SOIC Package . . . . . . . . . . . . . . . . . . . 160 N/A Maximum Junction Temperature (Note 1) . . . . . . . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (Lead Tips Only) Operating Conditions Temperature Range HA-5101-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Maximum power dissipation, including output load, must be designed to maintain the maximum junction temperature below 150oC for the plastic packages. 2. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications PARAMETER INPUT CHARACTERISTICS Offset Voltage VSUPPLY = ±15V, RS = 100Ω, RL = 2kΩ, CL = 50pF, Unless Otherwise Specified TEST CONDITIONS TEMP (oC) MIN TYP MAX UNITS 25 Full ±12 0.5 3 100 30 500 - 3 4 200 325 75 125 - mV mV µV/oC nA nA nA nA kΩ V Offset Voltage Drift Bias Current Full 25 Full Offset Current 25 Full Input Resistance Common Mode Range TRANSFER CHARACTERISTICS Large Signal Voltage Gain VOUT = ±10V 25 Full 25 Full 100 80 1 1000 250 100 10 - - kV/V kV/V dB MHz V/V Common Mode Rejection Ratio Small Signal Bandwidth Minimum Stable Gain OUTPUT CHARACTERISTICS Output Voltage Swing VCM = ±10V AV = 1 Full 25 Full RL = 10kΩ R L = 2k Ω VS = ±18V, RL = 600Ω Full Full 25 25 25 25 25 ±12 ±12 ±15 25 95 - ±13 ±13 30 160 110 800 - V V V mA kHz Ω pF Output Current (Note 3) Full Power Bandwidth (Note 4) Output Resistance Maximum Load Capacitance TRANSIENT RESPONSE (Note 5) Rise Time Overshoot 25 25 - 50 20 100 35 ns % 3 HA-5101 Electrical Specifications PARAMETER Slew Rate Settling Time (Note 6) NOISE CHARACTERISTICS (Note 7) Input Noise Voltage f = 10Hz f = 1kHz Input Noise Current f = 10Hz f = 1kHz Broadband Noise Voltage POWER SUPPLY CHARACTERISTICS Supply Current Power Supply Rejection Ratio NOTES: 3. Output current is measured with VOUT = ±15V with VSUPPLY = ±18V. Slew Rate 4. Full power bandwidth is guaranteed by equation: Full power bandwidth = -------------------------- , V PEAK = 10 V. 2 π V P EAK 5. Refer to Test Circuits section of the data sheet. 6. Settling time is measured to 0.01% of final value for a 10V output step, and AV = -1. 7. The limits for these parameters are guaranteed based on lab characterization, and reflect lot-to-lot variation. ∆VS = ±5V Full Full 80 4 100 7 mA dB f = DC To 30kHz 25 25 25 25 5 3.0 4.0 0.6 0.870 7 4.0 9 2.5 nV/√Hz nV/√Hz pA/√Hz pA/√Hz µVRMS 0.01% VSUPPLY = ±15V, RS = 100Ω, RL = 2kΩ, CL = 50pF, Unless Otherwise Specified (Continued) TEST CONDITIONS TEMP (oC) 25 MIN 6 TYP 10 2.6 MAX UNITS V/µs µs Test Circuits and Waveforms 2kΩ 2kΩ IN + 50pF IN + - OUT - OUT 2kΩ 50pF 1kΩ FIGURE 1. LARGE SIGNAL RESPONSE CIRCUIT FIGURE 2. SMALL SIGNAL RESPONSE CIRCUIT 4 HA-5101 Test Circuits and Waveforms (Continued) +5V +100mV 0V 0V -5V -100mV Ch. 1 = 2.5V/Div. Timebase = 1.00µs/Div. FIGURE 3. LARGE SIGNAL TRANSIENT RESPONSE +15V 2N4416 5kΩ (NOTE 9) 5kΩ 2kΩ +15V + VOUT Ch. 1 = 50mV/Div. Timebase = 100ns/Div. FIGURE 4. SMALL SIGNAL TRANSIENT RESPONSE TO OSCILLOSCOPE VIN (NOTE 9) 2kΩ 2kΩ -15V 50pF NOTES: 8. AV = -1. 9. Feedback and summing resistors should be 0.1% matched. 10. Clipping diodes are optional, HP5082-2810 recommended. FIGURE 5. SETTLING TIME CIRCUIT Application Information Operation At ±5V Supply The HA-5101 performs well at VS = ±5V exhibiting typical characteristics as listed below: ICC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IBIAS. . . . . . . . . . . . . . . . . . . . . . . . . . . . AVOL (VO = ±3V) . . . . . . . . . . . . . . . . . . VOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . CMRR (∆VCM = ±2.5V) . . . . . . . . . . . . . PSRR (∆VS = 0.5V) . . . . . . . . . . . . . . . . Unity Gain Bandwidth . . . . . . . . . . . . . . Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . 3.7mA 0.5mV 56nA 106kV/V 3.7V 13mA 90dB 90dB 10MHz 7V/µs The following is the recommended VIO adjust configuration: +15V 7 + 2 1 4 (NOTE) RP RP = 100kΩ -15V 5 (NOTE) 6 3 NOTE: Proper decoupling is always recommended, 0.1µF high quality capacitor should be at or very near the device’s supply pins. Input Protection Offset Adjustment The HA-5101 has built-in back-to-back protection diodes which will limit the differential input voltage to approximately 5 HA-5101 7V. If the 5101 will be used in conditions where that voltage may be exceeded, then current limiting resistors must be used. No more than 25mA should be allowed to flow in the HA-5101’s input. If saturation cannot be avoided the HA-5101 recovers from a 25% overdrive in about 6.5µs (see photos). Comparator Circuit V+ ∆VIN RLIM 2 7 IN ∆VIN RLIM 3 + 4 V- 6 OUT Choose RLIM Such That: ( ∆ V INMAX – 7V ) -------------------------------------------- ≤ 2R LIM 25mA Top: Input Bottom: Output, 5V/Div., 2µs/Div. Output is overdriven negative and recovers in 6µs. Output Saturation When an op amp is overdriven, output devices can saturate and sometimes take a long time to recover. Saturation can be avoided (sometimes) by using circuits such as: V+ R1 R2 + R3 VSOURCE R4 V- Typical Performance Curves 8 INPUT NOISE VOLTAGE (nV/√Hz) INPUT NOISE CURRENT (pA/√Hz) 7 6 5 4 3 2 1 0 10 100 1K FREQUENCY (Hz) 10K 100K CURRENT VOLTAGE 1500 OFFSET VOLTAGE (µV) 1000 500 0 -50 -25 0 25 50 75 100 125 TEMPERATURE (oC) FIGURE 6. NOISE SPECTRUM FIGURE 7. OFFSET VOLTAGE vs TEMPERATURE 6 HA-5101 Typical Performance Curves (Continued) AV = 25000 VS = ±15V (2.25µVP-P RTO) PEAK-TO-PEAK NOISE 0.1Hz TO 10Hz AV = 25000, VS = ±15V (12.89mVP-P RTO) PEAK-TO-PEAK TOTAL NOISE 0.1Hz TO 1MHz 20 INPUT OFFSET CURRENT (nA) 250 200 BIAS CURRENT (nA) 0 150 -20 100 -40 50 -60 -55 -25 0 25 50 75 100 125 TEMPERATURE (oC) 0 -55 -25 0 25 50 75 100 125 TEMPERATURE (oC) FIGURE 8. INPUT OFFSET CURRENT vs TEMPERATURE 1.1 RISE TIME SLEW RATE (NORMALIZED) RISE TIME (NORMALIZED) 1.0 SLEW RATE 0.9 0.9 1.0 VOLTAGE GAIN (dB) 1.1 FIGURE 9. INPUT BIAS CURRENT vs TEMPERATURE 140 120 PHASE SHIFT (DEGREES) 100 80 60 40 20 0 PHASE GAIN 0 45 90 135 180 0.8 0.8 0.7 RL = 2kΩ , CL = 50pF VS = ±15V -40 -20 0 20 40 60 80 100 120 0.7 0.6 -60 0.6 TEMPERATURE (oC) 10 100 1K 10K 100K 1M 10M 100M FREQUENCY (Hz) FIGURE 10. SLEW RATE/RISE TIME vs TEMPERATURE FIGURE 11. OPEN-LOOP GAIN/PHASE vs FREQUENCY 7 HA-5101 Typical Performance Curves 30 (Continued) TA = 25oC, VS = ±15V 5 TA = 25oC MAXIMUM 20 SUPPLY CURRENT (mA) OFFSET CHANGE (µV) 4 MINIMUM 3 TYPICAL 10 0 2 -10 -20 1 -30 0 50 100 150 200 250 300 350 400 450 500 TIME (SECONDS) 0 0 2 4 6 8 10 12 14 SUPPLY VOLTAGE (±V) 16 18 20 FIGURE 12. INPUT OFFSET WARMUP DRIFT vs TIME (NORMALIZED TO ZERO FINAL VALUE) (SIX REPRESENTATIVE UNITS) V/V 10M (dB) (140) OPEN LOOP VOLTAGE GAIN FIGURE 13. SUPPLY CURRENT vs SUPPLY VOLTAGE 60 D 50 OUTPUT CURRENT (mA) B 40 C A VIN A B C D 0 +15mV -15mV +15mV -15mV 20 40 VOUT ±15V ±15V 0V 0V 60 80 TIME (S) TA = 25oC, VS = ±15V 1M (120) 30 100K (100) 20 10 10K (80) 0 5 10 15 18 100 120 140 160 SUPPLY VOLTAGE (±V) FIGURE 14. DC OPEN-LOOP VOLTAGE GAIN vs SUPPLY VOLTAGE FIGURE 15. SHORT CIRCUIT CURRENT vs TIME 8 HA-5101 Typical Performance Curves (Continued) 6 CLOSED LOOP VOLTAGE GAIN (dB) 3 0 -3 -6 -9 -12 125oC PHASE -55oC PHASE 0 -45 -90 -135 Vs = ±15V, AV = 1V/V RL = 2kΩ , CL = 50pF 10K 100K 1M FREQUENCY (Hz) 10M -180 -225 100M 125oC GAIN -55oC GAIN PHASE SHIFT (DEGREES) VERROR 1mV 2.65µS FIGURE 16. FREQUENCY RESPONSE FIGURE 17. SETTLING WAVEFORM 1.5µs/DIV. -40 40 30 GAIN (dB) 20 10 0 -10 -20 TA = 25oC, VS = ±15V RL = 2kΩ , CL = 50pF 10K 100K 1M FREQUENCY (Hz) 10M 100M -120 AV = 1 AV = 10 AV = 100 REJECTION RATIO (dB) -60 TA = 25oC, Vs = ±15V -PSRR/CMRR -80 +PSRR -100 100 1K 10K FREQUENCY (Hz) 100K 1M FIGURE 18. CLOSED-LOOP GAIN vs FREQUENCY FIGURE 19. REJECTION RATIOS vs FREQUENCY 14 VSUPPLY = ±15V -7 -8 +0.2V 100Ω 10kΩ 13 -55oC 125oC -9 + VOUT RLOAD +VOUT (V) -VOUT (V) 12 100Ω -0.2V 11 10kΩ -10 -11 -12 -13 -14 100 200 300 400 RLOAD (Ω) 500 600 -55oC 25oC 125oC VSUPPLY = ±15V + 10 25oC 9 100 200 300 400 RLOAD (Ω) 500 VOUT RLOAD 600 FIGURE 20. +VOUT vs RL FIGURE 21. -VOUT vs RL 9 HA-5101 Die Characteristics SUBSTRATE POTENTIAL (Powered Up): VTRANSISTOR COUNT: 54 PROCESS: Bipolar Dielectric Isolation Metallization Mask Layout HA-5101 BAL NC -IN V+ +IN OUT V- BAL All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10
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