HA-2842_04

UCT PROD ENT OLETE REPLACEM r at OBS ent e DED MMEN al Support C om/tsc RECO .c ic NO DatacSheet w.intersil e hn w t our T contac TERSIL or w IN 1- 888 ® HA-2842 October 2004 FN2766.7 80MHz, High Slew Rate, High Output Current, Video Operational Amplifier The HA-2842 is a wideband, high slew rate, operational amplifier featuring an outstanding combination of speed, bandwidth, and output drive capability. This amplifier’s performance is further enhanced through stable operation down to closed loop gains of +2, the inclusion of offset null controls, and by its excellent video performance. The capabilities of the HA-2842 are ideally suited for high speed cable driver circuits, where low closed loop gains and high output drive are required. With a 6MHz full power bandwidth, this amplifier is well suited for high frequency signal conditioning circuits and video amplifiers. Gain flatness of 0.035dB, combined with differential gain and phase specifications of 0.02%, and 0.03 degrees, respectively, make the HA-2842 ideal for component and composite video applications. A zener/nichrome based reference circuit, coupled with advanced laser trimming techniques, yields a supply current with a low temperature coefficient and low lot-to-lot variability. For example, the average ICC variation from 85oC to -40oC is 81 V mA Ω MHz % Degrees dBc VSUPPLY = ±15V, RL = 1kΩ, CL ≤ 10pF, Unless Otherwise Specified (Continued) HA-2842-5 TEST CONDITIONS TEMP (oC) MIN TYP MAX UNITS 3 HA-2842 Test Circuits and Waveforms IN + - OUT 500Ω NOTES: 11. VS = ±15V. 12. AV = +2. 13. CL ≤ 10pF 500Ω TEST CIRCUIT INPUT INPUT OUTPUT OUTPUT Input = 5V/Div., Output = 5V/Div., 50ns/Div. LARGE SIGNAL RESPONSE SETTLING POINT Input = 100mV/Div., Output = 100mV/Div., 50ns/Div. SMALL SIGNAL RESPONSE NOTES: 14. AV = -2. 15. Feedback and summing resistors must be matched (0.1%). 16. HP5082-2810 clipping diodes recommended. 17. Tektronix P6201 FET probe used at settling point. 18. For 0.01% settling time, heat sinking is suggested to reduce thermal effects and an analog ground plane with supply decoupling is suggested to minimize ground loop errors. 2.5kΩ 5kΩ 1kΩ V+ 500Ω VIN + VOUT V- SETTLING TIME TEST CIRCUIT V+ 5kΩ + BAL OUT V- SUGESTED OFFSET VOLTAGE ADJUSTMENT 4 HA-2842 Application Information The Intersil HA-2842 is a state of the art monolithic device which also approaches the “ALL-IN-ONE” amplifier concept. This device features an outstanding set of AC parameters augmented by excellent output drive capability providing for suitable application in both high speed and high output drive circuits. Primarily intended to be used in balanced 50Ω and 75Ω coaxial cable systems as a driver, the HA-2842 could also be used as a power booster in audio systems as well as a power amp in power supply circuits. This device would also be suitable as a small DC motor driver. Power Dissipation Considerations At high output currents, especially with the 8 lead SOIC package, care must be taken to ensure that the Maximum Junction Temperature (TJ, see “Absolute Maximum Ratings” table) isn’t exceeded. As an example consider the HA-2842 in the SOIC package, with a required output current of 50mA at VOUT = 10V with ±15V supplies. The power dissipation is the quiescent power (450mW = 30V x 15mA) plus the power dissipated in the output stage (POUT = 250mW = 50mA x (15V - 10V)), or a total of 700mW. The thermal resistance (θJA) of the SOIC package is 157oC/W, which increases the junction temperature by 110oC over the ambient temperature (TA). Remaining below TJMAX requires that TA be restricted to ≤ 40oC (150oC - 110oC). Heatsinking would be required for operation at ambient temperatures greater than 40oC. MAX POUT WITHOUT HEATSINK (VS = ±15V) TA 85oC 70oC 25oC 8 LEAD SOIC (θJA = 157oC/W) Heatsink Required 60mW 350mW Prototyping Guidelines For best overall performance in any application, it is recommended that high frequency layout techniques be used. This should include: 1. Mounting the device through a ground plane. 2. Connecting unused pins (NC) to the ground plane. 3. Mounting feedback components on Teflon standoffs and/or locating these components as close to the device as possible. 4. Placing power supply decoupling capacitors from device supply pins to ground. Allowable output power can be increased by decreasing the quiescent dissipation via lower supply voltages. For more information please refer to Application Note AN556, Thermal Safe Operating Areas for High Current Op Amps. Typical Performance Curves 120 100 80 60 GAIN (dB) 40 20 0 TA = 25oC, VSUPPLY = ±15V, RL = 1kΩ , CL < 10pF, Unless Otherwise Specified 100 AVCL = 1000 AVCL = 100 AVCL = 2 PHASE (DEGREE) AVCL = 10 GAIN BANDWIDTH PRODUCT (MHz) OPEN LOOP 90 80 70 60 50 40 30 0 90 OPEN LOOP AVCL AVCL = 1000 = 100 10K 100K 1M AVCL AVCL = 10 = 2 10M 180 10 100 1K 100M 5 6 7 FREQUENCY (Hz) 8 9 10 11 12 SUPPLY VOLTAGE (±V) 13 14 15 FIGURE 1. FREQUENCY RESPONSE FOR VARIOUS GAINS FIGURE 2. GAIN BANDWIDTH PRODUCT vs SUPPLY VOLTAGE 5 HA-2842 Typical Performance Curves 100 GAIN BANDWIDTH PRODUCT (MHz) 90 100 80 90 70 60 50 60 40 50 30 -60 -40 -20 0 20 40 60 80 100 120 140 100 1K 10K 100K 1M 10M TEMPERATURE (oC) CMRR (dB) 80 70 TA = 25oC, VSUPPLY = ±15V, RL = 1kΩ , CL < 10pF, Unless Otherwise Specified (Continued) 110 FREQUENCY (Hz) FIGURE 3. GAIN BANDWIDTH PRODUCT vs TEMPERATURE FIGURE 4. CMRR vs FREQUENCY 50 90 80 PSRR (dB) 70 60 50 40 30 20 10 1K 10K 100K FREQUENCY (Hz) 1M 10M 10 100 1K FREQUENCY (Hz) 10K 40 30 20 10 0 20 16 12 8 4 0 NOISE VOLTAGE NOISE CURRENT 100K FIGURE 5. PSRR vs FREQUENCY FIGURE 6. INPUT NOISE vs FREQUENCY 425 450 400 SLEW RATE (V/µs) SLEW RATE (V/µs) 400 350 375 300 350 250 200 -60 -40 -20 0 20 40 60 80 100 120 140 5 6 7 8 9 10 11 12 13 14 15 TEMPERATURE (oC) SUPPLY VOLTAGE (±V) FIGURE 7. SLEW RATE vs TEMPERATURE FIGURE 8. SLEW RATE vs SUPPLY VOLTAGE 6 NOISE CURRENT (pA/√Hz) NOISE VOLTAGE (nV/√Hz) HA-2842 Typical Performance Curves 8 TA = 25oC, VSUPPLY = ±15V, RL = 1kΩ , CL < 10pF, Unless Otherwise Specified (Continued) 3 16 INPUT OFFSET VOLTAGE (mV) 14 SUPPLY CURRENT (mA) 12 10 8 6 4 5 6 7 8 9 10 11 12 13 14 15 SUPPLY VOLTAGE (±V) INPUT BIAS CURRENT (µA) 7 OFFSET VOLTAGE 2 6 1 125oC 5 BIAS CURRENT 4 0 25oC -55oC -1 3 -60 -40 -20 0 20 40 60 80 100 120 -2 140 TEMPERATURE (oC) FIGURE 9. INPUT OFFSET VOLTAGE AND INPUT BIAS CURRENT vs TEMPERATURE FIGURE 10. SUPPLY CURRENT vs SUPPLY VOLTAGE 15 NEGATIVE OUTPUT SWING (V) ±15V, 1kΩ 12.5 ±15V, 150Ω -2.5 ±8V, 150Ω ±8V, 75Ω POSITIVE OUTPUT SWING (V) -5 ±8V, 1kΩ ±15V, 75Ω ±15V, 150Ω 10 ±15V, 75Ω 7.5 ±8V, 1kΩ 5 ±8V, 150Ω -40 -20 0 20 40 ±8V, 75Ω 60 80 100 120 140 TEMPERATURE (oC) -7.5 -10 -12.5 ±15V, 1kΩ -40 -20 0 20 40 60 80 100 120 140 2.5 -60 -15 -60 TEMPERATURE (oC) FIGURE 11. POSITIVE OUTPUT SWING vs TEMPERATURE 30 OUTPUT VOLTAGE SWING (VP-P) 25 20 VSUPPLY = ±15V FIGURE 12. NEGATIVE OUTPUT SWING vs TEMPERATURE -40 -50 THD (dBc) VO = 10VP-P -60 15 VSUPPLY = ±8V 10 5 0 -70 -80 VO = 1VP-P VO = 0.5VP-P VO = 2VP-P -90 1K 10K 100K 1M 10M 100M 100K 1M FREQUENCY (Hz) 10M FREQUENCY (Hz) FIGURE 13. MAXIMUM UNDISTORTED OUTPUT SWING vs FREQUENCY FIGURE 14. TOTAL HARMONIC DISTORTION vs FREQUENCY 7 HA-2842 Typical Performance Curves -40 THIRD INTERMOD PRODUCT (dBc) TA = 25oC, VSUPPLY = ±15V, RL = 1kΩ , CL < 10pF, Unless Otherwise Specified (Continued) 0.025 VO = 5VP-P VO = 2VP-P VSUPPLY = ±8V -50 -60 DIFFERENTIAL GAIN (%) 0.020 0.015 -70 0.010 VSUPPLY = ±15V 0.005 VSUPPLY = ±10V -80 VO = 1VP-P VO = 0.50VP-P VO = 0.25VP-P 500K 1M FREQUENCY (Hz) 10M -90 0 100 200 300 400 500 600 700 800 900 1000 LOAD RESISTANCE (Ω) FIGURE 15. INTERMODULATION DISTORTION vs FREQUENCY (TWO TONE) FIGURE 16. DIFFERENTIAL GAIN vs LOAD RESISTANCE 0.14 DIFFERENTIAL PHASE (DEGREES) 0.12 0.10 0.08 VSUPPLY = ±10V 0.06 0.04 0.02 0 100 200 300 400 500 600 700 800 900 1000 LOAD RESISTANCE (Ω) VSUPPLY = ±15V VSUPPLY = ±8V GAIN FLATNESS (±dB) 0.04 RL = 75 Ω 0.03 0.02 RL = 150Ω 0.01 RL = 500Ω RL = 1000Ω 0 0 1M 2M 3M 4M 5M 6M 7M 8M 9M 10M FREQUENCY (Hz) FIGURE 17. DIFFERENTIAL PHASE vs LOAD RESISTANCE FIGURE 18. GAIN FLATNESS vs FREQUENCY (AVCL = 2) 85 GAIN BANDWIDTH PRODUCT (MHz) 80 75 70 65 0 100 200 300 400 500 600 700 800 900 1000 LOAD RESISTANCE (Ω) FIGURE 19. GAIN BANDWIDTH PRODUCT vs LOAD RESISTANCE 8 HA-2842 Die Characteristics DIE DIMENSIONS: 77 mils x 81 mils x 19 mils 1960µm x 2060µm x 483µm METALLIZATION: Type: Aluminum, 1% Copper Thickness: 16kÅ ±2kÅ PASSIVATION: Type: Nitride over Silox Silox Thickness: 12kÅ ±2kÅ Nitride thickness: 3.5kÅ ±1kÅ SUBSTRATE POTENTIAL (POWERED UP): VTRANSISTOR COUNT: 58 PROCESS: High Frequency Bipolar Dielectric Isolation Metallization Mask Layout HA-2842 BAL BAL COMP -IN V+ OUT +IN V- 9 HA-2842 Small Outline Plastic Packages (SOIC) N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM M8.15 (JEDEC MS-012-AA ISSUE C) 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A L MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93 MIN 0.0532 0.0040 0.013 0.0075 0.1890 0.1497 MAX 0.0688 0.0098 0.020 0.0098 0.1968 0.1574 A1 B C D E α µ A1 0.10(0.004) C e H h L N 0.050 BSC 0.2284 0.0099 0.016 8 0o 8o 0.2440 0.0196 0.050 1.27 BSC 5.80 0.25 0.40 8 0o 6.20 0.50 1.27 e B 0.25(0.010) M C AM BS NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. α All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10