HA-5142_04

U CT PROD ENT OLETE REPLACEM r at OBS e nt e D ED MMEN al Support C om/tsc RE C O .c ic NO Datachn November 16, 2004 e Sheetww.intersil t o ur T contac TERSIL or w IN 1-888® HA-5142 FN2909.5 Dual, 400kHz, Ultra-Low Power Operational Amplifier The HA-5142 ultra-low power operational amplifier provides AC and DC performance characteristics similar to or better than most general purpose amplifiers while only drawing 1/30 of the supply current of most general purpose amplifiers. In applications which require low power dissipation and good AC electrical characteristics, this device offers the industry’s best speed/power ratio. The HA-5142 provides accurate signal processing by virtue of its low input offset voltage (2mV), low input bias current (45nA), high open loop gain (100kV/V) and low noise (20nV/√Hz), for low power operational amplifiers. These characteristics coupled with a 1.5V/µs slew rate and a 400kHz bandwidth make the HA-5142 ideal for use in low power instrumentation, audio amplifier and active filter designs. The wide range of supply voltages (3V to 30V) also allow this amplifier to be very useful in low voltage battery powered equipment. This device is also tested and guaranteed at both ±15V and single ended +5V supplies. This amplifier is available with industry standard pinouts which allow the HA-5142 to be interchangeable with most other dual operational amplifiers. For military grade product refer to the HA-5142/883 data sheet. Features • Low Supply Current . . . . . . . . . . . . . . . . . . . . . 45µA/Amp • Wide Supply Voltage Range Single . . . . . . . . . 3V to 30V - or Dual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1.5V to ±15V • High Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5V/µs • High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100kV/V • Unity Gain Stable Applications • Portable Instruments • Meter Amplifiers • Telephone Headsets • Microphone Amplifiers • Instrumentation - For Further Design Ideas See Application Note 544 Part Number Information PART NUMBER HA3-5142-5 HA7-5142-2 TEMP. RANGE (oC) 0 to 75 -55 to 125 PACKAGE 8 Ld PDIP 8 Ld CERDIP PKG. DWG. # E8.3 F8.3A Pinout HA-5142 (PDIP, CERDIP) TOP VIEW 8 1 + 7 2 + 6 OUT1 -IN1 +IN1 V- 1 2 V+ OUT2 -IN2 +IN2 - 3 4 - 5 1 FN2912 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 1999, 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners. HA-5142 Schematic Diagram V+ OUTPUT -IN +IN V+ V- 2 HA-5142 Absolute Maximum Ratings Supply Voltage Between V+ and V- Terminals . . . . . . . . . . . . . 35V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Output Current . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protected Thermal Information Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W) 8 Lead PDIP Package . . . . . . . . . . . . . 120 N/A 8 Lead CERDIP Package. . . . . . . . . . . 135 50 Maximum Junction Temperature (Hermetic Packages) . . . . . . .175oC Maximum Junction Temperature (Plastic Packages) . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC Operating Conditions Temperature Range HA-5142-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC HA-5142-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications RS = 100Ω , CL ≤ 10pF, Unless Otherwise Specified -2, -5 V+ = +5V, V- = 0V MIN TYP MAX -2, -5 V+ = +15V, V- = -15V MIN TYP MAX UNITS PARAMETER INPUT CHARACTERISTICS Offset Voltage TEST CONDITIONS TEMP. (oC) Note 11 25 Full 0 to 3 - 2 3 45 0.3 0.6 20 0.25 6 8 100 125 10 20 - ±10 - 2 3 45 0.3 0.6 20 0.25 6 8 100 125 10 20 - mV mV µV/oC nA nA nA nA V MΩ nV/√Hz pA/√Hz Average Offset Voltage Drift Bias Current Note 11 Full 25 Full Offset Current Note 11 25 Full Common Mode Range Differential Input Resistance Input Noise Voltage Input Noise Current TRANSFER CHARACTERISTICS Large Signal Voltage Gain Notes 2, 4 f = 1kHz f = 1kHz Full 25 25 25 25 Full 20 15 77 - 100 105 0.4 - 20 15 77 - 100 105 0.4 - kV/V kV/V dB MHz Common Mode Rejection Ratio Bandwidth OUTPUT CHARACTERISTICS Output Voltage Swing Note 7 Notes 2, 3 Full 25 Notes 2, 10 25 Full 1.0 to 3.8 1.2 to 3.5 - 0.7 to 4.2 0.9 to 4.0 240 - ±10 ±10 - ±13 ±13 24 - V V kHz Full Power Bandwidth Notes 2, 4, 8 25 3 HA-5142 Electrical Specifications RS = 100Ω , CL ≤ 10pF, Unless Otherwise Specified (Continued) -2, -5 V+ = +5V, V- = 0V MIN TYP MAX -2, -5 V+ = +15V, V- = -15V MIN TYP MAX UNITS PARAMETER TRANSIENT RESPONSE (Notes 2, 3) Rise Time Slew Rate Settling Time POWER SUPPLY CHARACTERISTICS Supply Current TEST CONDITIONS TEMP. (oC) 25 Note 6 Note 5 25 25 0.8 - 600 1.5 10 - 0.8 - 600 1.5 10 - ns V/µs µs 25 Full 77 45 105 80 100 - 77 100 105 150 200 - µA/Amp µA/Amp dB Power Supply Rejection Ratio NOTES: 2. RL = 50kΩ. Note 9 Full 3. CL = 50pF. 4. VO = 1.4 to 2.5V for VSUPPLY = +5, 0V; VO = ±10V for VSUPPLY = ±15V. 5. Settling Time is specified to 0.1% of final value for a 3V output step and AV = -1 for VSUPPLY = +5V, 0V. Output step = 10V for VSUPPLY = ±15V. 6. Maximum input slew rate = 10V/µs. 7. VCM = 0 to 3V for VSUPPLY = +5, 0V; VCM = ±10V for VSUPPLY = ±15V. Slew Rate 8. Full Power Bandwidth is guaranteed by equation: FPBW = --------------------------- . 2 π V PEAK 9. ∆VS = +10V for VSUPPLY = +5, 0V; ∆VS = ±5V for VSUPPLY = ±15V. 10. For VSUPPLY = +5, 0V terminate RL at +2.5V. Typical output current is ±3mA. 11. VO = 1.4V for VSUPPLY = +5V, 0V. 4 HA-5142 Test Circuits and Waveforms IN + - OUT 50kΩ 50pF FIGURE 1. SLEW RATE AND TRANSIENT RESPONSE TEST CIRCUIT INPUT INPUT OUTPUT OUTPUT +VSUPPLY = +15V, -VSUPPLY = -15V +VSUPPLY = +15V, -VSUPPLY = -15V Vertical Scale: Input = 5V/Div.; Output = 2V/Div. Horizontal Scale: 2µs/Div. LARGE SIGNAL RESPONSE Vertical Scale: Input = 100mV/Div.; Output = 50mV/Div. Horizontal Scale: 2µs/Div. SMALL SIGNAL RESPONSE INPUT INPUT OUTPUT OUTPUT +VSUPPLY = +5V, -VSUPPLY = 0V +VSUPPLY = +5V, -VSUPPLY = 0V Vertical Scale: Input = 2V/Div.; Output = 1V/Div. Horizontal Scale: 5µs/Div. LARGE SIGNAL RESPONSE Vertical Scale: Input = 100mV/Div.; Output = 50mV/Div. Horizontal Scale: 5µs/Div. SMALL SIGNAL RESPONSE 5 HA-5142 Typical Performance Curves VS = ±2.5V, TA = 25oC, Unless Otherwise Specified 110 100 OPEN LOOP VOLTAGE GAIN (dB) 90 80 70 60 50 40 30 20 10 0 -10 1 10 100 1K 10K 100K 1M FREQUENCY (Hz) PHASE GAIN RL = 50kΩ CL = 50pF 0 20 PHASE (DEGREES) IB (nA) 40 60 80 100 120 140 160 180 50 16 40 12 30 INPUT OFFSET CURRENT 20 4 10 -60 -40 -20 0 20 40 60 80 100 120 8 |IOS| (nA) 60 INPUT BIAS CURRENT 20 70 24 TEMPERATURE (oC) FIGURE 2. OPEN LOOP FREQUENCY RESPONSE FIGURE 3. INPUT OFFSET CURRENT AND BIAS CURRENT vs TEMPERATURE 1.6 100o BANDWIDTH 80o PHASE MARGIN NORMALIZED AC PARAMETERS REFERRED TO VALUE AT ±2.5V RL = 50kΩ UNITY BANDWIDTH (MHz) 0.4 RL = 50kΩ 1.4 1.2 1.0 BANDWIDTH 0.8 0.6 0.4 CL = 50pF SLEW RATE 60o PHASE MARGIN 0.3 40o 0.2 20o 0.1 0o 10 100 LOAD CAPACITANCE (pF) 1000 0 ±1 ±2 ±3 ±4 ±5 ±6 ±7 ±8 ±9 ±10 SUPPLY VOLTAGE (V) FIGURE 4. BANDWIDTH AND PHASE MARGIN vs LOAD CAPACITANCE 14 OUTPUT VOLTAGE SWING (VP-P) 12 10 8 6 VSUPPLY = +5V 4 VSUPPLY = +3V 2 VSUPPLY = +2.5V 0 1K 10K 100K 1M FREQUENCY (Hz) VSUPPLY = +10V RL = 50kΩ FIGURE 5. NORMALIZED AC PARAMETERS vs SUPPLY VOLTAGE RL = 50kΩ CL = 50pF NORMALIZED PARAMETERS REFERRED TO VALUE AT 25oC 1.1 1.0 0.9 BANDWIDTH 0.8 0.7 0.6 -60 -40 -20 -10 0 20 40 60 80 100 120 TEMPERATURE (oC) SLEW RATE VSUPPLY = +15V 1.2 FIGURE 6. OUTPUT VOLTAGE SWING vs FREQUENCY AND SINGLE SUPPLY VOLTAGE FIGURE 7. NORMALIZED AC PARAMETERS vs TEMPERATURE 6 HA-5142 Typical Performance Curves VS = ±2.5V, TA = 25oC, Unless Otherwise Specified 1000 INPUT NOISE VOLTAGE (nV/√Hz) 10,000 INPUT NOISE CURRENT (10-15A/√Hz) 16 OUTPUT VOLTAGE SWING (VP-P) 14 12 10 8 6 4 2 VSUPPLY = +3V 100 1K 10K 100K VSUPPLY = +5V VSUPPLY = +10V VSUPPLY = +20V (Continued) 100 NOISE CURRENT 1000 10 NOISE VOLTAGE 100 1 1 10 100 1K 10K FREQUENCY (Hz) 10 100K FIGURE 8. INPUT NOISE vs FREQUENCY FIGURE 9. MAXIMUM OUTPUT VOLTAGE SWING vs LOAD RESISTANCE AND SINGLE SUPPLY VOLTAGE 80 SUPPLY CURRENT PER AMPLIFIER (µA) 70 60 50 40 30 20 10 -60 VS = +3V VS = +5V VS = +30V 140 120 100 80 60 40 +PSRR, CMRR 20 0 10 -PSRR PSRR, CMRR (dB) VS = +2V 100 1K 10K 100K 1M -40 -20 0 20 40 60 80 100 120 140 FREQUENCY (Hz) TEMPERATURE (oC) FIGURE 10. PSRR AND CMRR vs FREQUENCY FIGURE 11. POWER SUPPLY CURRENT vs TEMPERATURE AND SINGLE SUPPLY VOLTAGE -140 CHANNEL SEPARATION (dB) -120 -100 1kΩ -80 -60 -40 -20 0 100 1kΩ 100kΩ 1kΩ + 1kΩ + 100kΩ - VO1  V O2  CS = 20 LOG  -----------------------   100 V O1 VO2 - 1K 10K 100K FREQUENCY (Hz) FIGURE 12. CHANNEL SEPARATION vs FREQUENCY 7 HA-5142 Die Characteristics DIE DIMENSIONS: 104 mils x 55 mils x 19 mils 2650µm x 1400µm x 483µm METALLIZATION: Type: Al, 1% Cu Thickness: 16kÅ ±2kÅ PASSIVATION: Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos.) Silox Thickness: 12kÅ ±2kÅ Nitride Thickness: 3.5kÅ ±1.5kÅ TRANSISTOR COUNT: 72 SUBSTRATE POTENTIAL (POWERED UP): VPROCESS: Bipolar/JFET Dielectric Isolation Metallization Mask Layout HA-5142 V+IN1 -IN1 OUT1 +IN2 -IN2 OUT2 NC V+ 8 HA-5142 Dual-In-Line Plastic Packages (PDIP) N E1 INDEX AREA 12 3 N/2 E8.3 (JEDEC MS-001-BA ISSUE D) 8 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL -B- MILLIMETERS MIN 0.39 2.93 0.356 1.15 0.204 9.01 0.13 7.62 6.10 MAX 5.33 4.95 0.558 1.77 0.355 10.16 8.25 7.11 NOTES 4 4 8, 10 5 5 6 5 6 7 4 9 Rev. 0 12/93 MIN 0.015 0.115 0.014 0.045 0.008 0.355 0.005 0.300 0.240 MAX 0.210 0.195 0.022 0.070 0.014 0.400 0.325 0.280 -AD BASE PLANE SEATING PLANE D1 B1 B 0.010 (0.25) M D1 A1 A2 L A C L E A A1 A2 B B1 C D D1 E -C- eA eC C e C A BS eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). E1 e eA eB L N 0.100 BSC 0.300 BSC 0.115 8 0.430 0.150 - 2.54 BSC 7.62 BSC 10.92 3.81 8 2.93 9 HA-5142 Ceramic Dual-In-Line Frit Seal Packages (CERDIP) c1 -A-DBASE METAL E b1 M -Bbbb S BASE PLANE SEATING PLANE S1 b2 b ccc M C A-B S AA C A-B S D Q -CA L DS M (b) SECTION A-A (c) LEAD FINISH F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A) 8 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE INCHES SYMBOL A b b1 b2 b3 c MIN 0.014 0.014 0.045 0.023 0.008 0.008 0.220 MAX 0.200 0.026 0.023 0.065 0.045 0.018 0.015 0.405 0.310 MILLIMETERS MIN 0.36 0.36 1.14 0.58 0.20 0.20 5.59 MAX 5.08 0.66 0.58 1.65 1.14 0.46 0.38 10.29 7.87 NOTES 2 3 4 2 3 5 5 6 7 2, 3 8 Rev. 0 4/94 α eA c1 D E e eA eA/2 L Q S1 e DS eA/2 c 0.100 BSC 0.300 BSC 0.150 BSC 0.125 0.015 0.005 90o 8 0.200 0.060 105o 0.015 0.030 0.010 0.0015 2.54 BSC 7.62 BSC 3.81 BSC 3.18 0.38 0.13 90o 8 5.08 1.52 105o 0.38 0.76 0.25 0.038 aaa M C A - B S D S NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer’s identification shall not be used as a pin one identification mark. 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. 4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b2. 5. This dimension allows for off-center lid, meniscus, and glass overrun. 6. Dimension Q shall be measured from the seating plane to the base plane. 7. Measure dimension S1 at all four corners. 8. N is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling dimension: INCH α aaa bbb ccc M N All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10