HA-5147_06

® HA-5147 Data Sheet July 12, 2006 FN2910.9 120MHz, Ultra-Low Noise Precision Operational Amplifiers The HA-5147 operational amplifier features an unparalleled combination of precision DC and wideband high speed characteristics. Utilizing the Intersil D. I. technology and advanced processing techniques, this unique design unites low noise (3.2nV/√Hz) precision instrumentation performance with high speed (35V/µs) wideband capability. This amplifier’s impressive list of features include low VOS (30mV), wide gain bandwidth (120MHz), high open loop gain (1500V/mV), and high CMRR (120dB). Additionally, this flexible device operates over a wide supply range (±5V to ±20V) while consuming only 140mW of power. Using the HA-5147 allows designers to minimize errors while maximizing speed and bandwidth in applications requiring gains greater than ten. This device is ideally suited for low level transducer signal amplifier circuits. Other applications which can utilize the HA-5147’s qualities include instrumentation amplifiers, pulse or RF amplifiers, audio preamplifiers, and signal conditioning circuits. This device can easily be used as a design enhancement by directly replacing the 725, OP25, OP06, OP07, OP27 and OP37 where gains are greater than ten. For military grade product, refer to the HA-5147/883 data sheet. Features • Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V/µs • Wide Gain Bandwidth (AV ≥ 10). . . . . . . . . . . . . . 120MHz • Low Noise . . . . . . . . . . . . . . . . . . . . . 3.2nV/√Hz at 1kHz • Low VOS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30µV • High CMRR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120dB • High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1500V/mV • Pb-Free Available (RoHS Compliant) [ /Title (HA5147) /Subject 120M z, ltraow Noise reciion peraional mpliiers) Autho () Keyords Interil orpoation, emionuctor, ingle, peraional mpliier, ow power op amp, low input bias Applications • High Speed Signal Conditioners • Wide Bandwidth Instrumentation Amplifiers • Low Level Transducer Amplifiers • Fast, Low Level Voltage Comparators • Highest Quality Audio Preamplifiers • Pulse/RF Amplifiers • For Further Design Ideas See Application Note AN553 Pinout HA-5147 (CERDIP) TOP VIEW BAL -IN +IN V1 2 3 4 + 8 7 6 5 BAL V+ OUT NC Ordering Information PART NUMBER HA7-5147-2 HA7-5147R5254 (Note) PART MARKING HA7- 5147-2 HA7- 5147R5254 TEMP. RANGE (oC) -55 to 125 -55 to 125 8 Ld CerDIP 8 Ld CerDIP with Pb-free Hot Solder DIP Lead Finish (SnAgCu) PACKAGE PKG. DWG. # F8.3A F8.3A NOTE: Intersil Pb-free hermetic packaged products employ SnAgCu or Au termination finish, which are RoHS compliant termination finishes and compatible with both SnPb and Pb-free soldering operations. Ceramic dual in-line packaged products (CerDIPs) do contain lead (Pb) in the seal glass and die attach glass materials. However, lead in the glass materials of electronic components are currently exempted per the RoHS directive. Therefore, ceramic dual inline packages with Pb-free termination finish are considered to be RoHS compliant. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003, 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. HA-5147 Absolute Maximum Ratings TA = 25oC Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . 44V Differential Input Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . 0.7V Output Current . . . . . . . . . . . . . . . . . . . Full Short Circuit Protection Thermal Information Thermal Resistance (Typical, Note 2) θJA (oC/W) θJC (oC/W) CERDIP Package. . . . . . . . . . . . . . . . . 135 50 Maximum Junction Temperature (Hermetic Package). . . . . . . .175oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC Operating Conditions Temperature Range HA-5147-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. For differential input voltages greater than 0.7V, the input current must be limited to 25mA to protect the back-to-back input diodes. 2. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications PARAMETER INPUT CHARACTERISTICS Offset Voltage VSUPPLY = ±15V, CL ≤ 50pF, RS ≤ 100Ω TEST CONDITIONS TEMP. (oC) MIN TYP MAX UNITS 25 Full ±10.3 0.8 - 30 70 0.4 15 35 12 30 ±11.5 4 0.09 3.8 3.3 3.2 1.7 1.0 0.4 100 300 1.8 80 150 75 135 0.25 8.0 4.5 3.8 0.6 µV µV µV/oC nA nA nA nA V MΩ µVP-P nV/√Hz nV/√Hz nV/√Hz pA/√Hz pA/√Hz pA/√Hz Average Offset Voltage Drift Bias Current Full 25 Full Offset Current 25 Full Common Mode Range Differential Input Resistance (Note 3) Input Noise Voltage (Note 4) Input Noise Voltage Density (Note 5) 0.1Hz to 10Hz f = 10Hz f = 100Hz f = 1000Hz Input Noise Current Density (Note 5) f = 10Hz f = 100Hz f = 1000Hz TRANSFER CHARACTERISTICS Minimum Stable Gain Large Signal Voltage Gain VOUT = ±10V, RL = 2kΩ Full 25 25 25 25 - 25 25 Full 10 700 300 100 120 - 1500 800 120 140 120 - V/V V/mV V/mV dB MHz MHz Common Mode Rejection Ratio Gain-Bandwidth-Product VCM = ±10V f = 10kHz f = 1MHz Full 25 2 HA-5147 Electrical Specifications PARAMETER OUTPUT CHARACTERISTICS Output Voltage Swing RL = 600Ω RL = 2kΩ Full Power Bandwidth (Note 6) Output Resistance Output Current TRANSIENT RESPONSE (Note 7) Rise Time Slew Rate Settling Time Overshoot POWER SUPPLY CHARACTERISTICS Supply Current 25 Full Power Supply Rejection Ratio NOTES: 3. This parameter value is based upon design calculations. 4. Refer to Typical Performance section of the data sheet. 5. The limits for this parameter are guaranteed based on lab characterization, and reflect lot-to-lot variation. Slew Rate 6. Full power bandwidth guaranteed based on slew rate measurement using: FPBW = ---------------------------- . 2 π V PEAK 7. Refer to Test Circuits section of the data sheet. 8. Settling time is specified to 0.1% of final value for a 10V output step and AV = -10. VS = ±4V to ±18V Full 3.5 16 4.0 51 mA mA µV/V VOUT = ±3V Note 8 25 25 25 25 28 22 35 400 20 50 40 ns V/µs ns % Open Loop 25 Full 25 25 25 ±10.0 ±11.4 445 16.5 ±11.5 ±13.5 500 70 25 V V kHz Ω mA VSUPPLY = ±15V, CL ≤ 50pF, RS ≤ 100Ω (Continued) TEST CONDITIONS TEMP. (oC) MIN TYP MAX UNITS 3 HA-5147 Test Circuits and Waveforms IN + 1.8kΩ 50pF 200Ω OUT FIGURE 1. LARGE AND SMALL SIGNAL RESPONSE TEST CIRCUIT IN IN OUT OUT Vertical Scale: Input = 0.5V/Div. Output = 5V/Div. Horizontal Scale: 500ns/Div. LARGE SIGNAL RESPONSE Vertical Scale: Input = 10mV/Div. Output = 100mV/Div. Horizontal Scale: 100ns/Div. SMALL SIGNAL RESPONSE +15V 2N4416 500Ω 5kΩ 2kΩ +15V + AUT VIN VOUT 50pF -15V 2kΩ TO OSCILLOSCOPE NOTES: 9. AV = -10. 10. Feedback and summing resistors should be 0.1% matched. 11. Clipping diodes are optional. HP5082-2810 recommended. 200Ω FIGURE 2. SETTLING TIME TEST CIRCUIT 4 Schematic Diagram 7 1 BALANCE 8 R25 C7 R15 QP37 D1 QN45 QP55 QP32 R1 R16 QP35 R2 QP43 R20 R21 QP44 R17 QP38 5 D8 QP56 R1A QN51 R14 QN3 R9 QN2 R24 QN12 QN2A D22 Z58 D59 QN24 D23 R4 QN42A QN25 QN39 D60 R5 R6 R8 R10 QN48 QN49 QN42 QN5 QN50 QN6 QP 27 C6 D53 QP36 QP36A D41 QP40 QN1A QN1 QN18 QN7 R19 C3 QP30 D34 QP21 D9 D54 QP26 R18 QN47 R2A QN19 C5 QN46 QN13 QN14 C1 R7 QN4 R3 QP17 QP16 QP26 QN15 QN29 D33 R12 QN20 C4 QN52 HA-5147 6 OUTPUT R13 QN57 C2 R22 R23 R11 QN10 QN11 4 S S 3 2 HA-5147 Application Information V+ RP 10K 8 1 7 2 + 3 4 5 6 NOTE: Tested Offset Adjustment Range is |VOS +1mV| minimum referred to output. Typical range is ±4mV with RP = 10kΩ . FIGURE 3. SUGGESTED OFFSET VOLTAGE ADJUSTMENT CS R1 + - R1 R3 R2 + R3 - R2 CS NOTE: Low resistances are preferred for low noise applications as a 1kΩ resistor has 4nV/√Hz of thermal noise. Total resistances of greater than 10kΩ on either input can reduce stability. In most high resistance applications, a few picofarads of capacitance across the feedback resistor will improve stability. FIGURE 4. SUGGESTED STABILITY CIRCUITS Typical Performance Curves 30 20 OFFSET VOLTAGE (µV) 10 0 -10 -20 -30 -40 -50 -60 -60 -40 -20 0 20 40 60 TA = 25oC, VSUPPLY = ±15V, Unless Otherwise Specified 12 VS = ±15V, TA = 25oC 6 10 VOLTAGE NOISE (nV/√Hz) 5 CURRENT NOISE (pA/√Hz) 8 6 NOISE VOLTAGE 4 3 4 2 2 0 NOISE CURRENT 1 10 100 1K 10K FREQUENCY (Hz) 100K 1 0 1M 80 100 120 TEMPERATURE (oC) FIGURE 5. TYPICAL OFFSET VOLTAGE vs TEMPERATURE FIGURE 6. NOISE CHARACTERISTICS 6 HA-5147 Typical Performance Curves 0.14 INPUT NOISE VOLTAGE (µVP-P) 0.12 0.1 120 CMRR (dB) 0.08 0.06 0.04 0.02 0 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (±V) 0 10 TA = 25oC 160 TA = 25oC, VSUPPLY = ±15V, Unless Otherwise Specified (Continued) VS = ±15V TA = 25oC 80 40 100 1K 10K 100K 1M 10M FREQUENCY (Hz) FIGURE 7. NOISE vs SUPPLY VOLTAGE 0 20 40 PSRR (dB) 60 80 100 120 GAIN (dB) 120 100 80 60 40 20 0 FIGURE 8. CMRR vs FREQUENCY TA = 25oC GAIN 0 PHASE 90 180 100 1K 10K 100K 1M 100 1K 10K 100K 1M 10M 100M 10 FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 9. PSRR vs FREQUENCY FIGURE 10. OPEN LOOP GAIN AND PHASE vs FREQUENCY 17 16 AVOL (100kV/V) AND VOUT (V) 15 14 13 12 11 10 9 8 7 6 5 4 0 SLEW RATE NORMALIZED TO 1 AT 30oC TA = 25oC AVOL 1.05 1.04 1.03 1.02 1.01 1.0 0.99 0.98 0.97 0.96 RL = 2K, CL = 50pF, TA = 25oC VOUT 2 4 6 8 10 0.95 -60 -40 -20 0 20 40 60 80 100 120 LOAD RESISTANCE (kΩ) TEMPERATURE (oC) FIGURE 11. AVOL AND VOUT vs LOAD RESISTANCE FIGURE 12. NORMALIZED SLEW RATE vs TEMPERATURE 7 PHASE (DEGREES) HA-5147 Typical Performance Curves TA = 25oC, VSUPPLY = ±15V, Unless Otherwise Specified (Continued) 28 2.82 2.80 SUPPLY CURRENT (mA) 2.78 2.76 2.74 2.72 2.70 2.68 -55 25 TEMPERATURE (oC) 125 VO = 0V, VS = ±15V 24 OUTPUT VOLTAGE (VP-P) 20 16 12 8 4 0 0.4 0.8 1.2 1.6 2 RL = 2K, CL = 50pF, TA = 25oC FREQUENCY (MHz) FIGURE 13. SUPPLY CURRENT vs TEMPERATURE FIGURE 14. VOUT MAX (UNDISTORTED SINEWAVE OUTPUT) vs FREQUENCY 40 GAIN (dB) 30 20 10 0 RL = 2K, CL = 50pF, TA = 25oC GAIN 0 PHASE 90 PHASE (DEGREES) 180 1K 10K 100K 1M 10M 100M FREQUENCY (Hz) ACL = 25,000V/V; EN = 0.08µVP-P RTI Horizontal Scale = 1s/Div.; Vertical Scale = 0.002µV/Div. FIGURE 16. PEAK-TO-PEAK NOISE VOLTAGE (0.1Hz TO 10Hz) FIGURE 15. CLOSED LOOP GAIN AND PHASE vs FREQUENCY 8 HA-5147 Die Characteristics DIE DIMENSIONS: 104 mils x 65 mils x 19 mils 2650µm x 1650µm x 483µm METALLIZATION: Type: Al, 1% Cu Thickness: 16kÅ ±2kÅ SUBSTRATE POTENTIAL (POWERED UP): VPASSIVATION: Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos.) Silox Thickness: 12kÅ ±2kÅ Nitride Thickness: 3.5kÅ ±1.5kÅ TRANSISTOR COUNT: 63 PROCESS: Bipolar Dielectric Isolation Metallization Mask Layout HA-5147 BAL BAL -IN +IN V+ OUT V- NC 9 HA-5147 Ceramic Dual-In-Line Frit Seal Packages (CERDIP) c1 -A-DBASE METAL b1 M -Bbbb S BASE PLANE SEATING PLANE S1 b2 b ccc M C A-B S AA C A-B S D Q -CA L DS M (b) SECTION A-A (c) LEAD FINISH F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A) 8 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE INCHES SYMBOL A b b1 b2 b3 c c1 MIN 0.014 0.014 0.045 0.023 0.008 0.008 0.220 MAX 0.200 0.026 0.023 0.065 0.045 0.018 0.015 0.405 0.310 MILLIMETERS MIN 0.36 0.36 1.14 0.58 0.20 0.20 5.59 MAX 5.08 0.66 0.58 1.65 1.14 0.46 0.38 10.29 7.87 2.54 BSC 7.62 BSC 3.81 BSC 3.18 0.38 0.13 90o 8 5.08 1.52 105o 0.38 0.76 0.25 0.038 NOTES 2 3 4 2 3 5 5 6 7 2, 3 8 Rev. 0 4/94 E α eA D E e eA eA/2 L Q S1 e DS eA/2 c 0.100 BSC 0.300 BSC 0.150 BSC 0.125 0.015 0.005 90o 8 0.200 0.060 105o 0.015 0.030 0.010 0.0015 aaa M C A - B S D S NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer’s identification shall not be used as a pin one identification mark. 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. 4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b2. 5. This dimension allows for off-center lid, meniscus, and glass overrun. 6. Dimension Q shall be measured from the seating plane to the base plane. 7. Measure dimension S1 at all four corners. 8. N is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling dimension: INCH α aaa bbb ccc M N All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10