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HA3-2406-5

HA3-2406-5

  • 厂商:

    INTERSIL(Intersil)

  • 封装:

  • 描述:

    HA3-2406-5 - 30MHz, Digitally Selectable Four Channel Operational Amplifier - Intersil Corporation

  • 数据手册
  • 价格&库存
HA3-2406-5 数据手册
UCT P RO D CT OLETE UTE PRODU OBS BSTIT LE SU -2405 Data Sheet HA POSSIB ® HA-2406 August 2002 FN2892.5 30MHz, Digitally Selectable Four Channel Operational Amplifier The HA-2406 is a monolithic device consisting of four op amp input stages that can be individually connected to one output stage by decoding two TTL lines into four channel select signals. In addition to allowing each channel to be addressed, an enable control disconnects all input stages from the output stage when asserted low. Each input-output combination of the HA-2406 is designed to be a 20V/µs, 30MHz gain-bandwidth amplifier that is stable at a gain of ten. By connecting one external 15pF capacitor all amplifiers are compensated for unity gain operation. The compensation lead may also be used to limit the output swing to TTL levels through suitable clamping diodes and divider networks (see Application Note AN514). Dielectric isolation and short-circuit protected output stages contribute to the quality and durability of the HA-2406. When used as a simple amplifier, its dynamic performance is very good and when its added versatility is considered, the HA-2406 is unmatched in the analog world. It can replace a number of individual components in analog signal conditioning circuits for digital signal processing systems. Its advantages include saving board space and reducing power supply requirements. During Disable Mode VOUT goes to V-. For high output impedance during Disable, see HA2444. For further design ideas, see Application Note AN514. Features • TTL Compatible Inputs • Single Capacitor Compensation • Low Crosstalk. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -110dB • High Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V/µs • Low Offset Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 5nA • Offset Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7mV • High Gain-Bandwidth . . . . . . . . . . . . . . . . . . . . . . . 30MHz • High Input Impedance . . . . . . . . . . . . . . . . . . . . . . . 30MΩ • Compensation Pin for Unity Gain Capability Applications • Digital Control Of - Analog Signal Multiplexing - Op Amp Gains - Oscillator Frequencies - Filter Characteristics - Comparator Levels Part Number Information PART NO. HA3-2406-5 TEMP RANGE (oC) 0 to 75 PACKAGE 16 Ld PDIP PKG. NO. E16.3 Pinout HA-2406 (PDIP) TOP VIEW) +IN3 -IN3 +IN4 -IN4 -IN1 +IN1 -IN2 +IN2 1 2 3 4 5 6 7 8 + 3 3 16 D0 15 D1 14 ENABLE 4 13 GND 12 1 + 11 10 2 + OUTPUT AMP 9 COMP V+ TRUTH TABLE D1 L L H H X D0 L H L H X EN H H H H L SELECTED CHANNEL 1 2 3 4 None, VOUT goes to V- + DECODE CONTROL - - OUTPUT V- 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002. All Rights Reserved HA-2406 Absolute Maximum Ratings TA = 25oC Supply Voltage Between V+ and V- Terminals. . . . . . . . . . . . . . 45V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY Output Current . . . . . . . . . . . Short Circuit Protected (ISC < ±33mA) Thermal Information Thermal Resistance (Typical, Note 1) θJA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 Maximum Junction Temperature (Plastic Package). . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC Operating Conditions Temperature Range HA-2406-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications Test Conditions: VSUPPLY = ±15.0V, Unless Otherwise Specified. Digital Inputs: VIL = +0.5V, VIH = +2.4V. Limits apply to each of the four channels, when addressed. TEST CONDITIONS HA-2406-5 TEMP (oC) MIN TYP MAX UNITS PARAMETER INPUT CHARACTERISTICS Offset Voltage 25 Full ±9.0 7 50 5 30 - 10 12 250 500 50 100 - mV mV nA nA nA nA MΩ V Bias Current (Note 7) 25 Full Offset Current (Note 7) 25 Full Input Resistance (Note 7) Common Mode Range TRANSFER CHARACTERISTICS Large Signal Voltage Gain RL = 2kΩ VOUT = 20VP-P VCM = ±5V 25 Full 25 Full Full 25 25 40 20 74 15 3 10 150 80 30 6 - - kV/V kV/V dB MHz MHz V/V Common Mode Rejection Ratio Gain Bandwidth Product (Notes 2, 9) Gain Bandwidth Product (Notes 3, 9) Minimum Stable Gain OUTPUT CHARACTERISTICS Output Voltage Swing Output Current Full Power Bandwidth (Notes 2, 8, 9) Full Power Bandwidth (Notes 3, 8) TRANSIENT RESPONSE (Note 10) Rise Time (Note 3) Overshoot (Note 3) Slew Rate (Notes 2, 9) Slew Rate (Note 3) Settling Time (Notes 3, 4) CCOMP = 0 RL = 2kΩ VOUT = ±10V VOUT = 20VP-P VOUT = 20VP-P Full 25 25 25 ±10.0 10 240 64 ±12.0 15 320 95 - V mA kHz kHz VOUT = 200mVPEAK VOUT = 200mVPEAK VOUT = 10VP-P VOUT = 10VP-P VOUT = 10VP-P 25 25 25 25 25 15 4 - 30 25 20 6 2.0 100 40 3.5 ns % V/µs Vµs µs 2 HA-2406 Electrical Specifications Test Conditions: VSUPPLY = ±15.0V, Unless Otherwise Specified. Digital Inputs: VIL = +0.5V, VIH = +2.4V. Limits apply to each of the four channels, when addressed. (Continued) TEST CONDITIONS HA-2406-5 TEMP (oC) MIN TYP MAX UNITS PARAMETER CHANNEL SELECT CHARACTERISTICS Digital Input Current Digital Input Current Output Delay (Notes 5, 9) Crosstalk (Note 6) POWER SUPPLY CHARACTERISTICS Supply Current Power Supply Rejection Ratio NOTES: 2. AV = +10, CCOMP = 0, RL = 2kΩ, CL = 50pF. 3. AV = +1, CCOMP = 15pF, RL = 2kΩ, CL = 50pF. 4. To 0.1% of final value. VIN = 0V VIN = +5.0V Full Full 25 25 -74 1 15 150 -110 1.5 300 - mA nA ns dB 25 VS = ±10V to ±20V Full 74 4.8 90 7.0 - mA dB 5. To 10% of final value; output then slews at normal rate to final value. 6. Unselected input to output; VIN = ±10V. 7. Unselected channels have approximately the same input parameters. Slew Rate 8. Full power Bandwidth based on slew rate measurement using: FPBW = ---------------------------- . 2 π V PEAK 9. Sample tested. 10. See Figure 13 for test circuit. Schematic Diagram IN+ Q1 R2 2.4K Q3 R3 1.8K Q2 R4 22.9K Q6 ENABLE Q7 Q8 Q9 R6 2.0K R5 8.0K Q4 Q27 R14 10K Q20 Q21 Q19 VD Q22 Q24 Q23 Q39 Q40 Q13 Q38 Q41 Q88 Q89 Q26 Q32 Q25 Q33 Q5 INCOMP Q82 Q81 Q84 Q80 Q83 Q102 Q34 Q35 Q103 Q36 R35 0.75K Q87 Q86 R30 1.2K C1 9.0pF V+ R33 4K Q37 Q92 Q93 Q94 Q95 Q97 Q100 Q85 R34 1.6K Q98 Q99 Q101 R32 34 OUT R31 36.5 Q96 +VCC R1 1.6K VE R12 1.6K Q28 Q29 R13 0.8K Q30 R18 2.0K Q31 Q79 R35 1.6K GND Q18 R7 5.6K Q10 Q11 Q12 VC Q90 Q91 Q14 Q17 VB Q15 R8 4K Q16 R10 10K VA R11 10K R16 10K R17 1.6K Q42 R19 1.6K TO ADDITIONAL INPUT STAGES R29 0.4K R9 1.5K R15 10K D0 D1 -VEE Diagram Includes: One Input Stage, Decode Control, Bias Network, and Output Stage 3 HA-2406 Typical Applications IN 1 2 3 4 5 6 7 8 + 3 D0 16 DECODE/ CONTROL D1 15 ENABLE 14 1 DIGITAL CONTROL 2 3 4 DIGITAL GROUND IN 5 6 7 8 D0 + 3 DECODE/ CONTROL D1 16 15 S H + 4 + 4 ENABLE 14 GND 13 GND 13 +1 COMP +2 + OUTPUT AMP 12 +1 COMP +2 OUTPUT AMP 12 DIGITAL GROUND C +15V OUT -15V 15pF + 15V OUT -15V V+ 11 10 V- 9 V+ 11 10 V- 9 2K 1K 500 500 I1 Sample Charging Rate = ---- V ⁄ s C 12 Hold Drift Rate = ----- V ⁄ s C Q Switch Pedestal Error = --- V C I1 ≈ 150 x 10-6A I2 ≈ 200 x 10-9A at 25oC ≈ 600 x 10-9A at -55oC Q ≈ 2 x 10-12C FIGURE 1. HA-2406 AMPLIFIER, NONINVERTING PROGRAMMABLE GAIN ≈ 100 x 10-9A at 125oC FIGURE 2. HA-2406 SAMPLE AND HOLD For more examples, see Intersil Application Note AN514. 4 HA-2406 Typical Performance Curves BIAS CURRENT OFFSET CURRENT (nA) 40 NORMALIZED VALUE REFERRED TO 25oC 60 1.0 BANDWIDTH 10 5 OFFSET CURRENT SLEW RATE 0.9 0 0 25 50 75 0 TEMPERATURE (oC) 25 50 TEMPERATURE (oC) 75 FIGURE 3. INPUT BIAS CURRENT AND OFFSET CURRENT vs TEMPERATURE FIGURE 4. NORMALIZED AC PARAMETERS vs TEMPERATURE 4.50 OPEN LOOP VOLTAGE GAIN (dB) 120 100 80 60 40 20 0 -20 10 CCOMP = 0pF CCOMP = 15pF 100 1K GAIN 10M PHASE CROSSTALK REJECTION, AV = +1 0 30 PHASE (DEGREES) 60 90 120 150 180 210 100M SUPPLY CURRENT (mA) 4.25 VS = ±20V VS = ±15V VS = ±10V 4.0 0 0 25 50 TEMPERATURE (oC) 75 10K 100K 1M FREQUENCY (Hz) FIGURE 5. POWER SUPPLY CURRENT vs TEMPERATURE FIGURE 6. OPEN LOOP FREQUENCY AND PHASE RESPONSE 100 80 60 40 20 0 -20 10 100pF 300pF 1000pF 0pF 15pF 30pF NORMALIZED VALUE REFERRED TO ±15V 120 OPEN LOOP VOLTAGE GAIN (dB) 1.2 1.1 1.0 BANDWIDTH 0.9 SLEW RATE 100 1K 10K 100K 1M FREQUENCY (Hz) 10M 100M 0.8 ±10 ±15 SUPPLY VOLTAGE (V) ±20 FIGURE 7. FREQUENCY RESPONSE vs CCOMP FIGURE 8. NORMALIZED AC PARAMETERS vs SUPPLY VOLTAGE 5 HA-2406 Typical Performance Curves (Continued) VS = ±20V 105 GAIN (dB) VS = ±10V OUTPUT SWING (VP-P) VS = ±15V 20 10 CCOMP = 0pF CCOMP = 15pF 100 1.0 0 25 50 TEMPERATURE (oC) 75 0.1 10K 100K 1M FREQUENCY (Hz) 10M FIGURE 9. OPEN LOOP VOLTAGE GAIN vs TEMPERATURE FIGURE 10. OUTPUT VOLTAGE SWING vs FREQUENCY 100 1000 INPUT NOISE VOLTAGE (nV/√Hz) 10 INPUT NOISE CURRENT (pA/√Hz) INPUT NOISE (µV) 10 10K SOURCE RESISTANCE 0K SOURCE RESISTANCE 100 INPUT NOISE VOLTAGE 1 1.0 THERMAL NOISE OF 10K RESISTOR 0.1 100Hz 1kHz 10kHz 100kHz 1MHz 10 INPUT NOISE CURRENT 0.1 1 1 10 UPPER 3dB FREQUENCY (LOWER 3dB FREQUENCY-10Hz) BROADBAND NOISE CHARACTERISTICS 100 1K FREQUENCY (Hz) 10K 0.01 100K FIGURE 11. EQUIVALENT INPUT NOISE vs BANDWIDTH FIGURE 12. INPUT NOISE vs FREQUENCY COMP IN 45Ω + 5Ω AV = 10 -15.0V 1800Ω 50pF 200Ω AV = 1 SELECTED CHANNEL 15pF +15.0V OUT FIGURE 13. SLEW RATE AND TRANSIENT RESPONSE 6 HA-2406 FN2892.5 Dual-In-Line Plastic Packages (PDIP) N INDEX AREA E1 12 3 N/2 E16.3 (JEDEC MS-001-BB ISSUE D) 16 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL MIN 0.015 0.115 0.014 0.045 0.008 0.735 0.005 0.300 0.240 MAX 0.210 0.195 0.022 0.070 0.014 0.775 0.325 0.280 A E MILLIMETERS MIN 0.39 2.93 0.356 1.15 0.204 18.66 0.13 7.62 6.10 MAX 5.33 4.95 0.558 1.77 0.355 19.68 8.25 7.11 NOTES 4 4 8, 10 5 5 6 5 6 7 4 9 Rev. 0 12/93 -B-AD BASE PLANE SEATING PLANE D1 B1 B 0.010 (0.25) M D1 -CA2 L A1 A C L A1 A2 B B1 C D D1 E E1 e eA eB L N eA eC C e C A BS eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). 0.100 BSC 0.300 BSC 0.115 16 0.430 0.150 - 2.54 BSC 7.62 BSC 10.92 3.81 16 2.93 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 7
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