HFA1109_04

® HFA1109 450MHz, Low Power, Current Feedback Video Operational Amplifier Description The HFA1109 is a high speed, low power, current feedback amplifier built with Intersil’s proprietary complementary bipolar UHF-1 process. This amplifier features a unique combination of power and performance specifically tailored for video applications. The HFA1109 is a standard pinout op amp. It is a higher performance, drop-in replacement (no feedback resistor change required) for the CLC409. If a comparably performing op amp with an output disable function (useful for video multiplexing) is required, please refer to the HFA1149 data sheet. August 2004 Features • Wide - 3dB Bandwidth (AV = +2). . . . . . . . . . . . 450MHz • Gain Flatness (To 250MHz) . . . . . . . . . . . . . . . . . . 0.8dB • Very Fast Slew Rate (AV = +2) . . . . . . . . . . . . 1100V/µs • High Input Impedance . . . . . . . . . . . . . . . . . . . . . .1.7MΩ • Differential Gain/Phase . . . . . . . . . 0.02%/0.02 Degrees • Low Supply Current . . . . . . . . . . . . . . . . . . . . . . . 10mA Applications • Professional Video Processing • Video Switchers and Routers • Medical Imaging • PC Multimedia Systems • Video Distribution Amplifiers • Flash Converter Drivers • Radar/IF Processing Ordering Information PART NUMBER (BRAND) HFA1109IB (H1109) TEMP. RANGE (oC) -40 to 85 PACKAGE 8 Ld SOIC PKG. NO. M8.15 HFA11XXEVAL (Note) DIP Evaluation Board for High Speed Op Amps NOTE: Requires a SOIC-to-DIP adapter. See “Evaluation Board” section inside. Pinout HFA1109 (SOIC) TOP VIEW NC -IN +IN V- 1 2 3 4 + 8 7 6 5 NC V+ OUT NC CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 1999, 2004. All Rights Reserved 1 All other trademarks mentioned are the property of their respective owners. FN4019.4 HFA1109 Absolute Maximum Ratings Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V Output Current (Note 2) . . . . . . . . . . . . . . . . Short Circuit Protected 30mA Continuous 60mA ≤ 50% Duty Cycle ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . 1400V Charged Device Model (Per EOS/ESD DS5.3, 4/14/93) . . 2000V Machine Model (Per EIAJ ED-4701Method C-111) . . . . . . . . 50V Thermal Information Thermal Resistance (Typical, Note 1) θJA (oC/W) SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . 300oC (Lead Tips Only) Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. θJA is measured with the component mounted on an evaluation PC board in free air. 2. Output is short circuit protected to ground. Brief short circuits to ground will not degrade reliability, however continuous (100% duty cycle) output current must not exceed 30mA for maximum reliability. Electrical Specifications VSUPPLY = ±5V, AV = +2, RF = 250Ω , RL = 100Ω , Unless Otherwise Specified (NOTE 3) TEST LEVEL TEMP. (oC) PARAMETER INPUT CHARACTERISTICS Input Offset Voltage TEST CONDITIONS MIN TYP MAX UNITS A A 25 Full Full 25 Full 25 Full 25 Full Full 25 Full 25 Full Full 25 Full 25 Full 25, 85 -40 25 25 Full 47 45 50 47 0.8 0.5 ±2 1 2 10 50 48 53 51 4 5 30 0.5 0.5 2 3 40 3 3 1.6 1.6 1.7 1.4 60 1.6 ±2.5 5 8 10 15 1 3 10 15 6 8 5 8 - mV mV µV/oC dB dB dB dB µA µA nA/oC µA/V µA/V µA µA nA/oC µA/V µA/V µA/V µA/V MΩ MΩ Ω pF V Average Input Offset Voltage Drift Input Offset Voltage Common-Mode Rejection Ratio Input Offset Voltage Power Supply Rejection Ratio Non-Inverting Input Bias Current ∆VCM = ±2V ∆VCM = ±2V ∆VPS = ±1.25V ∆VPS = ±1.25V B A A A A A A Non-Inverting Input Bias Current Drift Non-Inverting Input Bias Current Power Supply Sensitivity Inverting Input Bias Current ∆VPS = ±1.25V ∆VPS = ±1.25V B A A A A Inverting Input Bias Current Drift Inverting Input Bias Current Common-Mode Sensitivity Inverting Input Bias Current Power Supply Sensitivity Non-Inverting Input Resistance ∆VCM = ±2V ∆VCM = ±2V ∆VPS = ±1.25V ∆VPS = ±1.25V ∆VCM = ±2V ∆VCM = ±2V Inverting Input Resistance Input Capacitance Input Voltage Common Mode Range (Implied by VIO CMRR, +RIN, and -IBIAS CMS tests) B A A A A A A B B A 2 HFA1109 Electrical Specifications VSUPPLY = ±5V, AV = +2, RF = 250Ω , RL = 100Ω , Unless Otherwise Specified (Continued) (NOTE 3) TEST LEVEL B B B TEMP. (oC) 25 25 25 PARAMETER Input Noise Voltage Density (Note 4) Non-Inverting Input Noise Current Density (Note 4) Inverting Input Noise Current Density (Note 4) TRANSFER CHARACTERISTICS Open Loop Transimpedance Gain (Note 4) Minimum Stable Gain AC CHARACTERISTICS -3dB Bandwidth (VOUT = 0.2VP-P, Note 4) TEST CONDITIONS f = 100kHz f = 100kHz f = 100kHz MIN - TYP 4 2.4 40 MAX - UNITS nV/√Hz pA/√Hz pA/√Hz B B 25 Full - 500 1 - kΩ V/V AV = -1, RF = 200Ω AV = +1, +RS = 550Ω (PDIP), +RS = 700Ω (SOIC) A V = +2 B B B B B B 25 Full 25 Full 25 Full 25 Full 25 Full 25 Full 25 Full 25 Full 25 Full 25 Full 300 290 280 260 390 350 -1.0 -1.1 -1.6 -1.7 -1.9 -2.2 ±0.3 ±0.4 ±0.8 ±0.9 ±1.3 ±1.4 375 360 330 320 450 410 0 0 -0.45 -0.45 -0.75 -0.75 -0.85 -0.85 ±0.1 ±0.1 ±0.35 ±0.35 ±0.6 ±0.6 0.2 0.5 - MHz MHz MHz MHz MHz MHz dB dB dB dB dB dB dB dB dB dB dB dB dB dB Gain Peaking AV = +2, VOUT = 0.2VP-P B B Gain Flatness (AV = +2, VOUT = 0.2VP-P, Note 4) To 125MHz B B To 200MHz B B To 250MHz B B Gain Flatness (AV = +1, +RS = 550Ω (PDIP), +RS = 700Ω (SOIC), VOUT = 0.2VP-P, Note 4) To 125MHz B B To 200MHz B B To 250MHz B B OUTPUT CHARACTERISTICS Output Voltage Swing, Unloaded (Note 4) Output Current (Note 4) Output Short Circuit Current Closed Loop Output Resistance (Note 4) Second Harmonic Distortion (VOUT = 2VP-P, Note 4) Third Harmonic Distortion (VOUT = 2VP-P, Note 4) Reverse Isolation (S12) AV = -1, RL = ∞ AV = -1, RL = 75Ω A A A A AV = -1 DC, AV = +1 20MHz 60MHz 20MHz 60MHz 30MHz B B B B B B B 25 Full 25, 85 -40 25 25 25 25 25 25 25 ±3 ±2.8 ±33 ±30 ±3.2 ±3 ±36 ±33 120 0.05 -55 -57 -68 -60 -65 V V mA mA mA Ω dBc dBc dBc dBc dB 3 HFA1109 Electrical Specifications VSUPPLY = ±5V, AV = +2, RF = 250Ω , RL = 100Ω , Unless Otherwise Specified (Continued) (NOTE 3) TEST LEVEL TEMP. (oC) PARAMETER TRANSIENT CHARACTERISTICS Rise and Fall Times TEST CONDITIONS MIN TYP MAX UNITS VOUT = 0.5VP-P B B 25 Full 25 Full 25 Full 25 Full 25 Full 25 25 25 25 2300 2200 475 430 940 800 - 1.1 1.1 0 0.5 2600 2500 550 500 1100 950 19 23 36 5 1.3 1.4 2 5 - ns ns % % V/µs V/µs V/µs V/µs V/µs V/µs ns ns ns ns Overshoot VOUT = 0.5VP-P AV = -1, RF = 200Ω VOUT = 5VP-P AV = +1, VOUT = 4VP-P, +RS = 550Ω (PDIP), +RS = 700Ω (SOIC) AV = +2, VOUT = 5VP-P B B Slew Rate B B B B B B Settling Time (VOUT = +2V to 0V step, Note 4) To 0.1% To 0.05% To 0.01% B B B B Overdrive Recovery Time VIDEO CHARACTERISTICS Differential Gain (f = 3.58MHz) VIN = ±2V RL = 150Ω RL = 75Ω RL = 150Ω RL = 75Ω B B B B 25 Full 25 Full 25 Full 25 Full - 0.02 0.03 0.04 0.05 0.02 0.02 0.05 0.06 0.06 0.09 0.09 0.12 0.06 0.06 0.09 0.13 % % % % Degrees Degrees Degrees Degrees Differential Phase (f = 3.58MHz) B B B B POWER SUPPLY CHARACTERISTICS Power Supply Range Power Supply Current (Note 4) C A A NOTES: 3. Test Level: A. Production Tested; B. Typical or Guaranteed Limit Based on Characterization; C. Design Typical for Information Only. 4. See Typical Performance Curves for more information. 25 25 Full ±4.5 9.6 10 ±5.5 10 11 V mA mA 4 HFA1109 Application Information Optimum Feedback Resistor Although a current feedback amplifier’s bandwidth dependency on closed loop gain isn’t as severe as that of a voltage feedback amplifier, there can be an appreciable decrease in bandwidth at higher gains. This decrease may be minimized by taking advantage of the current feedback amplifier’s unique relationship between bandwidth and RF . All current feedback amplifiers require a feedback resistor, even for unity gain applications, and RF , in conjunction with the internal compensation capacitor, sets the dominant pole of the frequency response. Thus, the amplifier’s bandwidth is inversely proportional to RF . The HFA1109 design is optimized for a 250Ω RF at a gain of +2. Decreasing RF decreases stability, resulting in excessive peaking and overshoot (Note: Capacitive feedback will cause the same problems due to the feedback impedance decrease at higher frequencies). At higher gains the amplifier is more stable, so RF can be decreased in a trade-off of stability for bandwidth. TABLE 1. OPTIMUM FEEDBACK RESISTOR GAIN (ACL) -1 +1 +2 +5 +10 RF (Ω) 200 250 (+RS = 550Ω) PDIP 250 (+RS = 700Ω) SOIC 250 100 90 BANDWIDTH (MHz) 400 350 450 160 70 IN 10µF 0.1µF -5V GND 50Ω 510Ω 1 2 3 4 ble oscillations. In most cases, the oscillation can be avoided by placing a resistor (RS) in series with the output prior to the capacitance. RS and CL form a low pass network at the output, thus limiting system bandwidth well below the amplifier bandwidth. By decreasing RS as CL increases, the maximum bandwidth is obtained without sacrificing stability. In spite of this, bandwidth still decreases as the load capacitance increases. Evaluation Board The performance of the HFA1105 may be evaluated using the HFA11XX Evaluation Board and a SOIC to DIP adaptor like the Aries Electronics Part Number 14-350000-10. The layout and schematic of the board are shown in Figure 1. Please contact your local sales office for information. When evaluating this amplifier, the two 510Ω gain setting resistors on the evaluation board should be changed to 250Ω. . BOARD SCHEMATIC 510Ω VH 8 7 6 5 GND 0.1µF 50Ω OUT VL 10µF +5V Table 1 lists recommended RF values, and the expected bandwidth, for various closed loop gains. For a gain of +1, a resistor (+RS) in series with +IN is required to reduce gain peaking and increase stability TOP LAYOUT PC Board Layout The frequency response of this amplifier depends greatly on the care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended, while a solid ground plane is a must! Attention should be given to decoupling the power supplies. A large value (10µF) tantalum in parallel with a small value (0.1µF) chip capacitor works well in most cases. Terminated microstrip signal lines are recommended at the input and output of the device. Capacitance directly on the output must be minimized, or isolated as discussed in the next section. Care must also be taken to minimize the capacitance to ground seen by the amplifier’s inverting input (-IN). The larger this capacitance, the worse the gain peaking, resulting in pulse overshoot and possible instability. Thus it is recommended that the ground plane be removed under traces connected to -IN, and connections to -IN should be kept as short as possible. 1 +IN VH OUT V+ VL VGND BOTTOM LAYOUT Driving Capacitive Loads Capacitive loads, such as an A/D input, or an improperly terminated transmission line will degrade the amplifier’s phase margin resulting in frequency response peaking and possiFIGURE 1. EVALUATION BOARD SCHEMATIC AND LAYOUT 5 HFA1109 Typical Performance Curves VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω, Unless Otherwise Specified 200 A V = +2 150 OUTPUT VOLTAGE (mV) 100 50 0 -50 -100 -150 -200 TIME (5ns/DIV.) 2.0 A V = +2 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 TIME (5ns/DIV.) FIGURE 2. SMALL SIGNAL PULSE RESPONSE OUTPUT VOLTAGE (V) FIGURE 3. LARGE SIGNAL PULSE RESPONSE 200 A V = +1 150 OUTPUT VOLTAGE (mV) OUTPUT VOLTAGE (V) 100 50 0 -50 -100 -150 -200 TIME (5ns/DIV.) 2.0 A V = +1 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 TIME (5ns/DIV.) FIGURE 4. SMALL SIGNAL PULSE RESPONSE FIGURE 5. LARGE SIGNAL PULSE RESPONSE 200 AV = -1 150 OUTPUT VOLTAGE (mV) OUTPUT VOLTAGE (V) 100 50 0 -50 -100 -150 -200 TIME (5ns/DIV.) 2.0 AV = -1 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 TIME (5ns/DIV.) FIGURE 6. SMALL SIGNAL PULSE RESPONSE FIGURE 7. LARGE SIGNAL PULSE RESPONSE 6 HFA1109 Typical Performance Curves 200 150 OUTPUT VOLTAGE (mV) 100 50 AV = +10 0 -50 A V = +5 -100 -150 -200 TIME (5ns/DIV.) OUTPUT VOLTAGE (V) AV = + 5 VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω, Unless Otherwise Specified (Continued) 2.0 1.5 1.0 0.5 AV = +10 0 AV = +10 -0.5 -1.0 -1.5 -2.0 TIME (5ns/DIV.) AV = + 5 AV = +10 A V = +5 FIGURE 8. SMALL SIGNAL PULSE RESPONSE FIGURE 9. LARGE SIGNAL PULSE RESPONSE GAIN (dB) 3 0 -3 VOUT = 200mVP-P GAIN AV = +1 NORMALIZED PHASE (DEGREES) NORMALIZED GAIN (dB) 3 0 -3 VOUT = 200mVP-P GAIN AV = +10 AV = + 5 AV = + 2 AV = + 1 PHASE A V = -1 0 90 180 A V = -1 0.3 1 10 FREQUENCY (MHz) 100 270 700 0 90 AV = +10 AV = +5 180 270 700 AV = + 1 0.3 1 10 FREQUENCY (MHz) 100 FIGURE 10. FREQUENCY RESPONSE FIGURE 11. FREQUENCY RESPONSE 0.1 0 NORMALIZED GAIN (dB) -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 1 VOUT = 200mVP-P AV = +1 116 106 ( VIO ) ) I 96 86 76 66 56 46 36 26 0.01 0.1 0.3 1 3 6 10 30 100 0 45 90 135 180 500 PHASE (DEGREES) AV = +2 10 FREQUENCY (MHz) 100 500 AZOL (dB, 20 LOG FREQUENCY (MHz) FIGURE 12. GAIN FLATNESS FIGURE 13. OPEN LOOP TRANSIMPEDANCE 7 PHASE (DEGREES) PHASE AV = +2 HFA1109 Typical Performance Curves VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω, Unless Otherwise Specified (Continued) -30 AV = +1 -40 DISTORTION (dBc) 100MHz -30 100MHz -40 DISTORTION (dBc) -50 50MHz -60 20MHz -70 10MHz -50 -60 -70 20MHz -80 -90 -100 10MHz -20 AV = +1 50MHz -80 -90 -6 -3 0 3 6 OUTPUT POWER (dBm) 9 12 -6 -3 0 3 6 OUTPUT POWER (dBm) 9 12 FIGURE 14. 2nd HARMONIC DISTORTION vs POUT -30 AV = +2 -40 100MHz DISTORTION (dBc) -50 50MHz -60 10MHz -70 20MHz -80 -80 DISTORTION (dBc) -50 -40 FIGURE 15. 3rd HARMONIC DISTORTION vs POUT -30 AV = +2 100MHz 50MHz -60 20MHz -70 10MHz -90 -6 -3 0 3 6 9 OUTPUT POWER (dBm) 12 15 -90 -6 -3 0 3 6 9 OUTPUT POWER (dBm) 12 15 FIGURE 16. 2nd HARMONIC DISTORTION vs POUT -20 VOUT = 2VP-P -30 DISTORTION (dBc) -30 -20 FIGURE 17. 3rd HARMONIC DISTORTION vs POUT VOUT = 2VP-P AV = +1 -40 DISTORTION (dBc) -40 AV = -1 AV = +2 -50 AV = +2, -1 -60 AV = +1 -50 -60 -70 -70 AV = +1 -80 0 10 20 30 40 50 60 70 FREQUENCY (MHz) 80 90 100 -80 0 10 20 30 40 50 60 70 FREQUENCY (MHz) 80 90 100 FIGURE 18. 2nd HARMONIC DISTORTION vs FREQUENCY FIGURE 19. 3rd HARMONIC DISTORTION vs FREQUENCY 8 HFA1109 Typical Performance Curves VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω, Unless Otherwise Specified (Continued) 3.6 AV = + 2 OUTPUT RESISTANCE (Ω) 1K OUTPUT VOLTAGE (V) 100 10 1 0.1 0.01 3.4 3.2 3.0 +VOUT (RL = 50Ω) 2.8 2.6 2.4 2.2 2.0 1.8 0.3 1 10 FREQUENCY (MHz) 100 1000 1.6 -75 -50 -25 0 25 50 TEMPERATURE (°C) 75 100 125 |-VOUT| (RL = 50Ω) |-VOUT| (RL = 100Ω) +VOUT (RL = 50Ω) +VOUT (RL = 100Ω) |-VOUT| (RL = 100Ω) FIGURE 20. CLOSED LOOP OUTPUT RESISTANCE FIGURE 21. OUTPUT VOLTAGE vs TEMPERATURE 14 13.5 13 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 12.5 12 11.5 11 10.5 10 9.5 9 8.5 4 4.5 5 5.5 6.5 6 SUPPLY VOLTAGE (±V) 7 7.5 8 17 16 15 14 13 12 11 10 9 8 7 6 5 4 -75 -50 -25 0 50 25 TEMPERATURE (°C) 75 100 125 VS = ±4V VS = ±5V VS = ±8V FIGURE 22. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 23. SUPPLY CURRENT vs TEMPERATURE 100 100 0.1 A V = +2 VOUT = 2V NOISE VOLTAGE (nV/√Hz) SETTLING ERROR (%) INIINI+ 10 ENI 10 NOISE CURRENT (pA/√Hz) 0.05 0.025 0 -0.025 -0.05 INI+ -0.1 1 0.1 1 10 FREQUENCY (kHz) 1 100 10 20 30 40 50 60 70 80 90 100 TIME (ns) FIGURE 24. INPUT NOISE CHARACTERISTICS FIGURE 25. SETTLING RESPONSE 9 HFA1109 Die Characteristics DIE DIMENSIONS: 59 mils x 80 mils x 19 mils 1500µm x 2020µm x 483µm METALLIZATION: Type: Metal 1: AICu(2%)/TiW Thickness: Metal 1: 8kÅ ±0.4kÅ Type: Metal 2: AICu(2%) Thickness: Metal 2: 16kÅ ±0.8kÅ GLASSIVATION: Type: Nitride Thickness: 4kÅ ±0.5kÅ TRANSISTOR COUNT: 130 SUBSTRATE POTENTIAL (Powered Up): Floating (Recommend Connection to V-) Metallization Mask Layout HFA1109 NC NC NC NC V+ -IN OUT NC NC +IN V- NC NC 10 HFA1109 Small Outline Plastic Packages (SOIC) N INDEX AREA E -B1 2 3 H 0.25(0.010) M BM M8.15 (JEDEC MS-012-AA ISSUE C) 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 L SEATING PLANE -AD -CA h x 45o MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93 MIN 0.0532 0.0040 0.013 0.0075 0.1890 0.1497 MAX 0.0688 0.0098 0.020 0.0098 0.1968 0.1574 B C D E α µ A1 0.10(0.004) C e H h L N 0.050 BSC 0.2284 0.0099 0.016 8 0o 8o 0.2440 0.0196 0.050 1.27 BSC 5.80 0.25 0.40 8 0o 6.20 0.50 1.27 e B 0.25(0.010) M C AM BS α NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 11