HFA1245IP

HFA1245 Data Sheet February 1999 File Number 3682.4 Dual, 420MHz, Low Power, Video, Current Feedback Operational Amplifier with Disable The HFA1245 is a dual, high speed, low power current feedback amplifier built with Intersil’s proprietary complementary bipolar UHF-1 process. The HFA1245 features individual TTL/CMOS compatible disable controls. When pulled low they disable the corresponding amplifier, which reduces the supply current and forces the output into a high impedance state. This feature allows easy implementation of simple, low power video switching and routing systems. Component and composite video systems also benefit from this op amp’s excellent gain flatness, and good differential gain and phase specifications. Multiplexed A/D applications will also find the HFA1245 useful as the A/D driver/multiplexer. The HFA1245 is a low power, high performance upgrade for the popular Intersil HA5022. For a dual amplifier without disable, in a standard 8 lead pinout, please see the HFA1205 data sheet. Features • Low Supply Current . . . . . . . . . . . . . . . . . 5.8mA/Op Amp • High Input Impedance . . . . . . . . . . . . . . . . . . . . . . . 2MΩ • Low Crosstalk (5MHz) . . . . . . . . . . . . . . . . . . . . . . -83dB • High Off Isolation (5MHz) . . . . . . . . . . . . . . . . . . . . . 65dB • Wide -3dB Bandwidth (AV = +2) . . . . . . . . . . . . . . 420MHz • Very Fast Slew Rate . . . . . . . . . . . . . . . . . . . . . . 1200V/µs • Gain Flatness (to 50MHz) . . . . . . . . . . . . . . . . . . ±0.11dB • Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.02% • Differential Phase . . . . . . . . . . . . . . . . . . . . 0.03 Degrees • Individual Output Enable/Disable • Output Enable/Disable Time. . . . . . . . . . . . . . 150ns/30ns • Pin Compatible Upgrade to HA5022 Applications • Flash A/D Drivers • High Resolution Monitors • Video Multiplexers Ordering Information PART NUMBER HFA1245IP HA5022EVAL TEMP. RANGE (oC) -40 to 85 PACKAGE 14 Ld PDIP PKG. NO. E14.3 • Video Switching and Routing • Professional Video Processing • Video Digitizing Boards/Systems • Multimedia Systems • RGB Preamps High Speed Op Amp DIP Evaluation Board Pinout HFA1245 (PDIP) TOP VIEW • Medical Imaging • Hand Held and Miniaturized RF Equipment • Battery Powered Communications • High Speed Oscilloscopes and Analyzers -IN1 1 +IN1 2 DISABLE 1 3 V- 4 DISABLE 2 5 +IN2 6 -IN2 7 14 OUT1 13 NC 12 GND 11 V+ 10 NC + + - 9 NC 8 OUT2 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 HFA1245 Absolute Maximum Ratings Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11V DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V Output Current (Note 2) . . . . . . . . . . . . . . . . Short Circuit Protected 30mA Continuous 60mA ≤ 50% Duty Cycle ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . . 600V Thermal Information Thermal Resistance (Typical, Note 1) θJA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. θJA is measured with the component mounted on an evaluation PC board in free air. 2. Output is short circuit protected to ground. Brief short circuits to ground will not degrade reliability, however continuous (100% duty cycle) output current must not exceed 30mA for maximum reliability. Electrical Specifications VSUPPLY = ±5V, AV = +1, RF = 560Ω, RS = 650Ω, RL = 100Ω, Unless Otherwise Specified (NOTE 3) TEST LEVEL TEMP. (oC) PARAMETER INPUT CHARACTERISTICS Input Offset Voltage TEST CONDITIONS MIN TYP MAX UNITS A A 25 Full Full 25 85 -40 25 85 -40 25 Full Full 25 85 -40 25 85 -40 25 Full Full 25 85 -40 25 85 -40 45 43 43 48 46 46 0.8 0.5 0.5 - 2 3 1 48 46 46 52 50 50 6 10 5 0.5 0.8 0.8 2 1.3 1.3 2 5 60 3 4 4 2 4 4 5 8 10 15 25 60 1 3 3 7.5 15 200 6 8 8 5 8 8 mV mV µV/ oC dB dB dB dB dB dB µA µA nA/ oC µA/V µA/V µA/V MΩ MΩ MΩ µA µA nA/ oC µA/V µA/V µA/V µA/V µA/V µA/V Average Input Offset Voltage Drift Input Offset Voltage Common-Mode Rejection Ratio ∆VCM = ±1.8V ∆VCM = ±1.8V ∆VCM = ±1.2V Input Offset Voltage Power Supply Rejection Ratio ∆VPS = ±1.8V ∆VPS = ±1.8V ∆VPS = ±1.2V Non-Inverting Input Bias Current B A A A A A A A A Non-Inverting Input Bias Current Drift Non-Inverting Input Bias Current Power Supply Sensitivity ∆VPS = ±1.8V ∆VPS = ±1.8V ∆VPS = ±1.2V Non-Inverting Input Resistance ∆VCM = ±1.8V ∆VCM = ±1.8V ∆VCM = ±1.2V Inverting Input Bias Current B A A A A A A A A Inverting Input Bias Current Drift Inverting Input Bias Current Common-Mode Sensitivity ∆VCM = ±1.8V ∆VCM = ±1.8V ∆VCM = ±1.2V Inverting Input Bias Current Power Supply Sensitivity ∆VPS = ±1.8V ∆VPS = ±1.8V ∆VPS = ±1.2V B A A A A A A 2 HFA1245 Electrical Specifications VSUPPLY = ±5V, AV = +1, RF = 560Ω, RS = 650Ω, RL = 100Ω, Unless Otherwise Specified (Continued) (NOTE 3) TEST LEVEL B B A A f = 100kHz f = 100kHz f = 100kHz B B B TEMP. (oC) 25 25 25, 85 -40 25 25 25 PARAMETER Inverting Input Resistance Input Capacitance Input Voltage Common Mode Range (Implied by VIO CMRR, +RIN, and -IBIAS CMS Tests) Input Noise Voltage Density (Note 6) Non-Inverting Input Noise Current Density (Note 6) Inverting Input Noise Current Density (Note 6) TRANSFER CHARACTERISTICS Open Loop Transimpedance Gain (Note 6) AC CHARACTERISTICS -3dB Bandwidth (VOUT = 0.2VP-P, Note 6) TEST CONDITIONS MIN ±1.8 ±1.2 - TYP 56 2.0 ±2.4 ±1.7 3.5 2.5 30 MAX - UNITS Ω pF V V nV/√Hz pA/√Hz pA/√Hz B AV = +1, +RS = 650Ω AV = +2, RF = 750Ω AV = -1, RF = 475Ω 25 - 500 - kΩ MHz MHz MHz MHz MHz MHz dB dB V/V dB dB B B B B B B B B A 25 25 25 25 25 25 25 25 Full 25 25 ±3 ±2.8 50 28 - 260 420 280 150 115 160 ±0.04 ±0.11 1 -83 -77 ±3.4 ±3 60 42 90 0.07 -50 -45 -57 -50 23 60 - Full Power Bandwidth (VOUT = 5VP-P at AV = +2/-1, 4VP-P at AV = +1, Note 6) Gain Flatness (AV = +2, RF = 750Ω , VOUT = 0.2VP-P , Note 6) Minimum Stable Gain Crosstalk (AV = +2, RF = 750Ω, VOUT = 1VP-P, Notes 4, 6) AV = +1, +RS = 650Ω AV = +2, RF = 750Ω AV = -1, RF = 475Ω To 25MHz To 50MHz 5MHz 10MHz AV = -1, RL = 100Ω AV = -1, RL = 50Ω B B OUTPUT CHARACTERISTICS AV = +2, RF = 750Ω, Unless Otherwise Specified Output Voltage Swing (Note 6) A A Output Current (Note 6) A A Output Short Circuit Current Closed Loop Output Resistance (Note 6) Second Harmonic Distortion (VOUT = 2VP-P) Third Harmonic Distortion (VOUT = 2VP-P) 3rd Order Intercept (Note 6) Reverse Isolation (S12 , Note 6) Rise and Fall Times (VOUT = 0.5VP-P) Overshoot (VOUT = 0.5VP-P, VIN tRISE = 1ns, Note 5) Slew Rate (VOUT = 4VP-P, AV = +1, RF = 560Ω, +RS = 650Ω) DC 10MHz 20MHz 10MHz 20MHz 20MHz 65MHz B B B B B B B B 25 Full 25, 85 -40 25 25 25 25 25 25 25 25 V V mA mA mA Ω dBc dBc dBc dBc dBm dB TRANSIENT CHARACTERISTICS AV = +2, RF = 750Ω, Unless Otherwise Specified Rise Time Fall Time +OS -OS +SR -SR (Note 7) B B B B B B 25 25 25 25 25 25 0.9 1.5 5 10 1150 800 ns ns % % V/µs V/µs 3 HFA1245 Electrical Specifications VSUPPLY = ±5V, AV = +1, RF = 560Ω, RS = 650Ω, RL = 100Ω, Unless Otherwise Specified (Continued) (NOTE 3) TEST LEVEL B B B B B B B B TEMP. (oC) 25 25 25 25 25 25 25 25 PARAMETER Slew Rate (VOUT = 5VP-P, AV = +2) Slew Rate (VOUT = 5VP-P, AV = -1, RF = 475Ω) Settling Time (VOUT = +2V to 0V step, Note 6) TEST CONDITIONS +SR -SR (Note 7) +SR -SR (Note 7) To 0.1% To 0.05% To 0.02% VIN = ±2V RL = 150Ω RL = 75Ω RL = 150Ω RL = 75Ω MIN - TYP 1400 800 2200 1200 15 20 40 8.5 MAX - UNITS V/µs V/µs V/µs V/µs ns ns ns ns Overdrive Recovery Time VIDEO CHARACTERISTICS AV = +2, RF = 750Ω, Unless Otherwise Specified Differential Gain (f = 3.58MHz) B B B B 25 25 25 25 0.02 0.03 0.03 0.05 % % Degrees Degrees Differential Phase (f = 3.58MHz) DISABLE CHARACTERISTICS Disabled Supply Current DISABLE Input Logic Voltage VDISABLE = 0V Low High A A A A DISABLE Input Logic Low Current DISABLE Input Logic High Current Output Disable Time (Note 6) Output Enable Time (Note 6) Disabled Output Capacitance Disabled Output Leakage (Note 6) All Hostile Off Isolation (VDISABLE = 0V, VIN = 1VP-P, AV = +2, Note 6) POWER SUPPLY CHARACTERISTICS Power Supply Range Power Supply Current (Note 6) C A A NOTES: 3. Test Level: A. Production Tested; B. Typical or Guaranteed Limit Based on Characterization; C. Design Typical for Information Only. 4. The typical use for these amplifiers is in multiplexed configurations, where one amplifier (hostile channel) is enabled, and the passive channel is disabled. The crosstalk data specified is tested in this manner, with the input signal applied to the hostile channel, while monitoring the output of the passive channel. Crosstalk performance with both the hostile and passive channels enabled is typically -63dB at 5MHz, and -58dB at 10MHz. 5. Undershoot dominates for output signal swings below GND (e.g., 0.5VP-P), yielding a higher overshoot limit compared to the VOUT = 0V to 0.5V condition. See the “Application Information“ section for details. 6. See Typical Performance Curves for more information. 7. Slew rates are asymmetrical if the output swings below GND (e.g., a bipolar signal). Positive unipolar output signals have symmetric positive and negative slew rates comparable to the +SR specification. See the “Application Information” section, and the pulse response graphs for details. 25 25 Full ±4.5 5.6 5.4 5.8 5.9 ±5.5 6.1 6.3 V mA/Op Amp mA/Op Amp VDISABLE = 0V VDISABLE = 5V VOUT = ±1V, VDISABLE = 2.4V to 0.4V VOUT = ±1V, VDISABLE = 0.4V to 2.4V VDISABLE = 0V VDISABLE = 0V, VIN = +2V, VOUT = ±3V At 5MHz At 10MHz A A B B B A B B Full Full 25, 85 -40 Full Full 25 25 25 Full 25 25 2.0 2.4 3 100 1 30 150 4.5 2 65 60 4 0.8 200 15 10 mA/Op Amp V V V µA µA ns ns pF µA dB dB 4 HFA1245 Application Information Relevant Application Notes The following Application Notes pertain to the HFA1245: NORMALIZED GAIN (dB) AV = +2 • AN9787-An Intuitive Approach to Understanding Current Feedback Amplifiers • AN9420-Current Feedback Amplifier Theory and Applications • AN9663-Converting from Voltage Feedback to Current Feedback Amplifiers These publications may be obtained from Intersil’s web site (http://www.intersil.com) or via our AnswerFAX system. 2 1 0 -1 -2 -3 -4 1 10 100 1000 RF = 650Ω, CH1 RF = 806Ω, CH2 Optimum Feedback Resistor Although a current feedback amplifier’s bandwidth dependency on closed loop gain isn’t as severe as that of a voltage feedback amplifier, there can be an appreciable decrease in bandwidth at higher gains. This decrease may be minimized by taking advantage of the current feedback amplifier’s unique relationship between bandwidth and RF. All current feedback amplifiers require a feedback resistor, even for unity gain applications, and RF, in conjunction with the internal compensation capacitor, sets the dominant pole of the frequency response. Thus, the amplifier’s bandwidth is inversely proportional to RF. The HFA1245 design is optimized for a 750Ω RF at a gain of +2. Decreasing RF decreases stability, resulting in excessive peaking and overshoot (Note: Capacitive feedback will cause the same problems due to the feedback impedance decrease at higher frequencies). At higher gains the amplifier is more stable, so RF can be decreased in a trade-off of stability for bandwidth. The table below lists recommended RF values for various gains, and the expected bandwidth. For good channel-tochannel gain matching, it is recommended that all resistors (termination as well as gain setting) be ±1% tolerance or better. Note that a series input resistor, on +IN, is required for a gain of +1, to reduce gain peaking and increase stability. TABLE 1. OPTIMUM FEEDBACK RESISTOR GAIN (AV) -1 +1 +2 +5 +10 RF (Ω) 475 560 (+RS = 650Ω) 750 200 180 BANDWIDTH (MHz) 280 260 420 270 140 FREQUENCY (MHz) FIGURE 1. CHANNEL 1 AND CHANNEL 2 MATCHED FREQUENCY RESPONSE Non-inverting Input Source Impedance For best operation, the DC source impedance seen by the non-inverting input should be ≥50Ω. This is especially important in inverting gain configurations where the non-inverting input would normally be connected directly to GND. Pulse Undershoot and Asymmetrical Slew Rates The HFA1245 utilizes a quasi-complementary output stage to achieve high output current while minimizing quiescent supply current. In this approach, a composite device replaces the traditional PNP pulldown transistor. The composite device switches modes after crossing 0V, resulting in added distortion for signals swinging below ground, and an increased undershoot on the negative portion of the output waveform (see Figures 7, 11, 15, and 19). This undershoot isn’t present for small bipolar signals, or large positive signals. Another artifact of the composite device is asymmetrical slew rates for output signals with a negative voltage component. The slew rate degrades as the output signal crosses through 0V (see Figures 7, 11, 15, and 19), resulting in a slower overall negative slew rate. Positive only signals have symmetrical slew rates as illustrated in the large signal positive pulse response graphs (see Figures 5, 9, 13, and 17). DISABLE Input TTL Compatibility The HFA1245 derives an internal GND reference for the digital circuitry as long as the power supplies are symmetrical about GND. With symmetrical supplies the digital switching threshold (VTH = (VIH + VIL)/2 = (2.0 + 0.8)/2) is 1.4V, which ensures the TTL compatibility of the DISABLE input. If asymmetrical supplies (e.g., +10V, 0V) are utilized, the switching threshold becomes: V+ + VV TH = ------------------- + 1.4V, 2 Channel-To-Channel Frequency Response Matching The frequency response of channel 1 and channel 2 aren’t perfectly matched. For the best channel-to-channel frequency response match in a gain of 2 (see Figure 1), use RF = 650Ω for channel 1 and RF = 806Ω for channel 2. and the VIH and VIL levels will be VTH ± 0.6V, respectively. 5 HFA1245 Optional GND Pin for TTL Compatibility Pin 12 is an optional GND reference used to ensure the TTL compatibility of the DISABLE inputs. With symmetrical supplies the GND pin may be unconnected, or connected directly to GND. If asymmetrical supplies (e.g., +10V, 0V) are utilized, and TTL compatibility is desired, the GND pin must be connected to GND. With an external GND, the DISABLE input is TTL compatible regardless of supply voltage utilized. increases. For example, at AV = +1, RS = 45Ω, CL = 40pF, the overall bandwidth is 185MHz, but the bandwidth drops to 85MHz at AV = +1, RS = 9Ω, CL = 330pF. 50 SERIES OUTPUT RESISTANCE (Ω) 40 PC Board Layout The HFA1245’s frequency response depends greatly on the care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended, while a solid ground plane is a must! Attention should be given to decoupling the power supplies. A large value (10µF) tantalum in parallel with a small value (0.1µF) chip capacitor works well in most cases. Terminated microstrip signal lines are recommended at the input and output of the device. Capacitance directly on the output must be minimized, or isolated as discussed in the next section. Care must also be taken to minimize the capacitance to ground at the amplifier’s inverting input (-IN), as this capacitance causes gain peaking, pulse overshoot, and if large enough, instability. To reduce this capacitance, the designer should remove the ground plane under traces connected to -IN, and keep connections to -IN as short as possible. An example of a good high frequency layout is the HA5022 evaluation board discussed below. 30 20 AV = +2 10 AV = +1 0 0 50 100 150 200 250 300 350 400 LOAD CAPACITANCE (pF) FIGURE 2. RECOMMENDED SERIES OUTPUT RESISTOR vs LOAD CAPACITANCE Evaluation Board Evaluate the HFA1245’s performance using the HA5022 evaluation board (part number HA5022EVAL). Please contact your local sales office for ordering information. The feedback and gain setting resistors must be replaced with the appropriate value (see “Optimum Feedback Resistor” table) for the gain being evaluated. Also, replace the two 0Ω series output resistors (RS) with 50Ω resistors. The modified schematic of the board is shown in Figure 3. 750Ω 750Ω Driving Capacitive Loads Capacitive loads, such as an A/D input, or an improperly terminated transmission line degrade the amplifier’s phase margin resulting in frequency response peaking and possible oscillations. In most cases, the oscillation can be avoided by placing a resistor (RS) in series with the output prior to the capacitance. Figure 2 details starting points for the selection of this resistor. The points on the curve indicate the RS and CL combinations for the optimum bandwidth, stability, and settling time, but experimental fine tuning is recommended. Picking a point above or to the right of the curve yields an overdamped response, while points below or left of the curve indicate areas of underdamped performance. RS and CL form a low pass network at the output, thus limiting system bandwidth well below the amplifier bandwidth of 260MHz (for AV = +1). By decreasing RS as CLincreases (as illustrated in the curves), the maximum bandwidth is obtained without sacrificing stability. Even so, bandwidth still decreases as the load capacitance 50Ω IN1 -5V 10µF DIS1 50Ω 1 2 3 4 + CH1 - 14 13 NC 12 GND 11 10 NC RS 0.1µF OUT1 10µF +5V GND 0.1µF IN2 50Ω DIS2 5 CH2 6 7 + 9 NC 8 RS - 50Ω OUT2 750Ω 750Ω FIGURE 3. EVALUATION BOARD SCHEMATIC MODIFIED FOR AV = +2 6 HFA1245 Typical Performance Curves 300 AV = +2 250 OUTPUT VOLTAGE (mV) 200 150 100 50 0 -50 -100 TIME (5ns/DIV.) OUTPUT VOLTAGE (V) 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0 TIME (5ns/DIV.) VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω, Unless Otherwise Specified 3.0 AV = +2 FIGURE 4. SMALL SIGNAL POSITIVE PULSE RESPONSE 200 AV = +2 150 OUTPUT VOLTAGE (mV) 100 50 0 -50 -100 -150 -200 TIME (5ns/DIV.) FIGURE 5. LARGE SIGNAL POSITIVE PULSE RESPONSE 2.0 AV = +2 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 TIME (5ns/DIV.) FIGURE 6. SMALL SIGNAL BIPOLAR PULSE RESPONSE 300 AV = +1 250 OUTPUT VOLTAGE (V) FIGURE 7. LARGE SIGNAL BIPOLAR PULSE RESPONSE 3.0 AV = +1 2.5 200 OUTPUT VOLTAGE (mV) 150 OUTPUT VOLTAGE (V) TIME (5ns/DIV.) 2.0 1.5 100 50 0 1.0 0.5 0 -0.5 -1.0 TIME (5ns/DIV.) -50 -100 FIGURE 8. SMALL SIGNAL POSITIVE PULSE RESPONSE FIGURE 9. LARGE SIGNAL POSITIVE PULSE RESPONSE 7 HFA1245 Typical Performance Curves VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω, Unless Otherwise Specified (Continued) 200 AV = +1 150 100 50 0 -50 -100 -150 -200 OUTPUT VOLTAGE (V) 2.0 AV = +1 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 TIME (5ns/DIV.) -2.0 OUTPUT VOLTAGE (mV) TIME (5ns/DIV.) FIGURE 10. SMALL SIGNAL BIPOLAR PULSE RESPONSE FIGURE 11. LARGE SIGNAL BIPOLAR PULSE RESPONSE 300 AV = -1 250 200 OUTPUT VOLTAGE (mV) 150 100 50 0 -50 -100 TIME (5ns/DIV.) OUTPUT VOLTAGE (V) 3.0 AV = -1 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0 TIME (5ns/DIV.) FIGURE 12. SMALL SIGNAL POSITIVE PULSE RESPONSE 200 AV = -1 150 100 50 0 -50 -100 -150 -200 TIME (5ns/DIV.) FIGURE 13. LARGE SIGNAL POSITIVE PULSE RESPONSE 2.0 AV = -1 1.5 1.0 OUTPUT VOLTAGE (V) 0.5 0 -0.5 -1.0 -1.5 -2.0 OUTPUT VOLTAGE (mV) TIME (5ns/DIV.) FIGURE 14. SMALL SIGNAL BIPOLAR PULSE RESPONSE FIGURE 15. LARGE SIGNAL BIPOLAR PULSE RESPONSE 8 HFA1245 Typical Performance Curves VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω, Unless Otherwise Specified (Continued) 300 250 AV = +5 OUTPUT VOLTAGE (mV) 200 OUTPUT VOLTAGE (V) 150 100 AV = +10 50 0 -50 -100 TIME (5ns/DIV.) 3.0 2.5 AV = +5 2.0 1.5 AV = +10 1.0 0.5 0 -0.5 -1.0 TIME (5ns/DIV.) FIGURE 16. SMALL SIGNAL POSITIVE PULSE RESPONSE FIGURE 17. LARGE SIGNAL POSITIVE PULSE RESPONSE 200 150 AV = +5 100 OUTPUT VOLTAGE (mV) 50 0 AV = +10 -50 -100 -150 -200 TIME (5ns/DIV.) OUTPUT VOLTAGE (V) 2.0 1.5 AV = +5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 TIME (5ns/DIV.) AV = +10 FIGURE 18. SMALL SIGNAL BIPOLAR PULSE RESPONSE FIGURE 19. LARGE SIGNAL BIPOLAR PULSE RESPONSE 3.0 A = +2 V 2.0 1.0 630 200 63 20 GAIN (kΩ) GAIN VOLTAGE (V) 0 DISABLE INPUT 6.3 2 0.63 PHASE 180 135 90 45 0 0.001 0.01 0.1 1 3 6 10 100 500 PHASE (DEGREES) 1.0 0 OUTPUT -1.0 0.2 0.063 TIME (100ns/DIV.) FREQUENCY (MHz) FIGURE 20. OUTPUT DISABLE / ENABLE RESPONSE FIGURE 21. OPEN LOOP TRANSIMPEDANCE 9 HFA1245 Typical Performance Curves VOUT = 200mVP-P GAIN NORMALIZED PHASE (DEGREES) 0 -3 -6 PHASE AV = +1, CH1 AV = -1 0 90 180 270 BOTH CHANNELS SHOWN 1 AV = +1 AV = -1 360 1000 VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω, Unless Otherwise Specified (Continued) GAIN (dB) 3 AV = +1, CH2 NORMALIZED GAIN (dB) 3 0 -3 -6 VOUT = 200mVP-P GAIN AV = +2, CH1 PHASE AV = +10 AV = +2, CH2 AV = +5 AV = +10 2 2 90 AV = +5 AV = +2 180 270 360 PHASE (DEGREES) PHASE (DEGREES) 0 BOTH CHANNELS SHOWN 1 10 100 FREQUENCY (MHz) 1000 10 100 FREQUENCY (MHz) FIGURE 22. FREQUENCY RESPONSE FIGURE 23. FREQUENCY RESPONSE NORMALIZED GAIN (dB) GAIN (dB) 3 0 -3 -6 AV = +2 GAIN VOUT = 1VP-P, CH1 VOUT = 1VP-P, CH2 3 0 -3 -6 0 VOUT = 4VP-P VOUT = 2.5VP-P VOUT = 1VP-P 90 180 270 360 PHASE (DEGREES) AV = +1 GAIN VOUT = 1VP-P VOUT = 2.5VP-P VOUT = 4VP-P PHASE 0 VOUT = 4VP-P VOUT = 2.5VP-P VOUT = 1VP-P 90 180 270 360 BOTH CHANNELS SHOWN 1 10 100 FREQUENCY (MHz) 1000 VOUT = 2.5VP-P PHASE VOUT = 4VP-P BOTH CHANNELS SHOWN 1 10 100 FREQUENCY (MHz) 1000 FIGURE 24. FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES FIGURE 25. FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES GAIN (dB) 3 AV = -1 GAIN VOUT = 1VP-P NORMALIZED GAIN (dB) BOTH CHANNELS SHOWN -3 -6 PHASE NORMALIZED PHASE (DEGREES) VOUT = 4VP-P 3 0 -3 -6 -9 AV = -1, VOUT = 5VP-P AV = +2, VOUT = 5VP-P AV = +1, VOUT = 4VP-P VOUT = 2.5VP-P VOUT = 4VP-P VOUT = 2.5VP-P VOUT = 1VP-P 0 90 180 270 360 1000 BOTH CHANNELS SHOWN 1 10 100 FREQUENCY (MHz) 1 10 100 1000 FREQUENCY (MHz) FIGURE 26. FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES FIGURE 27. FULL POWER BANDWIDTH 10 HFA1245 Typical Performance Curves VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω, Unless Otherwise Specified (Continued) 0.4 0.3 NORMALIZED GAIN (dB) 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 VOUT = 200mVP-P AV = +1, CH2 CROSSTALK (dB) AV = +1, CH1 AV = +2, CH2 -20 -30 -40 -50 -60 -70 -80 -90 AV = +2, CH1 BOTH CHANNELS SHOWN 1 10 FREQUENCY (MHz) 100 0.3 -100 AV = +2, VIN = 1VP-P AV = -1 1 10 FREQUENCY (MHz) 100 1000 FIGURE 28. GAIN FLATNESS FIGURE 29. CROSSTALK (PASSIVE CHANNEL ENABLED) AV = +2, VIN = 1VP-P -20 -30 OFF ISOLATION (dB) CROSSTALK (dB) -40 -50 -60 -70 -80 -90 -100 0.3 1 10 FREQUENCY (MHz) 100 1000 20 30 40 50 60 70 80 90 100 0.3 AV = +2, VIN = 1VP-P DIS1 = DIS2 = 0V 1 10 FREQUENCY (MHz) 100 1000 FIGURE 30. CROSSTALK (PASSIVE CHANNEL DISABLED) FIGURE 31. ALL HOSTILE OFF ISOLATION 10 AV = +2 AV = -1 OUTPUT RESISTANCE (Ω) 20 30 40 GAIN (dB) 50 60 70 80 90 100 1 10 100 1000 0.3 AV = +1 AV = +2 1K 100 10 1 0.1 0.01 1 FREQUENCY (MHz) 10 100 FREQUENCY (MHz) 1000 FIGURE 32. REVERSE ISOLATION FIGURE 33. ENABLED OUTPUT RESISTANCE 11 HFA1245 Typical Performance Curves VSUPPLY = ±5V, TA = 25oC, RF = Value From the Optimum Feedback Resistor Table, RL = 100Ω, Unless Otherwise Specified (Continued) 35 AV = +2 30 SETTLING ERROR (%) 0.1 0.05 0.025 0 -0.025 -0.05 -0.1 VOUT = 2V AV = +2 RF = 750Ω 25 TOI (dBm) 20 15 10 5 0 50 100 FREQUENCY (MHz) 150 3 13 23 33 43 53 63 TIME (ns) 73 83 93 103 FIGURE 34. 3rd ORDER INTERCEPT vs FREQUENCY 100 100 3.6 3.5 NOISE CURRENT (pA/√Hz) NOISE VOLTAGE (nV/√Hz) INI3.4 OUTPUT VOLTAGE (V) 3.3 3.2 3.1 3.0 2.9 2.8 2.7 1 0.1 1 1 10 FREQUENCY (kHz) 100 2.6 -50 FIGURE 35. SETTLING TIME RESPONSE AV = -1 |-VOUT| (RL = 100Ω) +VOUT (RL = 100Ω) INI+ 10 ENI 10 |-VOUT| (RL = 50Ω) +VOUT (RL = 50Ω) -25 0 25 50 75 100 125 TEMPERATURE (oC) FIGURE 36. INPUT NOISE CHARACTERISTICS 30 -55oC TOTAL SUPPLY CURRENT (mA) 25 OUTPUT LEAKAGE CURRENT (µA) 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 FIGURE 37. OUTPUT VOLTAGE vs TEMPERATURE VDIS = 0V VOUT = -3.5V, VIN = 2.5V 20 25oC 15 125oC 25oC 5 -55oC 125oC VOUT = -3V, VIN = 2V 10 VOUT = 3.5V, VIN = -2.5V VOUT = 3V, VIN = -2V -50 -25 0 25 50 75 100 125 0 3 4 5 6 SUPPLY VOLTAGE (±V) 7 8 0 -75 TEMPERATURE (oC) FIGURE 38. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 39. DISABLED OUTPUT LEAKAGE vs TEMPERATURE 12 HFA1245 Die Characteristics DIE DIMENSIONS: 69 mils x 92 mils x 19 mils 1750µm x 2330µm x 483µm METALLIZATION: Type: Metal 1: AICu(2%)/TiW Thickness: Metal 1: 8kÅ ±0.4kÅ Type: Metal 2: AICu(2%) Thickness: Metal 2: 16kÅ ±0.8kÅ SUBSTRATE POTENTIAL (POWERED UP): Floating (Recommend Connection to V-) PASSIVATION: Type: Nitride Thickness: 4kÅ ±0.5kÅ TRANSISTOR COUNT: 180 Metallization Mask Layout HFA1245 -IN1 OUT1 GND (NOTE 8) V+ +IN1 NC DISABLE1 V- DISABLE2 NC +IN2 OUT2 -IN2 V- NOTE: 8. This is an optional GND pad. Users may set a GND reference, via this pad, to ensure the TTL compatibility of the DISABLE inputs when using asymmetrical supplies (e.g., V+ = 10V, V- = 0V). See the “Application Information” section for details. 13 HFA1245 Dual-In-Line Plastic Packages (PDIP) N E1 INDEX AREA 12 3 N/2 -B-AD BASE PLANE SEATING PLANE D1 B1 B 0.010 (0.25) M D1 A1 A2 L A C L E E14.3 (JEDEC MS-001-AA ISSUE D) 14 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL A A1 MIN 0.015 0.115 0.014 0.045 0.008 0.735 0.005 0.300 0.240 MAX 0.210 0.195 0.022 0.070 0.014 0.775 0.325 0.280 MILLIMETERS MIN 0.39 2.93 0.356 1.15 0.204 18.66 0.13 7.62 6.10 MAX 5.33 4.95 0.558 1.77 0.355 19.68 8.25 7.11 NOTES 4 4 8 5 5 6 5 6 7 4 9 Rev. 0 12/93 -C- A2 B B1 C D D1 E E1 e eA eB L N eA eC C e C A BS eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 1.14mm). 0.100 BSC 0.300 BSC 0.115 14 0.430 0.150 - 2.54 BSC 7.62 BSC 10.92 3.81 14 2.93 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 14