USER’S MANUAL
HIP2103_4MBEVAL1Z
AN1896
Rev 0.00
November 13, 2013
HIP2103, HIP2104 Evaluation Board
Introduction
The HIP2103_4MBEVAL1Z is an evaluation tool for the
HIP2103 and HIP2104 half bridge MOSFET drivers. This tool
consists of a mother board and HIP2103DBEVAL1Z and
HIP2104DBEVAL1Z evaluation daughter cards. The mother
board platform provides an on-board microcontroller that is
used to generate appropriate control inputs to the HIP2103 or
HIP2104. The frequency, the PWM duty cycle, and the dead-time
provided by the microcontroller are user adjustable.
The 6 position DIP switch is used to setup the PWM switching
frequency (positions 1, 2, and 3) and the dead-time (positions
4, 5, and 6). One specific combination of DIP switch settings
(all positions set to on) disables the signals from the
microcontroller and enables all of the external inputs.
For those customers who would like to modify the firmware of
the PIC18F2431 microcontroller, an RJ25 connector is
provided for easy connection with Microchip firmware
development tools (not provided or supported by Intersil).
For customers who desire to provide their own external signals,
the on-board controller can be configured to allow the
daughter cards to be controlled by externally provided inputs.
VCC and VDD on/off
(HIP2104 only)
DEAD FREQ
TIME
The daughter cards can also be used as stand-alone units
mounted on a customer designed main board that
incorporates customer selected bridge FETs and any other
external circuits desired. The daughter cards have optional
circuits so that the HIP2103 or HIP2104 can be configured as
required by the customer’s application.
Specifications
5V minimum, 50V maximum
operating including transients
uC BIAS
OPTION
External Bias for Microcontroller 3.3V - 5.0V, ~30mA
Maximum Bridge Current
20A
PWM Switching Frequency
5kHz to 40kHz in 5kHz increments
PWM Duty Cycle
adjustable from 0% to ~ 98%
Dead-time
0.0µs to 2.8µs in 400ns increments
Large Terminal Blocks
15A each connection
Small Terminal Blocks
6A each connection
DUTY
CYCLE
Bridge Bias Voltage (VBAT)
BRIDGE
BIAS
LOAD
EXTERNAL
INPUTS
Vdd, Vcc
I/O
BIAS
uC
Not used
Scope
This application note covers the use of the HIP2103_4 mother
board and the HIP2103_4 daughter cards. Details for setting
up and using the microcontroller are covered. Assembly
options on the motherboard are also reviewed. Sample
waveforms are also provided.
Observe the
installation
polarity
The microcontroller firmware is provided on request but the
only support offered by Intersil will be for bug corrections.
Please refer to Microchip for details on the use of the
PIC18F2431.
Physical Layout
The HIP2103_4MBEVAL1Z board is 84mm by 94mm. The
tallest component is the RJ25 connector. The total height is
38mm. Multiple inputs have miniature terminal blocks and the
high current battery inputs and load outputs have larger
terminal blocks rated for 15A each connection. Three
push-buttons are used for RESET, START/STOP, and SLEEP
functions. An on-board potentiometer is used to adjust the
duty cycle.
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November 13, 2013
FIGURE 1. HIP2103_4MBEVAL1Z, FRONT AND BACK VIEWS
Page 1 of 19
HIP2103_4MBEVAL1Z
Block Diagram
application. The jumper strap option, J2, is used to select the
appropriate bias source labeled VCC from the HIP2104 or 5V
from an external bias connected to 5V and GND on TB8.
Optional external
LI, HI, VCen, and
Vden Inputs
Push
buttons
Option
switches
An external 12V bias is not required for the HIP2104 daughter
card because VDD is provided internally by the HIP2104 driver.
LEDs
MicroController and Associated Circuits
Microcontroller
Ext.
Bias
External Inputs
Buffer
VCen, Vden, LI,
HI, Multiplexer
12V
HIP2103
or
HIP2104
Daughter Card
Half Bridge FETs
To emulate controllers that may to be used by customers that do
not have the ability to generate dead-time, the dead-time of the
microcontroller can be set to zero. On the daughter cards, an
optional RCD circuit is provided for the LI and HI inputs of the
HIP2103, HIP2104 to generate dead-time.
Optional
DC Motor or
other Loads
FIGURE 2. HIP2103_4MBEVAL1Z, BLOCK DIAGRAM
The HIP2103_4 evaluation board is a fully self contained test
platform to evaluation the HIP2103 or the HIP2104 which are
provided on daughter cards.
Evaluation Board Application
The HIP2103_4MBEVAL1Z mother board and associated
daughter cards are the same test boards as used by the Intersil
application engineers and I.C. designers to evaluate the
performance of the HIP2103 and HIP2104 MOSFET drivers.
Bias Supplies
The HIP2103_4MBEVAL1Z mother board requires a current
limited lab supply (0V to 50V) for the VBAT and GND inputs on
TB1. The current capacity is dependant on the users desired load
if any.
An external 3.3V to 5V bias supply (~25mA) is required for the
microcontroller and associated circuits. Alternatively, the VCC
output of the HIP2104 daughter card can be used to provide the
3.3V bias for the microcontroller as intended in a real
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The PWM frequency and the dead-time options of the
microcontroller are configured by the SW5 DIP switch. Refer to
the chart on the mother board schematic (page 9) for the DIP
switch settings or to Table 1. The DIP switch settings are read
only once after the Start/Stop button is pressed to start the
PWM. Any changes to the frequency or dead-time settings are
not recognized until the PWM is stopped then re-started.
Turning the potentiometer, R1, fully counter clockwise (CCW)
reduces the duty cycle of the output of the bridge to a minimum.
Turning fully clockwise results with a maximum duty cycle. The
duty cycle is proportional to the tap voltage of the potentiometer
independent of the PWM frequency. The dead-time subtracts
from the duty cycle period on the leading edge of the HI and LI
inputs to the daughter cards altering the actual duty cycle.
Jumper
Option
3.3V
The 12V bias for the HIP2103 daughter card must be supplied by
an external source connected to VDD and GND of TB6.
Be cautious if the zero dead-time option is selected when the
HIP2103, HIP2104 daughter cards are not configured for delays
with the RCD circuit as this will result with shoot-thru currents in
the bridge.
Four LEDs are used to indicate the operating status of the
microcontroller. Refer to the Setup and Operating Instructions
section for complete details.
Half Bridge
The bridge is composed of two (SiR662DP) 60A, 60V, MOSFETs.
Each FET has an optional gate to source and drain to gate
capacitors to allow the emulation of FETs with larger
capacitances if desired. An optional series gate resistor is also
provided for each bridge FET that can also be used the emulate
the internal gate resistance. The current rating of these
SiR662DP MOSFETs was chosen primarily to eliminate the need
of a heat sink when operating with heavy current loads. The
maximum output load current is constrained by the current
rating of the VBAT (TB1) and the Vout (TB7) terminal blocks. If a
load current higher than 15A is desired, it is recommended that
the battery and load wires are soldered directly to the solder pads
of the TB1 and TB2 terminal blocks on the bottom of the PCB.
The bridge bias source is connected to the GND_VBAT terminal
block (TB1). The voltage source can be either a current limited
power supply (recommended for initial setup) or a battery (a fuse
is highly recommended).
An external load can be connected to the GND_VOUT (TB7)
terminal block. The load can be of any configuration (for example
Page 2 of 19
HIP2103_4MBEVAL1Z
a DC motor or an LCR load) as desired by the user within the
constraints of the bridge FETs and the terminal blocks.
R23
Even though the FETs have a voltage rating of 60V, the maximum
operating voltage is limited to 50V by the rating of the HS and
VBAT pins on the HIP2103, HIP2104 drivers.
0
D1
SW4
1
C8
S1B
2.2UF
2
1
VCEN SWITCH
Daughter Cards
The HIP2104 has integrated LDOs for the VDD bias of the driver
and VCC for the bias of the controller. VDD and VCC outputs of the
HIP2104 are available on the GND_VDD_VCC terminal block
(TB6). External loads on the LDOs can be connected here.
GND1
VDEN
VCEN
VCC
VDD
HI-IN
100
R30
1
11
1
U3
LI-IN
R33
1
VDEN SWICH
100
SW3 3
2
Two different daughter cards are provided for evaluation. These
cards are mounted on the back side of the mother board to
facilitate temperature testing using a temperature forcing system.
The HIP2103DBEVAL1Z and HIP2104DBEVAL1Z daughter cards
are identical except for the differences between the HIP2103
and the HIP2104.
3
2
D2
1
3
2
1
U3
3
2
3
3
4
D3
5
6
DAUG
S
SK2
SK2
SK2
SK2
SK2
SK2
7
FIGURE 3. DIODE TO SUPPRESS LI-ON BATTERY RIPPLE
When using the HIP2103 daughter card, both VDD and VCC must
come from external sources. The same terminal block used for
the LDO outputs of the HIP2104 can be used as external inputs
when using the HIP2103.
• Gate to source resistors on the bridge FETs. (R19 and R21 are
omitted)
As mentioned previously, the J2 strap option is used to select the
bias source for the microcontroller. If the 5V strap option is
selected, the bias to the microcontroller will always be present (if
the external source is on) even when the LDO outputs of the
HIP2104 are not enabled. This is desirable during the initial
setup of the evaluation board or when testing the HIP2103.
• Gate to source, and gate to drain capacitor on the bridge FETs
(C11, C12, C9, and C10 omitted). The capacitors can be added
to emulate larger FETs.
• Series connected gate resistors on each bridge FETs (R34 and
R35 are installed with zero ohms)
VBAT
Three push buttons provide control signals to the microcontroller.
As usual, the reset button restarts the firmware. The Start/Stop
button starts and stops the PWM signals to the LI and HI inputs
of the HIP2103, HIP2104. The Sleep button turns on and off the
sleep mode.
User Assembly Options
The following user optional assembly features are provided on
the evaluation mother board:
• Series connected diode (D1) on the VBAT input to the HIP2104
daughter card for holding up VBAT when there is severe ripple
voltage from a LI-ON battery. A zero ohm resistor (R23) shorts
out this diode when not required (installed)
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0.1UF
C15
10UF
C14
C13
Q1
SI7430DP
5
6
7
8
OPEN
OPEN
C9
R19
4
0
OUT
SI7430DP
Q2
1
2
3
4
OPEN
R21
0
OPEN
OPEN
R35
5
6
7
8
C12
C10
The VCEN and VDEN inputs of the HIP2104, are used to enable
the LDO outputs of the HIP2104. These two signals are provided
by two mechanical switches, SW2 and SW3. Mechanical
switches are used to demonstrate the intended use of the VCEN
and VCEN inputs of the HIP2104 although digital logic signals
can also be used when external inputs are optionally chosen. The
debouncing feature of the VDCEN and VDEN inputs can also be
observed when using the mechanical switches. Note that either
of these two switches can be turned on or off randomly to
demonstrate the performance of the HIP2104 when either of the
LDO outputs are turned off during operation of the bridge.
OPEN
R34
1
2
3
Switches and Push Buttons
10UF
C11
VOUT
VOUT
GND
2
1
TB7
FIGURE 4. OPTIONAL RESISTORS AND CAPACITORS FOR
BRIDGE FETs
The following user optional assembly features are provided on
the HIP2103, HIP2104 daughter cards.
• The HO and LO outputs have options for a bypass diode across
a series connected gate resistor for slower turn-on and faster
turn-off of the driven bridge FET. The default configuration
includes the bypass diode in parallel with a 24.9Ω resistor.
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HIP2103_4MBEVAL1Z
2
R6
1UF
4
24.9
R7
R5
0
5
6
24.9
OPEN
C9
J1
J1
J1
1
2
VBAT
HB
HI-OUT
HS-OUT
LO-OUT
VBAT
12
HB
11
HO
10
HS
9
LO
8
VSS
7
3
C5
HO
HS
LO
C6
S)
RAANZ
RTAANZ
1
2
D4
7
8
GND2
J1
J1
J1
LI
HI
VDD
VCC
1
J1
2
D4
7
8
GND2
J1
J1
J1
C3
C4
4.7UF
C2
1UF
6
13
11
LI
U3
EP(V
HIP2104
HIP2104
8
9
FIGURE 6. BYPASS DIODES (D1, D2) USED FOR DEAD TIME
GENERATION
• The HS pin has an RC filter (R7/C7 on the HIP2103 daughter
card and R7/C9 on the HIP2104 daughter card) that was
required for early engineering samples (rev. A) of the
HIP2103/4. This filter is not necessary for the production
grade parts. The default value for R7 is zero ohms and the
capacitor between HS and VSS is omitted.
2
GND1
R30
1
1
0
OPEN
0 C1
OPEN
R2
GND1
HI
LI
2
VDEN
HI
2
VCEN
VDD
5
D1
VCC
4
1
7 1
1
VDEN SWICH
VDD
VCC
HI-IN
3
D2
SW3 3
2
100
VCEN
1
VCEN SWITCH
LI-IN
2
3
R33
4
R1
J2
24.9
C9
J1
2
100
VDEN
SW4
1
S1B
C8
1
2
2.2UF
3
6
J2
6
0
U
5
J2
0
J1
R23
2
J2
R5
5
In the case of the VCEN and VDEN inputs, the parasitic inductance
resulting from the leads to and from the mechanical switches will
resonate with the input capacitance of these pins and with the
paralleled external parasitic capacitance on the PCB. When
operating at higher voltage levels, it is necessary to have series
connected resistor, R30 and R33 (on the mother board), to
dampen the ringing spike. By default, R30 and R33 are 100Ω.
D1
J2
R7
J1
The recommended maximum operating voltage on the HS, VBAT,
VCEN, and VDEN pins is 50V. This includes the switching transients
resulting from parasitic inductance in the bridge circuit.
1
J2
R3
C8
4
24.9
J1
Switching Transients
• The LI and HI inputs have optional RCD circuits for the purpose
of generating dead-time if a controller is used that does not
have built-in dead-time capability. As previously mentioned,
the on-board microcontroller can be configured for no
dead-time delays. The default configuration includes Schottky
diodes in parallel with a zero ohm resistor.
J2
R6
0.1UF
C7
2
J1
FIGURE 7. RC FILTER ON HS PIN (NOT REQUIRED)
GND
GND
GND
FIGURE 5. BYPASS DIODES (D3, D4) FOR SLOW TURN-ON AND
FAST TURN-OFF
J2
1 D3
9
9
J2
LO
OPEN
1 D3
HO
OPEN
C5
J1
HS
OPEN
3
J1
HB
GND
OPEN
2
J1
2.2UF
1
1
3
U3
D2
1
D3
3
2
3
3
4
5
6
DAUG
S
SK2
SK2
SK2
SK2
SK2
SK2
7
FIGURE 8. VCEN AND VDEN DAMPENING RESISTORS
A similar transient situation may occur with the HS pin. In this
situation, a ringing spike can be more severe because of high
speed switching from the bridge FETs, the large amplitude of
switching currents, and because of parasitic inductance
associated with the bridge high current PCB traces. Because the
amplitude of the ringing spike also increases with the switching
load current amplitude, evaluation should be over the full
operating load range including fault currents. Good bridge circuit
PCB design will minimize but cannot totally eliminate ringing on
the HS node.
These switching transients are relatively fast. When evaluating the
spikes on these pins, it is necessary to use a time base on the scope
of about 100ns/division. Slower sweep speeds may mask the
switching spike depending on the sample rate of the digital scope.
AN1896 Rev 0.00
November 13, 2013
Page 4 of 19
HIP2103_4MBEVAL1Z
Other methods can also be used to reduce ringing on the HS
node. Sufficiently large value gate resistors on the bridge FETs
will reduce the switching speed and consequently the amplitude
of the ringing. The above mentioned RC filter on the HS pin can
also be used to attenuate the spike directly on the HS pin. By
default, the gate resistors on the HIP2103/4 daughter cards, R5
and R6, is 24.9Ω. With this evaluation PCB layout, 24.9Ω is
sufficient to prevent excessive switching transient but a
customer’s PCB layout may require more or less gate resistance
or another method to attenuate the switching transients.
Another source of switching transients that must be dealt with is
from the bridge voltage source, especially with LI-ON batteries.
When the LI_ON battery load current is interrupted when the
bridge turns off, the voltage from the battery can rise
dramatically because of the internal inductance of the battery.
The usual solution is to have sufficiently large capacitance across
the bridge. This bridge bypass capacitor is effectively an LC filter
working with the internal inductance of the LI-ON battery
(typically a few hundred nH). If the capacitor value is large
enough, the battery voltage will be close to the nominal unloaded
value with minimal ripple. Another approach to reduce the
amplitude of the voltage transient from the battery without
increasing the size or value of the bridge capacitor is to increase
the PWM switching frequency.
If it is not desirable to use relatively large value capacitors across
the bridge, a clamping method must be used to limit the peak
voltage ripple from the battery. In any case, a relatively small
capacitor across the bridge should be used to limit the rate of
change of the ripple voltage and to minimize the effects of the
PCB parasitic trace inductance on the HS pin.
Another consequence of allowing a relatively large ripple voltage
on the battery is that under heavy load conditions, the voltage
ripple valley will drop to very low levels. Because most motor
loads respond to the average voltage applied, this ripple voltage
is of minimal concern. The problem is that if the valley voltage
drops too low, the 12V LDO (VDD) of the HIP2104 will sag
resulting with a lower gate drive voltage. The UVLO of the
HIP2103/4 is 4.5V (or optionally 7.5V). If the bridge FETs are
selected appropriately, this low gate drive voltage will have not
significant effect except for the usual consequence of higher
rDS(ON) of the bridge FETs.
To mitigate this problem of excessively low ripple voltage from
the battery, a diode in series with the VBAT input of the HIP2104
daughter card with a capacitor to ground will hold up the voltage
on VBAT (and consequently the VCC and VDD outputs) when the
valley voltage is low (Figure 3). This series connected diode is an
assembly option on the HIP2103_4MBEVAL1Z mother board.
The default configuration has a zero ohm resistor in parallel with
the diode.
Setup and Operating Instructions
The follow procedure ensures a correct setup of the evaluation
board and illustrates various operating methods.
Required Lab Equipment
• Power supply (or battery), 13V minimum to 50V maximum
operating for the bridge bias. The current rating of the power
supply must have sufficient capacity for the external load used
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for testing (if any). If no load is applied, 200mA is sufficient. If
a battery is the power source, it is highly recommended that an
appropriate fuse be used. With a LI-ON battery, it is necessary
to add sufficient capacitance (100µF or greater) across the
VBAT terminal block to prevent excessive ringing.
• Bias supply, 12V at ~50mA, require for testing the HIP2103
• Bias supply, 3.3V to 5.0V at ~50mA, for testing the HIP2103
• Bench fan (only necessary when testing with large loads at
elevated ambient temperatures)
• Four channel oscilloscope, ~500MHz recommended
• Current Probe (optional) when testing with external loads.
• Multimeter
Initial Configuration for the Microcontroller
The following procedure illustrates how to configure the
microcontroller without applying power to the bridge.
1. Connect a 5.0V bias supply to the +5V_GND terminal block
(TB8). This voltage powers the microcontroller.
2. Ensure that the jumper strap on J2 is on the 5V option. This
will connect the microcontroller to the external lab supply.
3. Setup the DIP switch on the mother board with the desired
PWM frequency and dead-time. For the initial setup, start with
20kHz and 400ns dead-time (in bold type).
TABLE 1. DIP SWITCH OPTIONS
SWITCH POSITION
PWM Frequency
External inputs
Dead-Time
6
5
4
3
2
1
x
x
x
0
0
0
5kHz
x
x
x
0
0
1
10kHz
x
x
x
0
1
0
15kHz
x
x
x
0
1
1
20kHz
x
x
x
1
0
0
25kHz
x
x
x
1
0
1
30kHz
x
x
x
1
1
0
35kHz
x
x
x
1
1
1
40kHz
1
1
1
1
1
1
0
0
0
x
x
x
0.000µs
0
0
1
x
x
x
0.400µs
0
1
0
x
x
x
0.800µs
0
1
1
x
x
x
1.200µs
1
0
0
x
x
x
1.600µs
1
0
1
x
x
x
2.000µs
1
1
0
x
x
x
2.400µs
1
1
1
x
x
x
2.800µs
4. Connect scope probes on the HI and LI test points on the
mother board. Set the time base to 200ns/Div. Set the
vertical gain to 2V/Div. Set the trigger on the LI input at the
2.5V level with a negative edge trigger. Set the trigger position
at the 400ns division (on the left side of the screen) and use
the auto trigger mode.
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HIP2103_4MBEVAL1Z
5. Turn the duty cycle potentiometer, R1, fully counter clockwise
until it clicks.
6. Turn on the lab supply. Observe that the four LEDs turn on and
off, one after another. This flashing sequence indicates that
power has been applied. After the initial flash, all LEDs will be
off.
led3
led2
led1
led0
At initial turn on, leds will turn on and
off one at a time starting with led0
7. Observe that the LI and HI inputs are low.
8. Press the Start/Stop push button once. The RUN LED (led0)
will blink indicating that PWM signals from the controller have
been enabled.
EXERNAL
led3
led2
SLEEP
RUN
led1
led0
With PWM signals present on LI and HI,
the RUN LED is blinking
The DIP switch options are read only when the Start/Stop button
is pressed to start the PWM signals. Changing the settings while
the RUN LED is flashing will have no effect. To update the DIP
switch setting, change the setting, stop the PWM signals, then
start again.
9. Slowly rotate the potentiometer, R1, to the right (CW) until the
following waveforms appear.
Initial Setup to Evaluate the HIP2104
Daughter Card
The following procedure illustrates how to setup the daughter
cards and applying power to the bridge.
1. Install a HIP2104 daughter card on the mother board. Be
careful with the polarity. Incorrect installation may damage
the daughter card and the mother board.
2. Connect an additional scope probe to the HS test point on the
mother board. Set the vertical gain to 10V/Div and the time
base to 10µs/Div.
3. Ensure that the VDEN and VCEN switches are off.
4. Connect the bridge power supply to the VBAT_GND terminal
block (TB1).
5. Starting with an initial output of 20V, and a current limit of
200mA, turn on the bridge supply. Caution: If a Li-on battery
is used instead of a regulated supply, it is recommended to
add a 100uF or larger capacitor across the VBAT input
terminal. This is necessary because the relatively large
inductance of an Li-on battery may resonate with the bridge
bypass capacitor resulting with excessive voltage.
6. Turn on the VDEN switch.
7. Measure 12V +/5% on the VDD pin of TB6 relative to the GND
pin.
8. Turn on the VCEN switch.
9. Measure 3.3V ±3% on the VCC pin of TB6 relative to the GND
pin.
10. Press the Start/Stop button. led0 is flashing.
11. Turn the potentiometer CW until the following waveform
appears:
10. Confirm that a 400ns dead-time is present.
11. Rotate the potentiometer CCW to zero the PWM period.
12. Press the Start/Stop push button to disable the PWM outputs.
The blinking led0 will turn off.
13. Press the Sleep button. led1 will turn on to indicate that the
sleep mode is active.
14. Press the Start/Stop button. led0 will flash indicating that the
PWM outputs are active. Simultaneously, led1 will turn off
indicating that the sleep mode is no longer active.
15. Press the Sleep button. led0 will turn off and led1 will turn on
indicating that the sleep mode is active.
12. Confirm that the PWM frequency is 20kHz.
13. Turn off VCEN and VDEN switches. The HS output will stop
switching.
14. Turn off the bridge supply
15. Move the J2 jumper from the 5V strap to the VCC strap. This
configures the microcontroller to be powered from the VCC
output of the HIP2104.
16. Turn on the bridge supply (still at 20V).
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HIP2103_4MBEVAL1Z
17. Turn on the VCEN switch. All 4 LEDs will flash one after
another indicating power has been applied to the controller.
18. Press the Start/Stop button. The LI and HI inputs will start
switching. (The HS output is not switching because VDD is off)
19. Turn on the VDen switch. HS is again switching.
Related Literature
• FN8276 HIP2103, HIP2103 datasheet, “60V, 1A/2A MOSFET
Driver”
• AN1899, “HIP2103_4DEMO1Z 3-phase BLDC Motor Drive”
Initial Setup to Evaluate the HIP2103
Daughter Card
The method to evaluate the HIP2103 is similar to the HIP2104
except that the VCC and VDD bias must be supplied from external
bias supplies. TB6 is an output terminal for VCC and VDD when
testing the HIP2104 but it is also an input terminal for VDD bias
for the HIP2103. VCC on TB6 can also be used as a bias input for
the microcontroller (or alternatively TB8).
DIP Switch Configuration for Testing with
External Signals
It may be desirable to provide control signals from an off-board
controller or logic generator.
1. Configure the DIP switch for external signals (all switches on).
See Table 1.
2. Press the START/STOP button. Observe that led3 (EXTERNAL)
is on.
EXERNAL
led3
led2
SLEEP
RUN
led1
led0
LED3 is on when configured for external inputs.
3. The U3 buffer on the mother board is now in the tri-state
mode. All inputs, VCEN, VDEN, HI, LI must now come from an
external controller. Terminal blocks GND_VDEN_VCEN (TB5),
and HI_LI (TB4) are used for these inputs.
AN1896 Rev 0.00
November 13, 2013
Page 7 of 19
HIP2103_4MBEVAL1Z
AN1896 Rev 0.00
November 13, 2013
Schematic, HIP2103_4MBEVAL1Z Bridge and Daughter Card Socket
TB1
VBAT
1
GND
2
R23
0
D1
C8
1
VCEN-X
3
VDEN_X
2
6
8
7
8
R25
9
R27
10K
R28
10K
3
2
1
TB6
1K
1K
R24
1K
R22
R20
1K
1
R29
10K
OUT
VCC
SK1
SK2
SK1
SK2
SK1
SK2
SK1
HB
G-HO
PHASE
GND2
VBAT
C15
0.1UF
C14
10UF
C13
10UF
SI7430DP
5
6
7
8
Q1
1
2
3
4
R19
SK1
SK2
0
4
OPEN
SK1
SK2
3
C9
SK2
R34
OPEN
SK1
OPEN
1
2
5
OUT
C12
6
7
8
9
OPEN
R35
0
5
6
7
8
U3
SK2
G-LO
GND1
VDEN
5
10K
TB5
VCC
VDD
GND
D3
6
U3
R18
GND
4
SK1
4
Q2
SI7430DP
HI-X
3
SK1
SK2
1
2
3
2
3
SK2
R21
LI-X
2
OPEN
9
IN
TB4
1
3
VBAT
C11
C10
3
U3
D2
DAUGHTER CARD
SOCKET
OPEN
LI-C
5
IN
10
HI-C
1
2
IN
VCEN
1
11
U3
4
VDEN-C
12
VDD
IN
100
IN
VCEN-C
1
EN_VD_VC
R30
IN
13
EN_LI_HI
VCC
1
VDEN SWICH
100
SW3 3
2
HI-IN
7
1
VCEN SWITCH
LI-IN
U3
3
2
R33
C7
14
SW4
1
S1B
IN
0.01UF
50V
V_5V
2.2UF
2
VOUT
VOUT
GND
2
1
TB7
Page 8 of 19
IN
3
10K
2
4.7UF
RB7
28
RA0
RA1
RB6
RB5
27
3
4
RA2
RB4
25
5
RA3
RB3
24
6
RA4
RB2
23
7
AVDD
RB1
22
8
AVSS
RB0
21
9
OSC1
VDD
20
VSS
19
R3
R5
R7
CONTROLLER
PROGRAMING
PORT
(CORRECTED)
2
J1
3
10
OSC2
11
RC0
RC7
18
12
RC1
RC6
17
13
RC2
RC5
16
14
RC3
RC4
15
LED21
2
BAW56
R10
LED01
PWM Frequency
External inputs
1
SD06H0SK
2
LED11
2
1
7
8
2
9
1
10
11
SW5
12
1
2
2
S4
6 5 4 3 2 1
2
Switch position:
3
S3
BAW56
3
S2
BAW56
BAW56
1
2
1
x x x 0 0 0
5KHz
x x x 0 0 1
10KHz
x x x 0 1 0
15KHz
x x x 0 1 1
20KHz
x x x 1 0 0
25KHz
x x x 1 0 1
30KHz
x x x 1 1 0
35KHz
x x x 1 1 1
40KHz
1 1 1 1 1 1
0 0 0 x x x 0.000us
6
4
3
2
4
START/STOP
3
4
SLEEP
555165-1
OUT
V_5V
MCLR
1
1
OUT
2
2
3
S1
3
1
OUT
RB6
RB7
3
OUT
2
4
PIC18F2431S0
3
5
EN_LI_HI
VDEN-C
EN_VD_VC
VCEN-C
HI-C
LI-C
TABLE 1. DIP Switch Options
6
RB6
RB7
GND
V_5V
MCLR
OUT
1K
U1
OUT
R16
C4
4.7UF
1
CSTCE10M5G55
10MHZ
C3
470
OUT
1K
TB9
OUT
R14
10K
OUT
R12
2
OUT
1K
10K
26
RB7
RB6
1K
10K
MCLR
4.7UF
R2
C6
C5
MCLR
2
3
1
1K
5
1
R6
C1
4.7UF
B
C
OUT
IN
OPEN
0.047UF
1
V_5V
IN
U2
LED3
TB10
2
1
R4
IN
4
VOUT
OUT
R9
2K
RESET
1
GND
A
R8
3
10K
2
0.01UF
50V
+5V
GND
2
1
TB8
R1
1
J2
V_5V
C2
VCC
VCC OUTPUT FROM HIP2104
(3.3V OR 5V)
2
0 0 1 x x x 0.400us
10K R17
10K
10K R13
10K R15
Page 9 of 19
R11
0 1 0 x x x 0.800us
Dead-Time
0 1 1 x x x 1.200us
1 0 0 x x x 1.600us
1 0 1 x x x 2.000us
1 1 0 x x x 2.400us
1 1 1 x x x 2.800us
HIP2103_4MBEVAL1Z
AN1896 Rev 0.00
November 13, 2013
Schematic, HIP2103_4MBEVAL1Z Controller
LI
VDEN
VBAT
12
4
2
VCEN
HB
11
5
3
VCC
HO
10
4
VDD
HS
9
5
HI
LO
8
6
LI
VSS
7
6
1
7 1
J2
D1
8
9
2
HI
LI
2
R2
GND1
J2
D2
0 C1
0
C2
C3
C4
13
EP(VSS)
HIP2104 FRAANZ
HIP2104FRTAANZ
3
C5
HO
HS
LO
C6
1 D3
C7
R3
C8
2
R6
0.1UF
4
24.9
R7
R5
0
5
6
24.9
C9
OPEN
1
R1
GND
GND
2
3
OPEN
J2
LO
OPEN
J2
HO
OPEN
J2
HS
2.2UF
J2
2
1UF
J2
HB
U1
4.7UF
J2
VCC
1
OPEN
VDEN
VCEN
VCC
VDD
HI-IN
LI-IN
J2
VDD
1
OPEN
GND
HI
HIP2103_4MBEVAL1Z
AN1896 Rev 0.00
November 13, 2013
Schematic, HIP2104DBEVAL1Z Daughter Card
1
J1
J1
J1
J1
J1
J1
GND
VBAT
HB
HI-OUT
HS-OUT
LO-OUT
2
D4
7
GND2
8
9
J1
J1
J1
GND
GND
GND
Page 10 of 19
1
J1
2
J1
3
J1
4
J1
5
J1
6
J1
7
J1
J2
8
8
J1
J2
9
9
J1
HI
J2
6
J2
7
U1
D2
1
D1
1
GND1
0
HI
LI
2
2
R2
R1
GND
GND
LO
C1
0
1
VDD
HB
8
2
HI
HO
7
3
LI
HS
6
4
VSS
LO
5
9
C2
C3
16V
EP(VSS)
HIP2103FRAAZ C4
HIP2103FRTAAZ
1 D4
C5
HO
HS
LO
C6
2
R6
0.1UF
24.9
R5
R3
OPEN
J2
5
HS
HO
OPEN
J2
4
HB
VDD
OPEN
J2
3
LI
OPEN
2
4.7UF
J2
OPEN
VDEN
VCEN
VCC
VDD
HI-IN
LI-IN
1
J2
OPEN
GND
HIP2103_4MBEVAL1Z
AN1896 Rev 0.00
November 13, 2013
Schematic, HIP2103DBEVAL1Z Daughter Card
C7
R7
0
24.9
1
2
GND
VBAT
HB
HO-OUT
HS-OUT
LO-OUT
GND2
D3
GND
GND
GND
Page 11 of 19
HIP2103_4MBEVAL1Z
Board Layouts - PCB, HIP2103DBEVAL1Z
FIGURE 9. TOP SILKSCREEN
FIGURE 10. TOP LAYER
AN1896 Rev 0.00
November 13, 2013
Page 12 of 19
HIP2103_4MBEVAL1Z
Board Layouts - PCB, HIP2103DBEVAL1Z
(Continued)
FIGURE 11. BOTTOM LAYER
BOM, HIP2103DBEVAL1Z
PART NUMBER
QTY
REF DES
BAT54W-V
2
D1, D2
VISHAY
SMALL SIGNAL SCHOTTKY DIODE
BBL-109-G-E
2
J1, J2
SAMTEC
1 x 9 @ 0.1 SINGLE ROW
ES1A
2
D3, D4
FAIRCHILD
1A, 150V Fast Rectifier Diode
GRM21BR71C475KA73L
1
C3
MURATA
CERAMIC CAP
H1045-00104-25V10
1
C5
GENERIC
Multilayer Cap
H1045-OPEN
5
C1, C2, C4, C6, C7
GENERIC
Multilayer Cap
H2511-00R00-1/16W1
2
R1, R2
GENERIC
Thick Film Chip Resistor
H2511-ROPEN-OPEN
1
R3
GENERIC
Thick Film Chip Resistor
H2512-24R90-1/10W
2
R5, R6
GENERIC
Thick Film Chip Resistor
H2512-00R00-1/8W1
1
R7
GENERIC
Thick Film Chip Resistor
HIP2103FRTAAZ
1
U1
INTERSIL
60V Half Bridge Driver with 4V UVLO
TP_41C60P-DNP
9
HB, HI, HO, HS, LI, LO, VDD,
GND1, GND2
GENERIC
Test Point 0.060 Pad 0.041 Thole (Do Not Populate)
AN1896 Rev 0.00
November 13, 2013
MFR
DESCRIPTION
Page 13 of 19
HIP2103_4MBEVAL1Z
Board Layouts - PCB, HIP2104DBEVAL1Z
FIGURE 12. TOP SILKSCREEN
FIGURE 13. TOP LAYER
AN1896 Rev 0.00
November 13, 2013
Page 14 of 19
HIP2103_4MBEVAL1Z
Board Layouts - PCB, HIP2104DBEVAL1Z
(Continued)
FIGURE 14. BOTTOM LAYER
BOM, HIP2104DBEVAL1Z
PART NUMBER
QTY
REF DES
BAT54W-V
2
D1, D2
VISHAY
SMALL SIGNAL SCHOTTKY DIODE
BBL-109-G-E
2
J1, J2
SAMTEC
1 x 9 @ 0.1 SINGLE ROW
C1608X7R1C105K
1
C4
TDK
MULTILAYER CAP
ES1A
2
D3, D4
FAIRCHILD
1A, 150V Fast Rectifier Diode
GRM21BR71C475KA73L
1
C3
MURATA
CERAMIC CAP
H1045-00104-25V10
1
C5
GENERIC
Multilayer Cap
H1045-OPEN
5
C1, C2, C7, C8, C9
GENERIC
Multilayer Cap
H1082-00225-100V10
1
C6
GENERIC
Ceramic Chip Cap
H2511-00R00-1/16W1
2
R1, R2
GENERIC
Thick Film Chip Resistor
H2511-ROPEN-OPEN
1
R3
GENERIC
Thick Film Chip Resistor
H2512-24R90-1/10W
2
R5, R6
GENERIC
Thick Film Chip Resistor
H2512-00R00-1/8W1
1
R7
GENERIC
Thick Film Chip Resistor
HIP2104FRAANZ
1
U1
INTERSIL
60V Half Bridge Driver with 4V UVLO
TP_41C60P-DNP
10
AN1896 Rev 0.00
November 13, 2013
MFR
HB, HI, HO, HS, LI, LO, VCC, VDD, GENERIC
GND1, GND2
DESCRIPTION
Test Point 0.060 Pad 0.041 Thole (Do Not Populate)
Page 15 of 19
HIP2103_4MBEVAL1Z
PCB, HIP2103_4MBEVAL1Z
START/STOP
HIP2103/04 EVALUATION BOARD
REV B
Pb
ON
VDEN
OFF
SW3
C14 C13
C15
Q2
G-HO
HB VCEN
S4
LED2
VDEN
VBAT
S3
LED0
LED1
LED3
U2
R10
R12
R14
R16
C6
R11
R13
R15
R17
VCC
C12
C10 R35
Q1 R19
R30
R33
C9 R34
C11
C8
D1
S1
S2
R23
SW4
SW5
SLEEP
D2
U1
C4
VCEN
VDD
G-LO
R7
C3
R5
R3
R2
R8
C1
R6
PHASE
LI-IN
HI-IN
D3
R21
U3
C2
R24
R29
R28
R22
R27
R20
R25
R18
C7
GND1
R9
C5
R1
VCC
5V
GND2
J1
TB6
TB8
GND
GND
5V
TB4
A
B C
TB9
TB10
GND
VDD
VCC
TB5
RESET
HI
LI
GND
VDEN
VCEN
TB7
TB1
J2
VOUT
GND
VBAT
GND
R4
FIGURE 15. TOP SILKSCREEN
START/STOP
HIP2103/04 EVALUATION BOARD
REV B
Pb
ON
VDEN
OFF
SW3
C14 C13
C15
Q2
G-HO
HB VCEN
S4
LED2
LED3
U2
R10
R12
R14
R16
C6
R11
R13
R15
R17
VCC
C12
C10 R35
Q1 R19
S3
LED0
LED1
VDEN
VBAT
C8
C9 R34
C11
R30
R33
D1
S1
S2
R23
SW4
SW5
SLEEP
D2
U1
C4
VCEN
VDD
G-LO
R7
C3
R5
R3
R2
R8
C1
R6
PHASE
LI-IN
HI-IN
D3
R21
U3
C2
R24
R29
R28
R22
R27
R20
R25
R18
C7
GND1
VCC
5V
GND2
R9
C5
R1
J1
J2
TB8
A
B C
TB9
TB6
GND
GND
5V
TB4
TB10
GND
VDD
VCC
TB5
RESET
HI
LI
GND
VDEN
VCEN
TB7
VOUT
TB1
GND
VBAT
GND
R4
FIGURE 16. TOP LAYER
AN1896 Rev 0.00
November 13, 2013
Page 16 of 19
HIP2103_4MBEVAL1Z
(Continued)
LISRETNI-888-1 LLAC
EDIS SIHT NO DELLATSNI DRAC RETHGUAD
1KS
1
2KS
1
Z1LAVE3012PIH
B.veR Z1LAVEBM4_3012PIH
PCB, HIP2103_4MBEVAL1Z
RO
Z1LAVE4012PIH
9
9
LISRETNI-888-1 LLAC
EDIS SIHT NO DELLATSNI DRAC RETHGUAD
1KS
1
2KS
Z1LAVE3012PIH
1
B.veR Z1LAVEBM4_3012PIH
FIGURE 17. BOTTOM LAYER
RO
9
Z1LAVE4012PIH
9
FIGURE 18. BOTTOM SILKSCREEN
AN1896 Rev 0.00
November 13, 2013
Page 17 of 19
HIP2103_4MBEVAL1Z
BOM, HIP2103_4MBEVAL1Z
PART NUMBER
QTY
REF DES
1514-2
2
GND1, GND2
1725656
4
1725669
MANUFACTURER
DESCRIPTION
KEYSTONE
Test Point Turret 0.150 Pad 0.100 Thole
TB4, TB8-TB10
PHOENIX-CONTACT
100 Mil Micro-Pitch Terminal Block
2
TB5, TB6
PHOENIX-CONTACT
100 Mil Micro-Pitch Terminal Block
1729018
2
TB1, TB7
PHOENIX-CONTACT
200 Mil PCB Connector Terminal Block
3299W-1-103-LF
1
R1
BOURNS
TRIMMER POTENTIOMETER (RoHS COMPLIANT)
5000
11
HB, VCC, VDD, G-HO, G-LO,
VBAT, VCEN, VDEN, HI-IN,
LI-IN, PHASE
KEYSTONE
Miniature Red Test Point 0.100 Pad 0.040 Thole
555165-1
1
J1
TYCO
Phone Jack Connector
597-3111-402
4
LED0-LED3
Dialight
Surface Mount Red LED
B3S-1002
3
RESET, SLEEP, START/STOP
OMRON
Momentary Pushbutton Tactile SMT Switch
BAS70T-7-F
2
D2, D3
DIODES
70V, 150mW SCHOTTKY BARRIER DIODE
BAW56
4
S1-S4
RECTRON-SEMI
Dual 1N4148 Common Anode Diode
C3225X7S1H106K
2
C13, C14
TDK
Ceramic Chip Cap
CD74HC125M
1
U3
Texas Instruments
Quad Tri-State Buffer
CONN-1X9
2
SK1, SK2
Generic
Inline 9 pins x 0.1 inch Connector Strip
CSTCE10M5G55
1
U1
MURATA
Piezoelectric Resonator
GRM21BR71C475KA73L
4
C3-C6
MURATA
CERAMIC CAP
GT11MSCBETR
2
SW3, SW4
C&K
SPDT On-None-On SM Ultraminiature Toggle Switch
H1045-00103-50V10
2
C2, C7
GENERIC
Multilayer Cap
H1045-00473-25V10
1
C1
GENERIC
Multilayer Cap
H1045-OPEN
4
C9-C12
GENERIC
Multilayer Cap
H1046-00104-50V10
1
C15
GENERIC
Multilayer Cap
H1082-00225-100V10
1
C8
GENERIC
Ceramic Chip Cap
H2511-00R00-1/16W
3
R23, R34, R35
GENERIC
Thick Film Chip Resistor
H2511-01000-1/16W1
2
R30, R33
GENERIC
Thick Film Chip Resistor
H2511-01001-1/16W1
9
R6, R10, R12, R14, R16, R18, GENERIC
R20, R22, R24
Thick Film Chip Resistor
H2511-01002-1/10W1
4
R25, R27-R29
GENERIC
Thick Film Chip Resistor
H2511-01002-1/16W1
8
R2, R3, R5, R8, R11, R13,
R15, R17
GENERIC
Thick Film Chip Resistor
H2511-02001-1/16W1
1
R9
GENERIC
Thick Film Chip Resistor
H2511-04700-1/16W1
1
R7
GENERIC
Thick Film Chip Resistor
H2511-ROPEN-OPEN
3
R4, R19, R21
GENERIC
Thick Film Chip Resistor
JUMPER-3-100
1
J2
GENERIC
Three Pin Jumper
PIC18F2431S0
1
U2
Microchip
Flash Microcontroller
S1B
1
D1
VISHAY
1A, 100V Generic Rectifier Diode
SD06H0SK
1
SW5
C&K
SD Series Low Profile DIP Switch 6 Pos SPST
SI7430DP
2
Q1, Q2
VISHAY
N-Channel 150V, 26A WFET
AN1896 Rev 0.00
November 13, 2013
Page 18 of 19
Notice
1.
Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for
the incorporation or any other use of the circuits, software, and information in the design of your product or system. Renesas Electronics disclaims any and all liability for any losses and damages incurred by
you or third parties arising from the use of these circuits, software, or information.
2.
Renesas Electronics hereby expressly disclaims any warranties against and liability for infringement or any other claims involving patents, copyrights, or other intellectual property rights of third parties, by or
arising from the use of Renesas Electronics products or technical information described in this document, including but not limited to, the product data, drawings, charts, programs, algorithms, and application
examples.
3.
No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others.
4.
You shall not alter, modify, copy, or reverse engineer any Renesas Electronics product, whether in whole or in part. Renesas Electronics disclaims any and all liability for any losses or damages incurred by
5.
Renesas Electronics products are classified according to the following two quality grades: “Standard” and “High Quality”. The intended applications for each Renesas Electronics product depends on the
you or third parties arising from such alteration, modification, copying or reverse engineering.
product’s quality grade, as indicated below.
"Standard":
Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic
equipment; industrial robots; etc.
"High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control (traffic lights); large-scale communication equipment; key financial terminal systems; safety control equipment; etc.
Unless expressly designated as a high reliability product or a product for harsh environments in a Renesas Electronics data sheet or other Renesas Electronics document, Renesas Electronics products are
not intended or authorized for use in products or systems that may pose a direct threat to human life or bodily injury (artificial life support devices or systems; surgical implantations; etc.), or may cause
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liability for any damages or losses incurred by you or any third parties arising from the use of any Renesas Electronics product that is inconsistent with any Renesas Electronics data sheet, user’s manual or
other Renesas Electronics document.
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When using Renesas Electronics products, refer to the latest product information (data sheets, user’s manuals, application notes, “General Notes for Handling and Using Semiconductor Devices” in the
reliability handbook, etc.), and ensure that usage conditions are within the ranges specified by Renesas Electronics with respect to maximum ratings, operating power supply voltage range, heat dissipation
characteristics, installation, etc. Renesas Electronics disclaims any and all liability for any malfunctions, failure or accident arising out of the use of Renesas Electronics products outside of such specified
ranges.
7.
Although Renesas Electronics endeavors to improve the quality and reliability of Renesas Electronics products, semiconductor products have specific characteristics, such as the occurrence of failure at a
certain rate and malfunctions under certain use conditions. Unless designated as a high reliability product or a product for harsh environments in a Renesas Electronics data sheet or other Renesas
Electronics document, Renesas Electronics products are not subject to radiation resistance design. You are responsible for implementing safety measures to guard against the possibility of bodily injury, injury
or damage caused by fire, and/or danger to the public in the event of a failure or malfunction of Renesas Electronics products, such as safety design for hardware and software, including but not limited to
redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult
and impractical, you are responsible for evaluating the safety of the final products or systems manufactured by you.
8.
Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. You are responsible for carefully and
sufficiently investigating applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive, and using Renesas Electronics
products in compliance with all these applicable laws and regulations. Renesas Electronics disclaims any and all liability for damages or losses occurring as a result of your noncompliance with applicable
laws and regulations.
9.
Renesas Electronics products and technologies shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws
or regulations. You shall comply with any applicable export control laws and regulations promulgated and administered by the governments of any countries asserting jurisdiction over the parties or
transactions.
10. It is the responsibility of the buyer or distributor of Renesas Electronics products, or any other party who distributes, disposes of, or otherwise sells or transfers the product to a third party, to notify such third
party in advance of the contents and conditions set forth in this document.
11. This document shall not be reprinted, reproduced or duplicated in any form, in whole or in part, without prior written consent of Renesas Electronics.
12. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products.
(Note 1)
“Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its directly or indirectly controlled subsidiaries.
(Note 2)
“Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.
(Rev.4.0-1 November 2017)
http://www.renesas.com
SALES OFFICES
Refer to "http://www.renesas.com/" for the latest and detailed information.
Renesas Electronics America Inc.
1001 Murphy Ranch Road, Milpitas, CA 95035, U.S.A.
Tel: +1-408-432-8888, Fax: +1-408-434-5351
Renesas Electronics Canada Limited
9251 Yonge Street, Suite 8309 Richmond Hill, Ontario Canada L4C 9T3
Tel: +1-905-237-2004
Renesas Electronics Europe Limited
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K
Tel: +44-1628-651-700, Fax: +44-1628-651-804
Renesas Electronics Europe GmbH
Arcadiastrasse 10, 40472 Düsseldorf, Germany
Tel: +49-211-6503-0, Fax: +49-211-6503-1327
Renesas Electronics (China) Co., Ltd.
Room 1709 Quantum Plaza, No.27 ZhichunLu, Haidian District, Beijing, 100191 P. R. China
Tel: +86-10-8235-1155, Fax: +86-10-8235-7679
Renesas Electronics (Shanghai) Co., Ltd.
Unit 301, Tower A, Central Towers, 555 Langao Road, Putuo District, Shanghai, 200333 P. R. China
Tel: +86-21-2226-0888, Fax: +86-21-2226-0999
Renesas Electronics Hong Kong Limited
Unit 1601-1611, 16/F., Tower 2, Grand Century Place, 193 Prince Edward Road West, Mongkok, Kowloon, Hong Kong
Tel: +852-2265-6688, Fax: +852 2886-9022
Renesas Electronics Taiwan Co., Ltd.
13F, No. 363, Fu Shing North Road, Taipei 10543, Taiwan
Tel: +886-2-8175-9600, Fax: +886 2-8175-9670
Renesas Electronics Singapore Pte. Ltd.
80 Bendemeer Road, Unit #06-02 Hyflux Innovation Centre, Singapore 339949
Tel: +65-6213-0200, Fax: +65-6213-0300
Renesas Electronics Malaysia Sdn.Bhd.
Unit 1207, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia
Tel: +60-3-7955-9390, Fax: +60-3-7955-9510
Renesas Electronics India Pvt. Ltd.
No.777C, 100 Feet Road, HAL 2nd Stage, Indiranagar, Bangalore 560 038, India
Tel: +91-80-67208700, Fax: +91-80-67208777
Renesas Electronics Korea Co., Ltd.
17F, KAMCO Yangjae Tower, 262, Gangnam-daero, Gangnam-gu, Seoul, 06265 Korea
Tel: +82-2-558-3737, Fax: +82-2-558-5338
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