IRF510

IRF510 Data Sheet November 1999 File Number 1573.4 5.6A, 100V, 0.540 Ohm, N-Channel Power MOSFET This N-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA17441. Features • 5.6A, 100V • rDS(ON) = 0.540Ω • Single Pulse Avalanche Energy Rated • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Ordering Information PART NUMBER IRF510 PACKAGE TO-220AB BRAND IRF510 Symbol D NOTE: When ordering, include the entire part number. G S Packaging JEDEC TO-220AB SOURCE DRAIN GATE DRAIN (FLANGE) 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 IRF510 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified IRF510 100 100 5.6 4 20 ±20 43 0.29 19 -55 to 175 300 260 UNITS V V A A A V W W/oC mJ oC oC oC Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS Operating and Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ , TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 150oC. Electrical Specifications PARAMETER TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS ID(ON) IGSS rDS(ON) gfs td(ON) tr td(OFF) tf Qg(TOT) Qgs Qgd CISS COSS CRSS LD Measured From the Contact Screw On Tab To Center of Die Measured From the Drain Lead, 6mm (0.25in) From Package to Center of Die Modified MOSFET Symbol Showing the Internal Devices Inductances D LD G LS S TEST CONDITIONS VGS = 0V, ID = 250µA, (Figure 10) VGS = VDS, ID = 250µA VDS = 95V, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 150oC VDS > ID(ON) x rDS(ON)MAX , VGS = 10V (Figure 7) VGS = ±20V VGS = 10V, ID = 3.4A (Figures 8, 9) VGS = 50V, ID = 3.4A (Figure 12) ID ≈ 5.6A, RGS = 24Ω , VDD = 50V, RL = 9Ω , VDD = 50V, VGS = 10V MOSFET switching times are essentially independent of operating temperature VGS = 10V, ID = 5.6A, VDS = 0.8 x Rated BVDSS, IG(REF) = 1.5mA (Figure 14) Gate charge is essentially independent of operating temperature. VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) MIN 100 2.0 5.6 1.3 - TYP 0.4 2.0 8 25 15 12 5.0 2.0 3.0 135 80 20 3.5 MAX 4.0 25 250 ±100 0.54 12 63 7 59 30 - UNITS V V µA µA A nA Ω S ns ns ns ns nC nC nC pF pF pF nH Drain to Source Breakdown Voltage Gate to Threshold Voltage Zero-Gate Voltage Drain Current On-State Drain Current (Note 2) Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain “Miller” Charge Input Capacitance Output Capacitance Reverse-Transfer Capacitance Internal Drain Inductance - 4.5 - nH Internal Source Inductance LS Measured From The Source Lead, 6mm (0.25in) From Header to Source Bonding Pad - 7.5 - nH Junction to Case Junction to Ambient RθJC RθJA Free air operation - - 3.5 80 oC/W oC/W 2 IRF510 Source to Drain Diode Specifications PARAMETER Continuous Source to Drain Current Pulse Source to Drain Current (Note 3) SYMBOL ISD ISDM Test Conditions Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode D MIN - TYP - MAX 5.6 20 UNITS A A G S Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovered Charge NOTES: VSD trr QRR TJ = 25oC, ISD = 5.6A, VGS = 0V (Figure 13) TJ = 25oC, ISD = 5.6A, dISD/dt = 100A/µs TJ = 25oC, ISD = 5.6A, dISD/dt = 100A/µs 4.6 0.17 96 0.4 2.5 200 0.83 V ns µC 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 25V, start TJ = 25oC, L = 910µH, RG = 25Ω, peak IAS = 5.6A. Typical Performance Curves Unless Otherwise Specified 1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 0.6 0.4 0.2 0 0 25 10 ID, DRAIN CURRENT (A) 125 50 75 100 TC , CASE TEMPERATURE (oC) 8 6 4 2 0 150 175 25 50 75 100 125 150 175 TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 10 THERMAL IMPEDANCE (oC/W) ZθJC, TRANSIENT 0.5 1 0.2 0.1 0.05 0.1 0.02 0.01 SINGLE PULSE PDM NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC + TC 0.01 10-5 10-4 0.1 10-2 10-3 t1, RECTANGULAR PULSE DURATION (S) 1 10 t1 t2 FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE 3 IRF510 Typical Performance Curves Unless Otherwise Specified 100 OPERATION IN THIS REGION IS LIMITED BY rDS(ON) ID, DRAIN CURRENT (A) 10µs 10 100µs 1ms 1 TC = 25oC TJ = 175oC SINGLE PULSE 1 10 102 103 (Continued) 10 VGS = 10V 8 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 8V 6 VGS = 7V 4 VGS = 6V 2 VGS = 5V 0 0 10 20 30 VGS = 4V 40 50 VDS , DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) 0.1 VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS VGS = 10V ID, DRAIN CURRENT (A) 8 VGS = 8V 6 VGS = 7V 4 VGS = 6V 2 VGS = 5V 0 0 VGS = 4V 2 4 6 8 VDS, DRAIN TO SOURCE VOLTAGE (V) 10 ID(ON), ON-STATE DRAIN CURRENT (A) 10 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 10 VDS ≥ 50V PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 1 TJ = 175oC TJ = 25oC 0.1 10-2 0 2 4 6 8 VGS , GATE TO SOURCE VOLTAGE (V) 10 FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS 5 NORMALIZED ON RESISTANCE PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 3.0 rDS(ON), DRAIN TO SOURCE 4 ON RESISTANCE (Ω) 2.4 ID = 3.4A, VGS = 10V PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 3 1.8 2 VGS = 10V VGS = 20V 1 1.2 0.6 0 0 4 8 12 16 20 ID, DRAIN CURRENT (A) 0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 TJ, JUNCTION TEMPERATURE (oC) FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 4 IRF510 Typical Performance Curves Unless Otherwise Specified 1.25 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250µA (Continued) 500 VGS = 0V, f = 1MHz CISS = CGS + CGD 400 CRSS = CGD COSS ≈ CDS + CGD 300 1.05 0.95 C, CAPACITANCE (pF) 1.15 200 CISS COSS 0.85 100 CRSS 0.75 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 0 1 2 5 10 2 5 102 VDS, DRAIN TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 2.5 gfs, TRANSCONDUCTANCE (S) 2.0 TJ = 25oC ISD, SOURCE TO DRAIN CURRENT (A) PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDS ≥ 50V 100 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 10 1.5 TJ = 175oC 1.0 1 TJ = 175oC 0.5 TJ = 25oC 0.1 0 0 0 2 4 6 ID, DRAIN CURRENT (A) 8 10 0.4 0.8 1.2 1.6 VSD, SOURCE TO DRAIN VOLTAGE (V) 2.0 FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 20 VGS, GATE TO SOURCE VOLTAGE (V) ID = 3.4A 16 VDS = 80V VDS = 50V VDS = 20V 12 8 4 0 0 2 4 6 Qg, GATE CHARGE (nC) 8 10 FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 5 IRF510 Test Circuits and Waveforms VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP VDS VDD + 0V IAS 0.01Ω 0 tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON td(ON) tr RL VDS + tOFF td(OFF) tf 90% 90% RG DUT - VDD 0 10% 90% 10% VGS VGS 0 10% 50% PULSE WIDTH 50% FIGURE 17. SWITCHING TIME TEST CIRCUIT VDS (ISOLATED SUPPLY) FIGURE 18. RESISTIVE SWITCHING WAVEFORMS CURRENT REGULATOR VDD SAME TYPE AS DUT Qg(TOT) Qgd Qgs D VDS VGS 12V BATTERY 0.2µF 50kΩ 0.3µF G DUT 0 IG(REF) 0 IG CURRENT SAMPLING RESISTOR S VDS ID CURRENT SAMPLING RESISTOR IG(REF) 0 FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORM 6 IRF510 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. 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