ISL24002IRTZ

ISL24002IRTZ

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    WFQFN32_EP

  • 描述:

    IC REF VOLT GEN TFT LCD 32-TQFN

  • 数据手册
  • 价格&库存
ISL24002IRTZ 数据手册
ISL24002 ® Data Sheet July 14, 2008 14-Channel Static TFT LCD Reference Voltage Generator with 1-Channel VCOM FN6737.0 Features • 18V Output Range The ISL24002 is a 14-Channel static reference voltage generator with a 1-Channel VCOM buffer. • Rail-to-Rail Input/Output Voltage Range The ISL24002 is available in 32 Ld thermal enhanced TQFN package. It is specified for operation over the -40°C to +85°C industrial temperature range. • 14-Output Channels Each with 30mA Peak Output Current • 1-Channel VCOM with 100mA Peak Output Current Ordering Information • 32 Ld TQFN Package • TFT-LCD Panels Pinout IN4 AVDD IN5 IN6 IN7 ISL24002 (32 LD TQFN) TOP VIEW 32 31 30 29 28 27 26 25 OUT1 1 24 OUT14 OUT2 2 23 OUT13 OUT3 3 22 OUT12 OUT4 4 21 OUT11 THERMAL PAD 6 19 OUT9 OUT7 7 18 OUT8 IN14 8 17 OUTCOM 9 10 11 12 13 14 15 16 INPCOM OUT6 IN8 20 OUT10 IN9 5 IN10 OUT5 GND *Add “-T13” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Applications IN3 -40 to +85 32 LD TQFN MDP0051 • Pb-Free (RoHS Compliant) IN11 PKG. DWG. # IN2 ISL24002IRTZ* ISL240 02IRTZ PACKAGE (Pb-Free) IN12 PART MARKING IN1 TEMP. RANGE (°C) IN13 PART NUMBER (Note) • 14-Input Channels THERMAL PAD CONNECTS TO GND 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2008. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. ISL24002 Absolute Maximum Ratings (TA = +25°C) Thermal Information Driver Positive Supply Voltage Range (AVDD). . . . . . . . . . . . . .+19V Input Voltage Range . . . . . . . . . . . . . . . . . . . . -0.5V to AVDD + 0.5V Output Voltage Range . . . . . . . . . . . . . . . . . . . -0.5V to AVDD + 0.5V IOUT (Channel Reference Buffers) . . . . . . . . . . . . . . . . . . . . . 30mA IOUT(VCOM Buffer) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3000V Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V Charged Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . .1500V Thermal Resistance (Typical, Note 1) θJA (°C/W) 32 Lead TQFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Junction Temperature Range . . . . . . . . . . . . . . . . . . . . -40° to +135°C Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . -40° to +85°C Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . -65°C to +150°C Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. Electrical Specifications PARAMETER AVDD = 15V, TA = +25°C, Unless Otherwise Specified. DESCRIPTION CONDITION MIN (Note 2) TYP MAX (Note 2) UNITS 0.08 0.15 V 2 15 mV 2 50 REFERENCE BUFFER SECTION VOL Low Level Output Voltage VOH High Level Output Voltage IL= ±5mA VOS Input Offset Voltage VIN = 1.9V IL= ±5mA 14.82 14.92 V Input Leakage Current VIN = GMD, AVDD SR Slew Rate Outputs 1 to 14, Measured 20% to 80% 4.5 V/µs BW -3dB Bandwidth Output 1 to Output 14 RL = 10kΩ, ROUT = 0Ω, CL = 10pF 5.5 MHz Short Circuit Current Output 1 to Output 14 ±200 mA Power Supply Rejection Ratio VIN = 1.9V, AVDD = 10V, 15V 80 dB IL ISC PSRR nA OUTCOM AMPLIFIER SECTION VOL Low Level Output Voltage VOH High Level Output Voltage IL= ±5mA VOS Input Offset Voltage VIN = 1.9V 1 18 mV Input Leakage Current VIN = GND, AVDD 2 50 nA IL IL= ±5mA 0.05 14.85 0.15 14.92 V V SR Slew Rate OUTCOM, Measured 20% to 80% 40 V/µs BW -3dB Bandwidth OUTCOM RL = 10kΩ, ROUT = 0Ω, CL = 10pF 15 MHz ISC Short Circuit Current OUTCOM ±480 mA Power Supply Rejection Ratio VIN = 1.9V, AVDD = 10V, 15V 80 dB Thermal Shutdown Temperature Package temperature where the internal die will automatically shut down until it cools to below its maximum junction temperature. 140 °C PSRR TTS POWER SUPPLY SECTION Power Supply I(AVDD) Recommended Operating Voltage (AVDD) Supply Current 5 10 18 V 15 mA NOTES: 2. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 2 FN6737.0 July 14, 2008 ISL24002 Pin Descriptions PIN NUMBER PIN NAME EQUIVALENT CIRCUIT 1 OUT1 2 Analog Output 1 2 OUT2 2 Analog Output 2 3 OUT3 2 Analog Output 3 4 OUT4 2 Analog Output 4 5 OUT5 2 Analog Output 5 6 OUT6 2 Analog Output 6 7 OUT7 2 Analog Output 7 8 IN14 1 Analog Input 14 9 IN13 1 Analog Input 13 10 IN12 1 Analog Input 12 11 IN11 1 Analog Input 11 12 GND 13 IN10 1 Analog Input 10 14 IN9 1 Analog Input 9 15 IN8 1 Analog Input 8 16 INPCOM 1 Analog Input 17 OUTCOM 2 Analog Output 18 OUT8 2 Analog Output 8 19 OUT9 2 Analog Output 9 20 OUT10 2 Analog Output 10 21 OUT11 2 Analog Output 11 22 OUT12 2 Analog Output 12 23 OUT13 2 Analog Output 13 24 OUT14 2 Analog Output 14 25 IN7 1 Analog Input 7 26 IN6 1 Analog Input 6 27 IN5 1 Analog Input 5 28 AVDD 29 IN4 1 Analog Input 4 30 IN3 1 Analog Input 3 31 IN2 1 Analog Input 2 32 IN1 1 Analog Input 1 AVDD IN DESCRIPTION Ground Analog Power AVDD OUT GND Inputs 1 through 14, and INPCOM CIRCUIT 1 3 GND Outputs 1 through 14, and OUTCOM CIRCUIT 2 FN6737.0 July 14, 2008 ISL24002 Functional Block Diagram AVDD IN1 OUT1 IN2 OUT2 IN3 OUT3 IN4 OUT4 IN5 OUT5 IN6 OUT6 INPCOM + - OUTCOM IN7 OUT7 IN8 OUT8 IN9 OUT9 IN10 OUT10 IN11 OUT11 IN12 OUT12 IN13 OUT13 IN14 OUT14 GND Application Information Product Description The ISL24002 is a 14-Channel static reference voltage generator with a 1-Channel VCOM buffer. Each input channel consists of a static voltage reference generator. All channel outputs are capable of swinging rail-to-rail. The VCOM buffer is capable of driving a large peak current into highly capacitive loads while ensuring a rail-to-rail voltage swing. The ISL24002 is available in a 32 Ld thermal enhanced TQFN package. It is specified for operation over the -40°C to +85°C industrial temperature range. 4 Supply Voltage Range and Input Compatibility The ISL24002 is designed for operation on supply voltages from 5V to 18V. Each channel input pin and INPCOM can be driven rail-to-rail. Power Supply Bypassing and Printed Circuit Board Layout Good printed circuit board layout is necessary for optimum performance. A low impedance and clean analog ground plane should be used for the ISL24002. The traces from the ground pin to the ground plane must be very short. The thermal pad should be connected to the analog ground plane. Trace length should be as short as possible and all power supply pins must be well bypassed. FN6737.0 July 14, 2008 ISL24002 Test Circuit AVDD GND 0.1µF IN1 4.7µF OUT1 ROUT RL ISL24002 IN14 OUT14 INPCOM OUTCOM CL FIGURE 1. TEST CIRCUIT All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 5 FN6737.0 July 14, 2008 ISL24002 TQFN (Thin Quad Flat No-Lead) Package Family MDP0051 A D N (N-1) (N-2) B 1 2 3 MILLIMETERS PIN #1 I.D. MARK E (N/2) 2X 0.075 C 2X 0.075 C TOP VIEW N LEADS TQFN (THIN QUAD FLAT NO-LEAD) PACKAGE FAMILY (COMPLIANT TO JEDEC MO-220) 0.10 M C A B (N-2) (N-1) N b L SYMBOL TQFN 28 TQFN 32 TOLERANCE NOTES A 0.75 0.75 ±0.05 - A1 0.02 0.02 +0.03/-0.02 - b 0.325 0.25 ±0.02 - c 0.20 0.20 Reference - D 6.00 5.00 Basic - D2 4.70 3.10 Reference 8 E 6.00 5.00 Basic - E2 4.70 3.10 Reference 8 e 0.65 0.50 Basic - L 0.40 0.40 ±0.05 - N 28 32 Reference 4 ND 7 8 Reference 6 NE 7 8 Reference 5 Rev 1 2/07 PIN #1 I.D. 3 1 2 3 NOTES: 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Tiebar view shown is a non-functional feature. 3. Bottom-side pin #1 I.D. is a diepad chamfer as shown. 4. N is the total number of terminals on the device. (E2) 5. NE is the number of terminals on the “E” side of the package (or Y-direction). (N/2) NE 5 7 (D2) 6. ND is the number of terminals on the “D” side of the package (or X-direction). ND = (N/2)-NE. 7. Inward end of terminal may be square or circular in shape with radius (b/2) as shown. 8. If two values are listed, multiple exposed pad options are available. Refer to device-specific datasheet. BOTTOM VIEW 9. Package outline drawing is generic. 0.10 C e C SEATING PLANE 0.08 C N LEADS & EXPOSED PAD SEE DETAIL "X" SIDE VIEW (c) C 2 A (L) A1 N LEADS DETAIL X 6 FN6737.0 July 14, 2008
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