ISL28136

ISL28136 Data Sheet April 5, 2011 FN6153.5 5MHz, Single Precision Rail-to-Rail Input-Output (RRIO) Op Amp The ISL28136 is a low-power single operational amplifier optimized for single supply operation from 2.4V to 5.5V, allowing operation from one lithium cell or two Ni-Cd batteries. This device features a gain-bandwidth product of 5MHz and is unity-gain stable with a -3dB bandwidth of 13MHz. This device features an Input Range Enhancement Circuit (IREC), which enables it to maintain CMRR performance for input voltages greater than the positive supply. The input signal is capable of swinging 0.25V above the positive supply and to the negative supply with only a slight degradation of the CMRR performance. The output operation is rail-to-rail. The part typically draws less than 1mA supply current while meeting excellent DC accuracy, AC performance, noise and output drive specifications. Operation is guaranteed over -40°C to +125°C temperature range. Features • 5MHz Gain bandwidth product @ AV = 100 • 13MHz -3dB unity gain bandwidth • 900µA typical supply current • 150µV maximum offset voltage (8 Ld SOIC) • 5nA typical input bias current • Down to 2.4V single supply voltage range • Rail-to-rail input and output • Enable pin • -40°C to +125°C operation • Pb-free (RoHS compliant) Applications • Low-end audio • 4mA to 20mA current loops • Medical devices • Sensor amplifiers Ordering Information PART NUMBER (Notes 2, 3) ISL28136FHZ-T7 (Note 1) ISL28136FHZ-T7A (Note 1) ISL28136FBZ ISL28136FBZ-T7 (Note 1) PART MARKING GABP GABP 28136 FBZ 28136 FBZ PACKAGE (Pb-Free) 6 Ld SOT-23 6 Ld SOT-23 8 Ld SOIC 8 Ld SOIC PKG. DWG. # P6.064A P6.064A M8.15E M8.15E • ADC buffers • DAC output amplifiers Pinouts ISL28136 (6 LD SOT-23) TOP VIEW OUT 1 V- 2 IN+ 3 +6 V+ 5 EN 4 INNC 1 IN- 2 IN+ 3 V- 4 + ISL28136 (8 LD SOIC) TOP VIEW 8 EN 7 V+ 6 OUT 5 NC 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL28136. For more information on MSL please see techbrief TB363. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright © Intersil Americas Inc. 2007-2009, 2011. All Rights Reserved. Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. ISL28136 Absolute Maximum Ratings (TA = +25°C) Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75V Supply Turn-on Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/µs Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V Thermal Information Thermal Resistance θJA (°C/W) 6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 230 8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 110 Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data established by characterization. DESCRIPTION CONDITIONS MIN (Note 4) TYP MAX (Note 4) UNIT PARAMETER DC SPECIFICATIONS VOS Input Offset Voltage 8 Ld SOIC 6 Ld SOT-23 -150 -270 -400 -450 ±10 ±10 150 270 400 450 µV µV µV/°C Δ V OS --------------ΔT IOS IB VCM CMRR PSRR AVOL Input Offset Voltage vs Temperature Input Offset Current TA = -40°C to +85°C Input Bias Current TA = -40°C to +85°C Common-Mode Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain Guaranteed by CMRR VCM = 0V to 5V V+ = 2.4V to 5.5V VO = 0.5V to 4V, RL = 100kΩ to VCM VO = 0.5V to 4V, RL = 1kΩ to VCM -10 -15 -35 -40 0 90 85 90 85 600 500 0.4 0 5 10 15 35 40 5 114 99 1770 140 3 70 4.99 4.98 4.92 4.89 0.8 4.994 4.94 0.9 10 RL = 10Ω to VCM 48 45 56 1.1 1.4 14 16 6 10 90 110 nA nA V dB dB V/mV V/mV mV mV V V mA µA mA VOUT Maximum Output Voltage Swing Output low, RL = 100kΩ to VCM Output low, RL = 1kΩ to VCM Output high, RL = 100kΩ to VCM Output high, RL = 1kΩ to VCM IS,ON IS,OFF IO+ Supply Current, Enabled Supply Current, Disabled Short-Circuit Output Source Current Per Amp 2 FN6153.5 April 5, 2011 ISL28136 Electrical Specifications V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data established by characterization. (Continued) DESCRIPTION Short-Circuit Output Sink Current Supply Operating Range EN Pin High Level EN Pin Low Level EN Pin Input High Current EN Pin Input Low Current VEN = V+ VEN = V1 16 CONDITIONS RL = 10Ω to VCM V+ to VMIN (Note 4) 50 45 2.4 2 0.8 1.5 1.6 25 30 TYP 55 5.5 MAX (Note 4) UNIT mA V V V µA nA PARAMETER IOVSUPPLY VENH VENL IENH IENL AC SPECIFICATIONS GBW Unity Gain Bandwidth eN Gain Bandwidth Product -3dB Bandwidth Input Noise Voltage Peak-to-Peak Input Noise Voltage Density iN CMRR PSRR+ to 120Hz PSRRto 120Hz Input Noise Current Density Input Common Mode Rejection Ratio Power Supply Rejection Ratio (V+) Power Supply Rejection Ratio (V-) AV = 100, RF = 100kΩ, RG = 1kΩ to VCM AV = 1, RF = 0Ω, RL = 10kΩ to VCM, VOUT = 10mVP-P f = 0.1Hz to 10Hz, RL = 10kΩ to VCM fO = 1kHz, RL = 10kΩ to VCM fO = 10kHz, RL = 10kΩ to VCM fO = to 120Hz; VCM = 1VP-P, RL = 1kΩ to VCM V+, V- = ±1.2V and ±2.5V, VSOURCE = 1VP-P, RL = 1kΩ to VCM V+, V- = ±1.2V and ±2.5V VSOURCE = 1VP-P, RL = 1kΩ to VCM 5 13 0.4 15 0.35 -90 -88 -105 MHz MHz µVP-P nV/√Hz pA/√Hz dB dB dB TRANSIENT RESPONSE SR tr, tf, Large Signal Slew Rate Rise Time, 10% to 90%, VOUT Fall Time, 90% to 10%, VOUT tr, tf, Small Signal Rise Time, 10% to 90%, VOUT Fall Time, 90% to 10%, VOUT tEN VOUT = ±1.5V; Rf = 50kΩ, RG = 50kΩ to VCM AV = +2, VOUT = 2VP-P, Rg = Rf = RL = 1kΩ to VCM AV = +2, VOUT = 2VP-P, Rg = Rf = RL = 1kΩ to VCM AV = +2, VOUT = 10mVP-P, Rg = Rf = RL = 1kΩ to VCM AV = +2, VOUT = 10mVP-P, Rg = Rf = RL = 1kΩ to VCM ±1.9 0.6 0.5 65 62 5 0.3 V/µs µs µs ns ns µs µs Enable to Output Turn-on Delay Time, 10% VEN = 5V to 0V, AV = +2, EN to 10% VOUT Rg = Rf = RL = 1kΩ to VCM Enable to Output Turn-off Delay Time, 10% VEN = 0V to 5V, AV = +2, Rg = Rf = RL = 1kΩ to VCM EN to 10% VOUT NOTE: 4. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. 3 FN6153.5 April 5, 2011 ISL28136 Typical Performance Curves 15 NORMALIZED GAIN (dB) 10 5 0 -5 -10 -15 100 V+ = 5V RL = 1 k CL = 16.3pF AV = +2 VOUT = 10mVP-P 1k Rf = Rg = 1k Rf = Rg = 100k Rf = Rg = 10k V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open 1 0 NORMALIZED GAIN (dB) -1 -2 -3 -4 -5 -6 -7 -8 10M 100M VOUT = 1V VOUT = 100mV VOUT = 50mV VOUT = 10mV V+ = 5V RL = 1k CL = 16.3pF AV = +1 VOUT = 10mVP-P 100k 1M FREQUENCY (Hz) 10M 100M 10k 100k 1M FREQUENCY (Hz) -9 10k FIGURE 1. GAIN vs FREQUENCY vs FEEDBACK RESISTOR VALUES Rf/Rg FIGURE 2. GAIN vs FREQUENCY vs VOUT, RL = 1k 1 0 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) -1 -2 -3 -4 -5 -6 -7 -8 VOUT = 1V VOUT = 100mV VOUT = 50mV VOUT = 10mV V+ = 5V RL = 10k CL = 16.3pF AV = +1 VOUT = 10mVP-P 100k 1M FREQUENCY (Hz) 10M 100M 1 0 -1 -2 -3 -4 -5 -6 -7 -8 VOUT = 1V VOUT = 100mV VOUT = 50mV VOUT = 10mV V + = 5V RL = 100k CL = 16.3pF AV = +1 VOUT = 10mVP-P 100k 1M FREQUENCY (Hz) 10M 100M -9 10k -9 10k FIGURE 3. GAIN vs FREQUENCY vs VOUT, RL = 10k FIGURE 4. GAIN vs FREQUENCY vs VOUT, RL = 100k 1 0 NORMALIZED GAIN (dB) -1 -2 -3 -4 -5 -6 -7 -8 V+ = 5V CL = 16.3pF AV = +1 VOUT = 10mVP-P 100k 1M FREQUENCY (Hz) 10M 100M RL = 10k GAIN (dB) RL = 1k RL = 100k 70 60 50 40 30 20 10 0 AV = 1 AV = 1, Rg = INF, Rf = 0 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M AV = 10 AV = 10, Rg = 1k, Rf = 9.09k AV = 101 AV = 1001 AV = 1001, Rg = 1k, Rf = 1M AV = 101, Rg = 1k, Rf = 100k V+ = 5V CL = 16.3pF RL = 10k VOUT = 10mVP-P -9 10k -10 100 FIGURE 5. GAIN vs FREQUENCY vs RL FIGURE 6. FREQUENCY RESPONSE vs CLOSED LOOP GAIN 4 FN6153.5 April 5, 2011 ISL28136 Typical Performance Curves 1 0 NORMALIZED GAIN (dB) -1 -2 -3 -4 -5 -6 -7 -8 RL = 10k CL = 16.3pF AV = +1 VOUT = 10mVP-P 100k 1M FREQUENCY (Hz) 10M 100M V+ = 2.4V V+ = 5V NORMALIZED GAIN (dB) V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued) 8 7 6 5 4 3 2 1 0 -1 -2 -3 V+ = 5V -4 RL = 1k -5 A = +1 V -6 VOUT = 10mVP-P -7 -8 10k 100k CL = 51.7pF CL = 43.7pF CL = 37.7pF CL = 26.7pF CL = 16.7pF CL = 4.7pF -9 10k 1M FREQUENCY (Hz) 10M 100M FIGURE 7. GAIN vs FREQUENCY vs SUPPLY VOLTAGE FIGURE 8. GAIN vs FREQUENCY vs CL 20 0 -20 PSRR (dB) -40 -60 -80 -100 10 V+ = 2.4V, 5V RL = 1 k CL = 16.3pF AV = +1 VCM = 1VP-P 100 1k 10k 100k 1M 10M 20 0 -20 -40 -60 -80 -100 -120 10 100 1k 10k 100k 1M 10M V+, V- = ±1.2V R L = 1k CL = 16.3pF AV = +1 VSOURCE = 1VP-P PSRR- CMRR (dB) PSRR+ FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 9. CMRR vs FREQUENCY; V+ = 2.4V AND 5V FIGURE 10. PSRR vs FREQUENCY, V+, V- = ±1.2V PSRR (dB) PSRR- -60 PSRR+ -80 -100 -120 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M INPUT VOLTAGE NOISE (nV√Hz) V+, V- = ±2.5V 0 RL = 1 k CL = 16.3pF -20 AV = +1 VSOURCE = 1VP-P -40 20 100 V + = 5V RL = 1k CL = 16.3pF AV = +1 10 1 10 100 1k FREQUENCY (Hz) 10k 100k FIGURE 11. PSRR vs FREQUENCY, V+, V- = ±2.5V FIGURE 12. INPUT VOLTAGE NOISE DENSITY vs FREQUENCY 5 FN6153.5 April 5, 2011 ISL28136 Typical Performance Curves 10 INPUT CURRENT NOISE (pA√Hz) V+ = 5V RL = 1k CL = 16.3pF AV = +1 1 V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued) 0.5 0.4 0.3 INPUT NOISE (µV) 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 V + = 5V RL = 10k CL = 16.3pF Rg = 10, Rf = 100k AV = 10000 0.1 1 10 100 1k FREQUENCY (Hz) 10k 100k -0.5 0 1 2 3 4 5 6 7 8 9 10 TIME (s) FIGURE 13. INPUT CURRENT NOISE DENSITY vs FREQUENCY FIGURE 14. INPUT VOLTAGE NOISE 0.1Hz TO 10Hz 1.5 1.0 LARGE SIGNAL (V) SMALL SIGNAL (V) 0.5 0 -0.5 -1.0 -1.5 V+, V- = ±2.5V RL = 1 k CL = 16.3pF Rg = Rf = 10k AV = 2 VOUT = 1.5VP-P 0 1 2 3 4 5 6 TIME (µs) 7 8 9 10 0.026 0.024 0.022 0.020 0.018 0.016 0.014 0.012 0 0.5 1.0 V+, V- = ±2.5V RL = 1 k CL = 16.3pF Rg= Rf = 10k AV = 2 VOUT = 10mVP-P 1.5 2.0 2.5 TIME (µs) 3.0 3.5 4.0 FIGURE 15. LARGE SIGNAL STEP RESPONSE FIGURE 16. SMALL SIGNAL STEP RESPONSE 6 V-ENABLE 5 V-ENABLE (V) 4 3 2 1 0 -1 0 10 20 30 40 50 60 TIME (µs) 70 80 90 V + = 5V Rg = Rf = RL = 1k CL = 16.3pF AV = +2 VOUT = 1VP-P V-OUT 1.3 1.1 0.9 OUTPUT (V) 0.7 0.5 0.3 0.1 -0.1 100 100 80 60 40 VOS (µV) 20 0 -20 -40 -60 -80 -100 -1 0 1 V + = 5V RL = OPEN Rf = 100k, Rg = 100 AV = +1000 2 3 VCM (V) 4 5 6 FIGURE 17. ENABLE TO OUTPUT RESPONSE FIGURE 18. INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE 6 FN6153.5 April 5, 2011 ISL28136 Typical Performance Curves 100 80 60 CURRENT (µA) 40 I-BIAS (nA) 20 0 -20 -40 -60 -80 -100 -1 0 1 V+ = 5V RL = OPEN Rf = 100k, Rg = 100 AV = +1000 2 3 VCM (V) 4 5 6 1100 1000 900 800 700 600 -40 MAX MEDIAN V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued) 1200 N = 1150 MIN -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 19. INPUT OFFSET CURRENT vs COMMON-MODE INPUT VOLTAGE FIGURE 20. SUPPLY CURRENT ENABLED vs TEMPERATURE, V+, V- = ±2.5V 11 N = 1150 10 CURRENT (µA) 9 8 7 6 MIN 5 4 -40 -20 0 20 40 60 80 100 120 MEDIAN VOS (µV) MAX 400 300 200 100 0 -100 -200 -300 N = 1150 MAX MEDIAN MIN -400 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 21. SUPPLY CURRENT DISABLED vs TEMPERATURE, V+, V- = ±2.5V FIGURE 22. VOS vs TEMPERATURE, V+, V- = ±2.5V, SOT PACKAGE 300 250 200 150 VOS (µV) 100 50 0 -50 -100 -150 -200 -250 -40 -20 0 20 MIN 40 60 80 MEDIAN MAX N = 1150 400 300 200 VOS (µV) 100 0 -100 -200 -300 MIN N = 1150 -20 0 20 40 60 80 100 120 MEDIAN MAX 100 120 -400 -40 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 23. VOS vs TEMPERATURE, V+, V- = ±2.5V, SOIC PACKAGE FIGURE 24. VOS vs TEMPERATURE, V+, V- = ±1.2V, SOT PACKAGE 7 FN6153.5 April 5, 2011 ISL28136 Typical Performance Curves 300 250 200 150 50 0 -50 -100 -150 -200 -250 -40 -20 0 20 40 60 80 100 120 MIN MEDIAN IBIAS+ (nA) VOS (µV) 100 MAX V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued) N = 1150 30 25 20 15 10 5 0 -5 -10 -40 -20 0 MIN 20 40 60 80 TEMPERATURE (°C) N = 1150 100 120 MEDIAN MAX TEMPERATURE (°C) FIGURE 25. VOS vs TEMPERATURE, V+, V- = ±1.2VSOIC PACKAGE FIGURE 26. , IBIAS+ vs TEMPERATURE, V+, V- = ±2.5V 30 25 20 IBIAS- (nA) IBIAS+ (nA) 15 10 5 0 -5 -10 -40 N = 1150 -20 0 20 40 60 80 100 120 MIN MEDIAN MAX 15 10 5 0 -5 -10 -15 -20 -25 -40 -20 0 20 MIN 40 MEDIAN MAX N = 1150 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 27. IBIAS- vs TEMPERATURE, V+, V- = ±2.5V FIGURE 28. IBIAS+ vs TEMPERATURE, V+, V- = ±1.2V 20 15 10 IBIAS- (nA) 5 N = 1150 MAX 10 8 6 4 IOS (nA) MEDIAN 2 0 -2 MIN -4 -6 MIN N = 1150 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MEDIAN MAX 0 -5 -10 -15 -20 -25 -40 -20 0 20 40 60 80 100 120 -8 -40 TEMPERATURE (°C) FIGURE 29. IBIAS- vs TEMPERATURE, V+, V- = ±1.2V FIGURE 30. IOS vs TEMPERATURE, V+, V- = ±2.5V 8 FN6153.5 April 5, 2011 ISL28136 Typical Performance Curves 12 10 8 6 IOS (nA) 4 2 0 -2 -4 -6 -8 -40 -20 0 20 40 60 80 TEMPERATURE (°C) MIN 100 120 MEDIAN N = 1150 MAX CMRR (dB) V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued) 140 135 130 125 120 115 110 105 100 95 90 -40 -20 0 20 40 60 80 MIN N = 1150 100 120 TEMPERATURE (°C) MEDIAN MAX FIGURE 31. IOS vs TEMPERATURE, V+, V- = ±1.2V FIGURE 32. CMRR vs TEMPERATURE, VCM = -2.5V TO +2.5V, V+, V- = ±2.5V 120 115 MAX AVOL (V/mV) 110 PSRR (dB) 105 MEDIAN 100 95 MIN 90 -40 -20 0 20 40 60 80 TEMPERATURE (°C) N = 1150 100 120 4500 4000 3500 3000 2500 2000 1500 1000 500 0 -40 -20 0 20 MIN N = 1150 40 60 80 100 120 TEMPERATURE (°C) MEDIAN MAX FIGURE 33. PSRR vs TEMPERATURE, V+, V- = ±1.2V TO ±2.75V FIGURE 34. AVOL vs TEMPERATURE, V+, V- = ±2.5V, VO = -2V TO +2V, RL = 100k 200 180 MAX 160 AVOL (V/mV) 140 120 100 MIN 80 60 -40 N = 1150 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MEDIAN VOUT (V) 4.960 MAX 4.955 4.950 4.945 4.940 MIN 4.935 4.930 -40 MEDIAN N = 1150 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 35. AVOL vs TEMPERATURE, V+, V- = ±2.5V, VO = -2V TO +2V, RL = 1k FIGURE 36. VOUT HIGH vs TEMPERATURE, V+, V- = ±2.5V, RL = 1k 9 FN6153.5 April 5, 2011 ISL28136 Typical Performance Curves 75 70 MAX VOUT (m V) 65 60 MEDIAN 55 MIN 50 N = 1150 45 -40 -20 0 20 40 60 80 100 120 V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued) TEMPERATURE (°C) FIGURE 37. VOUT LOW vs TEMPERATURE, V+, V- = ±2.5V, RL = 1k Pin Descriptions ISL28136 (6 Ld SOT-23) ISL28136 (8 Ld SOIC) 1, 5 4 2 PIN NAME NC INFUNCTION Not connected inverting input V+ EQUIVALENT CIRCUIT IN- IN+ VCircuit 1 3 2 3 4 IN+ V- Non-inverting input Negative supply V+ See Circuit 1 CAPACITIVELY COUPLED ESD CLAMP VCircuit 2 1 6 OUT Output V+ OUT VCircuit 3 6 5 7 8 V+ EN Positive supply Chip enable See Circuit 2 V+ LOGIC PIN VCircuit 3 10 FN6153.5 April 5, 2011 ISL28136 Applications Information Introduction The ISL28136 is a single channel Bi-CMOS rail-to-rail input, output (RRIO) micropower precision operational amplifier. The part is designed to operate from a single supply 2.4V to 5.5V. The part has an input common mode range that extends 0.25V above the positive rail and down to the negative supply rail. The output operation can swing within about 3mV of the supply rails with a 100kΩ load. VIN RIN + RL VOUT FIGURE 38. INPUT CURRENT LIMITING Enable/Disable Feature The ISL28136 offers an EN pin that disables the device when pulled up to at least 2.0V. In the disabled state (output in a high impedance state), the part consumes typically 10µA at room temperature. By disabling the part, multiple ISL28136 parts can be connected together as a MUX. In this configuration, the outputs are tied together in parallel and a channel can be selected by the EN pin. The loading effects of the feedback resistors of the disabled amplifier must be considered when multiple amplifier outputs are connected together. Note that feed through from the IN+ to IN- pins occurs on any Mux Amp disabled channel where the input differential voltage exceeds 0.5V (e.g., active channel VOUT = 1V, while disabled channel VIN = GND), so the mux implementation is best suited for small signal applications. If large signals are required, use series IN+ resistors, or a large value RF, to keep the feed through current low enough to minimize the impact on the active channel. See“Limitations of the Differential Input Protection” on page 11 for more details. To disable the part, the user needs to supply the 1.5µA required to pull the EN pin to the V+ rail. If left open, the EN pin will pull to the negative rail and the device will be enabled by default. If the EN function is not required (no need to turn the part off), as a precaution, it is recommended that the user tie the EN pin to the V- pin. Rail-to-Rail Input Many rail-to-rail input stages use two differential input pairs; a long-tail PNP (or PFET) and an NPN (or NFET). Severe penalties have to be paid for this circuit topology. As the input signal moves from one supply rail to another, the operational amplifier switches from one input pair to the other causing drastic changes in input offset voltage and an undesired change in magnitude and polarity of input offset current. The ISL28136 achieves input rail-to-rail operation without sacrificing important precision specifications and degrading distortion performance. The device’s input offset voltage exhibits a smooth behavior throughout the entire commonmode input range. The input bias current versus the common-mode voltage range gives an undistorted behavior from typically down to the negative rail to 0.25V higher than the positive rail. Rail-to-Rail Output The output stage uses drain-connected N and P-channel MOSFETs to achieve rail-to-rail output swing. The P-channel device sources current to swing the output in the positive direction and the N-channel sinks current to swing the output in the negative direction. The ISL28136 with a 100kΩ load will swing to within 3mV of the positive supply rail and within 3mV of the negative supply rail. Limitations of the Differential Input Protection If the input differential voltage is expected to exceed 0.5V, an external current limiting resistor must be used to ensure the input current never exceeds 5mA. For non-inverting unity gain applications, the current limiting can be via a series IN+ resistor, or via a feedback resistor of appropriate value. For other gain configurations, the series IN+ resistor is the best choice, unless the feedback (RF) and gain setting (RG) resistors are both sufficiently large to limit the input current to 5mA. Large differential input voltages can arise from several sources: 1) During open loop (comparator) operation. Used this way, the IN+ and IN- voltages don’t track, so differentials arise. 2) When the amplifier is disabled but an input signal is still present. An RL or RG to GND keeps the IN- at GND, while the varying IN+ signal creates a differential voltage. Mux Amp applications are similar, except that the active channel VOUT determines the voltage on the IN- terminal. Results of Over-Driving the Output Caution should be used when over-driving the output for long periods of time. Over-driving the output can occur in two ways. 1) The input voltage times the gain of the amplifier exceeds the supply voltage by a large value or, 2) the output current required is higher than the output stage can deliver. These conditions can result in a shift in the Input Offset Voltage (VOS) as much as 1µV/hr. of exposure under these conditions. IN+ and IN- Input Protection All input terminals have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. They also contain back-to-back diodes across the input terminals (see “Pin Descriptions” on page 10 - Circuit 1). For applications where the input differential voltage is expected to exceed 0.5V, an external series resistor must be used to ensure the input currents never exceed 5mA (Figure 38). 11 FN6153.5 April 5, 2011 ISL28136 3) When the slew rate of the input pulse is considerably faster than the op amp’s slew rate. If the VOUT can’t keep up with the IN+ signal, a differential voltage results, and visible distortion occurs on the input and output signals. To avoid this issue, keep the input slew rate below 1.9V/µs, or use appropriate current limiting resistors. Large (>2V) differential input voltages can also cause an increase in disabled ICC. Power Dissipation It is possible to exceed the +125°C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related in Equation 1: T JMAX = T MAX + ( θ JA xPD MAXTOTAL ) (EQ. 1) Current Limiting These devices have no internal current-limiting circuitry. If the output is shorted, it is possible to exceed the Absolute Maximum Rating for output current or power dissipation, potentially resulting in the destruction of the device. where: • PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) • PDMAX for each amplifier can be calculated using Equation 2: V OUTMAX PD MAX = 2*V S × I SMAX + ( V S - V OUTMAX ) × --------------------------RL (EQ. 2) where: • TMAX = Maximum ambient temperature • θJA = Thermal resistance of the package • PDMAX = Maximum power dissipation of 1 amplifier • VS = Supply voltage (Magnitude of V+ and V-) • IMAX = Maximum supply current of 1 amplifier • VOUTMAX = Maximum output voltage swing of the application • RL = Load resistance All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 12 FN6153.5 April 5, 2011 ISL28136 Package Outline Drawing M8.15E 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 0, 08/09 4 4.90 ± 0.10 A DETAIL "A" 0.22 ± 0.03 B 6.0 ± 0.20 3.90 ± 0.10 4 PIN NO.1 ID MARK 5 (0.35) x 45° 1.27 0.43 ± 0.076 0.25 M C A B 4° ± 4° TOP VIEW SIDE VIEW “B” 1.75 MAX 1.45 ± 0.1 0.25 0.175 ± 0.075 GAUGE PLANE C SEATING PLANE 0.10 C SIDE VIEW “A 0.63 ±0.23 DETAIL "A" (1.27) (0.60) NOTES: (1.50) 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. Unless otherwise specified, tolerance : Decimal ± 0.05 Dimension does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side. 5. 6. The pin #1 identifier may be either a mold or mark feature. Reference to JEDEC MS-012. 2. (5.40) 3. 4. TYPICAL RECOMMENDED LAND PATTERN 13 FN6153.5 April 5, 2011 ISL28136 Package Outline Drawing P6.064A 6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE Rev 0, 2/10 1.90 0.95 D A 6 5 4 0-3° 0.08-0.20 PIN 1 INDEX AREA 2.80 3 1.60 3 0.15 C D 2x 5 (0.60) 0.20 C 2x 0.40 ±0.05 3 D END VIEW SEE DETAIL X 1 2 3 B 0.20 M C A-B TOP VIEW 2.90 5 0.15 C A-B 2x 10° TYP (2 PLCS) H 1.14 ±0.15 C 1.45 MAX SIDE VIEW 0.05-0.15 0.10 C SEATING PLANE (0.25) GAUGE PLANE DETAIL "X" (0.60) 0.45±0.1 4 (1.20) NOTES: (2.40) 1. 2. 3. 4. 5. (0.95) (1.90) TYPICAL RECOMMENDED LAND PATTERN 6. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. Dimensioning and tolerancing conform to ASME Y14.5M-1994. Dimension is exclusive of mold flash, protrusions or gate burrs. Foot length is measured at reference to guage plane. This dimension is measured at Datum “H”. Package conforms to JEDEC MO-178AA. 14 FN6153.5 April 5, 2011