Application Note 1508
ISL281X7SOICEVAL1Z Evaluation Board User’s Guide
Introduction
The ISL281X7SOICEVAL1Z evaluation board is a design platform containing all the circuitry needed to characterize critical performance parameters of the ISL281X7 operational amplifiers in SOIC-8 package, using a variety of user defined test circuits. The ISL281X7 operational amplifiers feature low bias current, low noise, and low offset and temperature drift. tied together to the power supply negative terminal. For split supplies, +V and -V terminals connect to their respective power supply terminals. De-coupling capacitors C2 and C4 connect close to their respective supplies, while two additional capacitors, C1 and C5, are connected close to the part to filter out high frequency noise. Anti-reverse diodes D1 and D2 protect the circuit in the case of accidental polarity reversal.
J7 J8 VV+ VREF
Reference Documents
• ISL28107 Data Sheet, FN6631 • ISL28117 Data Sheet, FN6632 • ISL28127 Data Sheet, FN6633
DNP
C2 R4 4.7µF D1 S1AB
Evaluation Board Key Features
The ISL281X7SOICEVAL1Z is designed to enable the IC to operate from a single supply, +4.5VDC to +40VDC or from split supplies, ±2.25VDC to ±20V. The board is configured for a single op amp connected for differential input with a closed loop gain of 10. A single external reference voltage (VREF) pin and provisions for a user-selectable voltage divider-filter are included.
S1AB
FIGURE 1. POWER SUPPLY CIRCUIT
Amplifier Configuration (Figure 2)
The schematic of 1/2 of the op-amp with the components supplied is shown in Figure 2. The circuit implements a differential input amp with a closed loop gain of 10. The circuit can operate from a single supply or from dual supplies. The VREF pin must be connected to ground to establish a ground referenced input for dual supply operation, or can be externally set to any reference level for single supply operation. VREF should not be left floating.
Power Supplies (Figure 1)
External power connections are made through the +V, -V, VREF and Ground connections on the evaluation board. For single supply operation, the -V and Ground pins are
RF
100kΩ
IN RINININV+ IN+ V+ VM RREF+ VP
ISL281X7
10kΩ
RIN+ IN +
0Ω
DNP
R16
J13 C4
J10
J11
J9
4.7µF D2
VOUT
IN+
10kΩ 100kΩ
VCM
RL DNP
VREF
VREF
GND
FIGURE 2. BASIC AMPLIFIER CONFIGURATION
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Application Note 1508
User-selectable Options (Figures 3 and 4)
Component pads are included to enable a variety of user-selectable circuits to be added to the amplifier VREF, inputs, outputs, and the amplifier feedback loops. The Inputs (Figure 3) have additional resistor and capacitor, and jumper placements for loading and/or measurement of frequency sensitive parameters.
ININ+ NODE OUT
The outputs (Figure 4) have additional resistor and capacitor placements for filtering and loading. NOTE: Operational amplifiers are sensitive to output capacitance and may oscillate. In the event of oscillation, reduce output capacitance by using shorter cables, or add a resistor in series with the output.
R8 DNP R6 DNP R9 10k
R10 DNP R14 DNP R11
J1 R1 R3 DNP J2 R2 DNP DNP
R5 0
DNP
R7
100k C3 OPEN R14 VREF R15 100k
OPEN R17
10k R13 DNP
FIGURE 3. INPUT STAGE
FIGURE 4. OUTPUT STAGE
TABLE 1. ISL281X7SOICEVAL1Z COMPONENTS PARTS LIST DEVICE # C2, C4 C1, C5 C3, C6 D1, D2 U1 (ISL28107FBZ) U1 (ISL28117FBZ) U1 (ISL28127FBZ) R1-R4, R6-R8, R10, R13, R14, R16, R17, R19, R20 R5, R18 R9, R12 R11, R15 DESCRIPTION CAP, SMD, 0805, 4.7µF, 50V, 10%, X7R, ROHS CAP, SMD, 0603, 0.01µF, 50V, 10%, X7R, ROHS CAP, SMD, 0603, DNP-PLACE HOLDER, ROHS DIODE-RECTIFIER, 40V, 0.5A, ROHS OP AMP, SOIC, ROHS OP AMP, SOIC, ROHS OP AMP, SOIC, ROHS RESISTOR, SMD, 0603, 0.1%, MF, DNP-PLACE HOLDER User selectable resistors - not populated RES, SMD, 0603, 0Ω, 1/10W, TF, ROHS RES, SMD, 0603, 10k, 1/10W, 1%, TF, ROHS RES, SMD, 0603, 100k, 1/10W, 1%, TF, ROHS Zero ohm user selectable resistors Gain resistors Gain resistors COMMENTS Power Supply Decoupling Power Supply Decoupling User selectable capacitors - not populated Reverse Power Protection
2
DNP
C6
R12
To Output To INTo IN+
R18 J12 0
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Application Note 1508
FIGURE 5. ISL281X7SOICEVAL1Z TOP VIEW
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com 3
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J7 VC2 DNP 4.7µF D1 S1AB J13
C4 DNP 4.7µF D2 S1AB
IN-
IN+
NODE OUT
J3
J4
J5
J6
R16
J8 V+ VREF J10 J11 J9
R4
DNP
C3 OPEN R11 100k R19 DNP R20 1 DNP R12 10k
R5 IN J1 R1 DNP DNP R7 0
R9 10k
DNP
R14
R6
DNP
R3
OPEN R17
DNP 0.01µF C1 R13 DNP R15 100k C5 VREF 0.01µF
FIGURE 6. ISL281X7SOICEVAL1Z SCHEMATIC DIAGRAM
DNP
C6
4
R8 IN + J2 R2
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Application Note 1508
R10 DNP
DNP
U1 8 R18 J12 0 OUTPUT 2 SOIC8 7 Generic 3 Pack. 6 4 5