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ISL28256

ISL28256

  • 厂商:

    INTERSIL(Intersil)

  • 封装:

  • 描述:

    ISL28256 - 39uA Micropower Single and Dual Precision Rail-to-Rail Input-Output (RRIO) Low Input Bias...

  • 数据手册
  • 价格&库存
ISL28256 数据手册
® ISL28156, ISL28256 Data Sheet February 27, 2007 FN6154.2 39µA Micropower Single and Dual Precision Rail-to-Rail Input-Output (RRIO) Low Input Bias Current Op Amps The ISL28156 and ISL28256 are micropower precision operational amplifiers optimized for single supply operation at 5V and can operated down to 2.4V. These devices feature an Input Range Enhancement Circuit (IREC) which enables them to maintain CMRR performance for input voltages greater than the positive supply. The input signal is capable of swinging 0.5V above a 5.0V supply (0.25 for a 2.5V supply) and to within 10mV from ground. The output operation is rail-to-rail. The 1/f corner of the voltage noise spectrum is at 1kHz. This results in low frequency noise performance which can only be found on devices with an order of magnitude higher supply current. ISL28156 and ISL28256 can be operated from one lithium cell or two Ni-Cd batteries. The input range includes both positive and negative rail. The output swings to both rails. Features • 39µA typical supply current • 5nA max input bias current • 250kHz gain bandwidth product (AV = 1) • 2.4V to 5.5V single supply voltage range • Rail-to-rail input and output • Enable pin (ISL28156 only) • Pb-free plus anneal available (RoHS compliant) Applications • Battery- or solar-powered systems • 4mA to 20mA current loops • Handheld consumer products • Medical devices • Sensor amplifiers • ADC buffers • DAC output amplifiers Ordering Information PART NUMBER PART (Note) MARKING ISL28156FHZ-T7 GABV ISL28156FBZ 28156FBZ TAPE AND REEL PACKAGE (Pb-Free) PKG. DWG. # 7” (3k pcs) 6 Ld SOT-23 MDP0038 97/Tube 8 Ld SOIC MDP0027 MDP0027 MDP0027 MDP0043 ISL28156FBZ-T7 28156FBZ Coming Soon ISL28256FAZ-T7 Coming Soon ISL28256FAZ-T7 7” (1k pcs) 8 Ld SOIC 7” (1k pcs) 8 Ld SOIC 7” 8 Ld MSOP NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2006, 2007. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. ISL28156, ISL28256 Pinouts ISL28156 (6 LD SOT-23) TOP VIEW OUT 1 V- 2 IN+ 3 6 V+ 5 ENABLE 4 INNC 1 IN- 2 IN+ 3 V- 4 + ISL28156 (8 LD SOIC) TOP VIEW 8 ENABLE 7 V+ 6 OUT 5 NC +- ISL28256 (8 LD SOIC) TOP VIEW OUT_A 1 IN-_A 2 IN+_A 3 V- 4 -+ +8 V+ 7 OUT_B 6 IN-_B 5 IN+_B ISL28256 (8 LD MSOP) Coming Soon TOP VIEW OUT_A 1 IN-_A 2 IN+_A 3 V- 4 -+ +8 V+ 7 OUT_B 6 IN-_B 5 IN+_B 2 FN6154.2 February 27, 2007 ISL28156, ISL28256 Absolute Maximum Ratings (TA = +25°C) Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/μs Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V ESD tolerance, Human Body Model . . . . . . . . . . . . . . . . . . . . . .3kV ESD tolerance, Machine Model . . . . . . . . . . . . . . . . . . . . . . . . .300V Thermal Information Thermal Resistance θJA (°C/W) 6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 230 6 Ld SO Package . . . . . . . . . . . . . . . . . . . . . . . . . . 110 8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . 115 Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications V+ = 5V, V- = 0V,VCM = 2.5V, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C, temperature data guaranteed by characterization DESCRIPTION CONDITIONS 8 Ld SO 6 Ld SOT-23 MIN -120 -200 -400 -450 TYP -7 -7 1.5 -1.5 -5 -2 -3.5 FO = 1kHz FO = 1kHz 0 VCM = 0V to 5V VS = 2.4V to 5V VO = 0.5V to 4.5V, RL = 100kΩ VO = 0.5V to 4.5V, RL = 1kΩ 80 75 90 75 200 175 35 30 110 104 412 70 3 130 4.992 4.99 4.85 4.8 4.985 4.88 0.05 AV = 1 29 18 250 39 10 47 56 14 16 6 8 150 200 0.34 1.14 46 0.14 5 1.2 2.5 5 5 MAX 120 250 400 450 UNIT µV µV µV/°C nA nA nV/√Hz pA/√Hz V dB dB V/mV V/mV mV mV V V V/µs kHz µA µA PARAMETER VOS Input Offset Voltage Δ V OS -----------------Δ Time IOS IB EN IN CMIR CMRR PSRR AVOL Input Offset Drive vs Temperature Input Offset Current Input Bias Current Input Noise Voltage Density Input Noise Current Density Input Common-Mode Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain VOUT Maximum Output Voltage Swing Output low, RL = 100kΩ Output low, RL = 1kΩ Output high, RL = 100kΩ Output high, RL = 1kΩ SR GBW IS,ON IS,OFF Slew Rate Gain Bandwidth Product Supply Current, Enabled Supply Current, Disabled 3 FN6154.2 February 27, 2007 ISL28156, ISL28256 Electrical Specifications V+ = 5V, V- = 0V,VCM = 2.5V, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C, temperature data guaranteed by characterization (Continued) DESCRIPTION Short-Circuit Output Current Short-Circuit Output Current Supply Operating Range Enable Pin High Level Enable Pin Low Level Enable Pin Input Current Enable Pin Input Current Enable to output on-state delay time (ISL28156) Enable to output off-state delay time (ISL28156) VEN = 5V VEN = 0V Vout = 1V (enable state); VEN = High to Low Vout = OV (disabled state) VEN = Low to High 0.7 10 1 16 10.8 0.1 R L = 1 0Ω R L = 1 0Ω Guaranteed by PSRR test CONDITIONS MIN 28 23 24 18 2.4 2 0.8 1.2 1.2 25 30 TYP 31 26 5 MAX UNIT mA mA V V V µA nA µs µs PARAMETER IO+ IOVSUPPLY VENH VENL IENH IENL tEN tEN Typical Performance Curves 3 2 NORMALIZED GAIN (dB) 1 0 -1 -2 -3 -4 -5 -6 -7 -8 AV = 1 CL = 16.3pF VOUT = 10mVPP 1k 10k 100k 1M RL = 10k RL = 100k NORMALIZED GAIN (dB) RL = 1 k 8 7 6 5 4 3 2 1 0 -1 -2 -3 -4 -5 -6 -7 -8 CL = 63.3pF CL = 55.3pF CL = 49.3pF CL = 43.3pF CL = 38.3pF CL = 34.3pF AV = 1 RL = 10k VOUT = 10mVPP 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 1. GAIN vs FREQUENCY vs RL FIGURE 2. GAIN vs FREQUENCY vs CL 70 60 50 GAIN (dB) 40 30 20 10 1 Rf = 1M, Rg = 1k, RL = 10k RL = 10k CL = 16.3pF VOUT = 10mVPP 0 NORMALIZED GAIN (dB) -1 -2 -3 -4 -5 -6 AV = 1 RL = 10k -8 VOUT = 10mVPP -9 1k 10k -7 VS = 2.4V V S = 5V Rf = 100k, Rg = 1k, RL = 10k Rf = 9.09, Rg = 1k, RL = INF 0 Rf = 0, Rg = INF, RL = 10k -10 100 1k 10k FREQUENCY (Hz) 100k 1M 100k 1M FREQUENCY (Hz) FIGURE 3. CLOSED LOOP GAIN vs FREQUENCY FIGURE 4. GAIN vs FREQUENCY vs VS 4 FN6154.2 February 27, 2007 ISL28156, ISL28256 Typical Performance Curves (Continued) 3 2 NORMALIZED GAIN (dB) 1 0 -1 -2 -3 -4 -5 -6 -7 -8 1k AV = 1 RL = 1k CL = 16.3pF 10k 100k 1M FREQUENCY (Hz) VOUT = 1V VOUT = 100mV VOUT = 10mV NORMALIZED GAIN (dB) VOUT = 50mV 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 AV = 1 RL = 10k CL = 16.3pF 1k 10k VOUT = 50mV VOUT = 100mV 100k 1M VOUT = 1V VOUT = 10mV FREQUENCY (Hz) FIGURE 5. GAIN vs FREQUENCY vs VOUT FIGURE 6. GAIN vs FREQUENCY vs VOUT 1 0 NORMALIZED GAIN (dB) -1 -2 -3 -4 -5 -6 -7 -8 -9 1k AV = 1 RL = 100k CL = 16.3pF 10k VOUT = 1V VOUT = 10mV 10 0 -10 CMRR (dB) AV = 1 RL = 10k CL = 16.3pF VCM = 1VPP VS = 2.4V VOUT = 50mV -20 -30 -40 -50 -60 VS = 5V VOUT = 100mV 100k 1M -70 100 1k FREQUENCY (Hz) 10k FREQUENCY (Hz) 100k 1M FIGURE 7. GAIN vs FREQUENCY vs VOUT FIGURE 8. CMRR vs FREQUENCY 10 0 -10 PSRR (dB) -20 -30 -40 -50 -60 -70 -80 100 1k 10k FREQUENCY (Hz) 100k 1M PSRR+ AV = 1 RL = 1k CL = 16.3pF VOUT = 1VPP VS = 2.4V 10 0 PSRRPSRR (dB) -10 -20 -30 -40 -50 -60 -70 -80 -90 100 1k 10k FREQUENCY (Hz) 100k 1M PSRR+ AV = 1 RL = 1k CL = 16.3pF VOUT = 1VPP VS =5V PSRR- FIGURE 9. PSRR vs FREQUENCY; VS = 2.4V FIGURE 10. PSRR vs FREQUENCY; VS = 5V 5 FN6154.2 February 27, 2007 ISL28156, ISL28256 Typical Performance Curves (Continued) 160 INPUT VOLTAGE NOISE (nV/√Hz) 140 120 100 80 60 40 20 0 1 10 100 FREQUENCY (Hz) 1k 10k INPUT CURRENT NOISE (pA/√Hz) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 1 10 100 FREQUENCY (Hz) 1k 10k FIGURE 11. INPUT VOLTAGE NOISE vs FREQUENCY FIGURE 12. INPUT CURRENT NOISE vs FREQUENCY 0 -0.2 INPUT NOISE (µV) -0.4 -0.6 -0.8 -1 -1.2 -1.4 0 24 AV = 1000 RF= 100k Ri = 100 RL = 10k 22 SMALL SIGNAL (mV) 20 18 16 14 12 1 2 3 4 5 TIME (s) 6 7 8 9 10 10 0 50 100 150 200 TIME (µs) 250 300 350 400 RF = Ri =RL = 10k AV = 2 CL = 16.3pF VOUT = 10mVPP FIGURE 13. 1 TO 10Hz INPUT NOISE FIGURE 14. SMALL SIGNAL STEP RESPONSE 0.6 0.4 ENABLE (V) 0.2 0 -0.2 -0.4 -0.6 RF = Ri =RL = 10k AV = 2 CL = 16.3pF VOUT = 1VPP 0 100 200 TIME (µs) 300 400 6 5 4 3 2 1 0 -1 VOUT 0 10 20 30 40 50 60 70 80 90 TIME (µs) V-ENABLE 1.2 1.0 OUTPUT (V) 0.8 RF = Ri =RL = 10k AV = 2 CL = 16.3pF VOUT = 10mVPP 0.6 0.4 0.2 0 -0.2 100 LARGE SIGNAL (V) FIGURE 15. LARGE SIGNAL STEP RESPONSE FIGURE 16. ENABLE TO OUTPUT DELAY 6 FN6154.2 February 27, 2007 ISL28156, ISL28256 Typical Performance Curves (Continued) 58 53 CURRENT (µA) 48 43 38 33 MIN 28 23 -40 -20 0 20 40 60 80 100 120 MEDIAN 14.5 n = 1000 MAX 13.5 12.5 CURRENT (µA) 11.5 10.5 9.5 8.5 7.5 6.5 -40 -20 0 20 40 60 MIN 80 100 120 MEDIAN n = 1000 MAX TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 17. SUPPLY CURRENT ENABLED vs TEMPERATURE VS = ±2.5V FIGURE 18. SUPPLY CURRENT DISABLED vs TEMPERATURE VS = ±2.5V 380 n = 1000 280 180 VIO (µV) VIO (µV) 80 -20 -120 -220 -320 -420 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MIN MEDIAN MAX 400 n = 1000 300 200 100 0 -100 -200 -300 -400 -40 MIN MEDIAN MAX -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 19. VIO SO8 PACKAGE vs TEMPERATURE VS = ±2.5V FIGURE 20. VIO SO8 PACKAGE vs TEMPERATURE VS = ±1.2V 380 280 n = 1000 180 VIO (µV) VIO (µV) 80 -20 -120 -220 MIN -320 -420 -40 MEDIAN MAX 400 300 200 100 0 -100 -200 -300 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 -400 -40 MIN MEDIAN n = 1000 MAX -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 21. VIO SOT-23 PACKAGE vs TEMPERATURE VS = ±2.5V FIGURE 22. VIO SOT-23 PACKAGE vs TEMPERATURE VS = ±1.2V 7 FN6154.2 February 27, 2007 ISL28156, ISL28256 Typical Performance Curves (Continued) 5 4 3 IBIAS+ (nA) 2 1 0 -1 -2 -3 -40 -20 0 20 MIN 0 -1 -40 MEDIAN MAX IBIAS- (nA) 3 2 1 MEDIAN MIN n = 1000 5 4 MAX n = 1000 40 60 80 100 120 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 23. IBIAS+ vs TEMPERATURE VS = ±2.5V FIGURE 24. IBIAS- vs TEMPERATURE VS = ±2.5V 2 1 0 -1 -2 -3 MIN -4 -40 -20 0 20 40 60 80 100 120 MEDIAN n = 1000 MAX IBIAS- (nA) 10 n = 1000 8 MAX 6 4 2 0 -2 MIN -4 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MEDIAN IBIAS+ (nA) TEMPERATURE (°C) FIGURE 25. IBIAS+ vs TEMPERATURE VS = ±1.5V FIGURE 26. IBIAS- vs TEMPERATURE VS = ±1.2V 4 3 2 1 IOS (nA) 0 -1 -2 -3 -4 -5 n = 1000 MAX 4 n = 1000 2 0 IOS (nA) -2 -4 -6 -8 MIN MEDIAN MAX MEDIAN MIN -6 -40 -20 0 20 40 60 80 100 120 -10 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 27. IOS vs TEMPERATURE VS = ±2.5V FIGURE 28. IOS vs TEMPERATURE VS = ±1.5V 8 FN6154.2 February 27, 2007 ISL28156, ISL28256 Typical Performance Curves (Continued) 135 130 125 CMRR (dB) 120 115 110 105 100 95 90 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MIN MEDIAN PSRR (dB) n = 1000 MAX 130 125 120 115 110 105 100 95 90 85 -40 -20 0 MIN 20 40 60 80 TEMPERATURE (°C) 100 120 MEDIAN MAX n = 1000 FIGURE 29. CMRR vs TEMPERATURE V+ = ±2.5V, ±1.5V FIGURE 30. PSRR vs TEMPERATURE ±1.2V to ±2.5V 4.900 4.895 4.890 4.885 4.880 4.875 4.870 4.865 4.860 4.855 4.850 -40 -20 0 20 40 60 80 TEMPERATURE (°C) MIN MAX MEDIAN n = 1000 4.9984 4.9982 4.9980 VOUT (V) 4.9978 4.9976 4.9974 4.9972 4.9970 MIN MEDIAN n = 1000 MAX VOUT (V) 100 120 4.9968 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 31. VOUT HIGH vs TEMPERATURE VS = ±2.5V, RL = 1k FIGURE 32. VOUT HIGH VS = ±2.5V, RL = 100k 4.9984 4.9982 4.9980 VOUT (mV) VOUT (V) 4.9978 4.9976 4.9974 4.9972 4.9970 4.9968 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MIN MEDIAN MAX n = 1000 5 n = 1000 4.5 MEDIAN 4 3.5 3 2.5 -40 MAX MIN -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 33. VOUT LOW VS = ±2.5V, RL = 1k FIGURE 34. VOUT LOW VS = ±2.5V, RL = 100k 9 FN6154.2 February 27, 2007 ISL28156, ISL28256 Pin Descriptions ISL28156 (6 Ld SOT-23) ISL28156 (8 Ld SO) 1, 5 4 2 2 (A) 6 (B) ISL28256 (8 Ld MSOP) PIN NAME NC INFUNCTION Not connected Inverting input V+ IN- EQUIVALENT CIRCUIT IN+ VCircuit 1 3 2 1 3 4 6 3 (A) 5 (B) 4 1 (A) 7 (B) IN+ VOUT Non-inverting input Negative supply Output (See circuit 1) V+ OUT VCircuit 2 6 5 7 8 8 V+ ENABLE Positive supply Chip enable CE V+ VCircuit 3 Applications Information Introduction The ISL28156 is a single BiMOS rail-to-rail input, output (RRIO) operational amplifier with an enable feature. The ISL28256 is a dual version without the enable feature. Both devices are designed to operate from single supply (2.4V to 5.0V) or dual supplies (±1.2V to ±2.5V) while drawing only 39μA of supply current per amplifier. This combination of low power and precision performance makes this device suitable for a variety of low power applications including battery powered systems. within one diode beyond the supply rails. They also contain back-to-back diodes across the input terminals. For applications where the input differential voltage is expected to exceed 0.5V, external series resistors must be used to ensure the input currents never exceed 5mA (Figure 35). VIN RIN + RL VOUT FIGURE 35. INPUT CURRENT LIMITING Rail-to-Rail Input/Output These devices feature bipolar inputs which have an input common mode range that extends up to 0.5V beyond the v+ rail, and to within 10mV of the V- rail. The CMOS outputs typically swing to within about 4mV of the supply rails with a 100kΩ load. The NMOS sinks current to swing the output in the negative direction. The PMOS sources current to swing the output in the positive direction. Enable/Disable Feature The ISL28156 offers an EN pin that disables the device when pulled up to at least 2.0V. In the disabled state (output in a high impedance state), the part consumes typically 10µA. By disabling the part, multiple ISL28156 parts can be connected together as a MUX. In this configuration, the outputs are tied together in parallel and a channel can be selected by the EN pin. The EN pin also has an internal pull down. If left open, the EN pin will pull to the negative rail and the device will be enabled by default. Input Protection All input terminals have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to 10 FN6154.2 February 27, 2007 ISL28156, ISL28256 The loading effects of the feedback resistors of the disabled amplifier must be considered when multiple amplifier outputs are connected together. where: • TMAX = Maximum ambient temperature • θJA = Thermal resistance of the package • PDMAX = Maximum power dissipation of 1 amplifier • VS = Supply voltage • IMAX = Maximum supply current of 1 amplifier • VOUTMAX = Maximum output voltage swing of the application • RL = Load resistance Using Only One Channel The ISL28256 is a dual op amp. If the application only requires one channel, the user must configure the unused channel to prevent it from oscillating. The unused channel will oscillate if the input and output pins are floating. This will result in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to short the output to the negative input and ground the positive input (as shown in Figure 36). + FIGURE 36. PREVENTING OSCILLATIONS IN UNUSED CHANNELS Current Limiting These devices have no internal current-limiting circuitry. If the output is shorted, it is possible to exceed the Absolute Maximum Rating for output current or power dissipation, potentially resulting in the destruction of the device. Power Dissipation It is possible to exceed the +125°C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related as follows: T JMAX = T MAX + ( θ JA xPD MAXTOTAL ) (EQ. 1) where: • PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) • PDMAX for each amplifier can be calculated as follows: V OUTMAX PD MAX = 2*V S × I SMAX + ( V S - V OUTMAX ) × --------------------------R L (EQ. 2) 11 FN6154.2 February 27, 2007 ISL28156, ISL28256 SOT-23 Package Family e1 A N 6 4 MDP0038 D SOT-23 PACKAGE FAMILY MILLIMETERS SYMBOL A A1 SOT23-5 1.45 0.10 1.14 0.40 0.14 2.90 2.80 1.60 0.95 1.90 0.45 0.60 5 SOT23-6 1.45 0.10 1.14 0.40 0.14 2.90 2.80 1.60 0.95 1.90 0.45 0.60 6 TOLERANCE MAX ±0.05 ±0.15 ±0.05 ±0.06 Basic Basic Basic Basic Basic ±0.10 Reference Reference Rev. F 2/07 NOTES: E1 2 3 E A2 b c 0.20 C 0.15 C D 2X 5 e B b NX 1 2 3 2X 0.20 M C A-B D D E E1 e e1 L L1 N 0.15 C A-B 2X C D 1 3 A2 SEATING PLANE 0.10 C NX A1 1. Plastic or metal protrusions of 0.25mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. This dimension is measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 5. Index area - Pin #1 I.D. will be located within the indicated zone (SOT23-6 only). (L1) H 6. SOT23-5 version has no center lead (shown as a dashed line). A GAUGE PLANE c L 0° +3° -0° 0.25 12 FN6154.2 February 27, 2007 ISL28156, ISL28256 Small Outline Package Family (SO) A D N (N/2)+1 h X 45° A E E1 PIN #1 I.D. MARK c SEE DETAIL “X” 1 B (N/2) L1 0.010 M C A B e C H A2 GAUGE PLANE A1 0.004 C 0.010 M C A B b DETAIL X SEATING PLANE L 4° ±4° 0.010 MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL A A1 A2 b c D E E1 e L L1 h N NOTES: 1. Plastic or metal protrusions of 0.006” maximum per side are not included. 2. Plastic interlead protrusions of 0.010” maximum per side are not included. 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994 SO-8 0.068 0.006 0.057 0.017 0.009 0.193 0.236 0.154 0.050 0.025 0.041 0.013 8 SO-14 0.068 0.006 0.057 0.017 0.009 0.341 0.236 0.154 0.050 0.025 0.041 0.013 14 SO16 (0.150”) 0.068 0.006 0.057 0.017 0.009 0.390 0.236 0.154 0.050 0.025 0.041 0.013 16 SO16 (0.300”) (SOL-16) 0.104 0.007 0.092 0.017 0.011 0.406 0.406 0.295 0.050 0.030 0.056 0.020 16 SO20 (SOL-20) 0.104 0.007 0.092 0.017 0.011 0.504 0.406 0.295 0.050 0.030 0.056 0.020 20 SO24 (SOL-24) 0.104 0.007 0.092 0.017 0.011 0.606 0.406 0.295 0.050 0.030 0.056 0.020 24 SO28 (SOL-28) 0.104 0.007 0.092 0.017 0.011 0.704 0.406 0.295 0.050 0.030 0.056 0.020 28 TOLERANCE MAX ±0.003 ±0.002 ±0.003 ±0.001 ±0.004 ±0.008 ±0.004 Basic ±0.009 Basic Reference Reference NOTES 1, 3 2, 3 Rev. M 2/07 13 FN6154.2 February 27, 2007 ISL28156, ISL28256 Mini SO Package Family (MSOP) 0.25 M C A B D N A (N/2)+1 MDP0043 MINI SO PACKAGE FAMILY MILLIMETERS SYMBOL A A1 MSOP8 1.10 0.10 0.86 0.33 0.18 3.00 4.90 3.00 0.65 0.55 0.95 8 MSOP10 1.10 0.10 0.86 0.23 0.18 3.00 4.90 3.00 0.50 0.55 0.95 10 TOLERANCE Max. ±0.05 ±0.09 +0.07/-0.08 ±0.05 ±0.10 ±0.15 ±0.10 Basic ±0.15 Basic Reference NOTES 1, 3 2, 3 Rev. D 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included. E E1 PIN #1 I.D. A2 b c B 1 (N/2) D E E1 e C SEATING PLANE 0.10 C N LEADS b H e L L1 N 0.08 M C A B L1 A c SEE DETAIL "X" 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. A2 GAUGE PLANE L DETAIL X 0.25 A1 3° ±3° All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 14 FN6154.2 February 27, 2007
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